+ Risc-V: instructions of B extension

compiler/riscv/aoptcpurv.pas

@@ -58,7 +58,7 @@ implementation
   uses
     cutils;
 
-  function MatchInstruction(const instr: tai; const op: TAsmOps; const AConditions: TAsmConds = []): boolean;
+  function MatchInstruction(const instr: tai; const op: TCommonAsmOps; const AConditions: TAsmConds = []): boolean;
     begin
       result :=
         (instr.typ = ait_instruction) and

compiler/riscv/cpubase.pas

@@ -83,6 +83,45 @@ uses
         A_AMOOR_D,A_AMOMIN_D,A_AMOMAX_D,A_AMOMINU_D,A_AMOMAXU_D,
 {$endif RISCV64}
 
+        { B-extension }
+        A_ADD_UW,A_ANDN,A_CLMUL,A_CLMULH,A_CLMULR,A_CLZ,
+{$ifdef RISCV64}
+        A_CLZW,
+{$endif RISCV64}
+        A_CPOP,
+{$ifdef RISCV64}
+        A_CPOPW,
+{$endif RISCV64}
+        A_CTZ,
+{$ifdef RISCV64}
+        A_CTZW,
+{$endif RISCV64}
+        A_MAX,A_MAXU,A_MIN,A_MINU,A_ORC_B,A_ORN,A_REV8,A_ROL,
+{$ifdef RISCV64}
+        A_ROLW,
+{$endif RISCV64}
+        A_ROR,A_RORI,
+{$ifdef RISCV64}
+        A_RORIW,
+        A_RORW,
+{$endif RISCV64}
+        A_BCLR,A_BCLRI,A_BEXT,A_BEXTI,A_BINV,A_BINVI,A_BSET,A_SETI,{ A_SEXT_B,A_SEXT_H, }
+        A_SH1ADD,
+{$ifdef RISCV64}
+        A_SH1ADD_UW,
+{$endif RISCV64}
+        A_SH2ADD,
+{$ifdef RISCV64}
+        A_SH2ADD_UW,
+{$endif RISCV64}
+        A_SH3ADD,
+{$ifdef RISCV64}
+        A_SH3ADD_UW,
+        A_SLLI_UW,
+{$endif RISCV64}
+        A_XNOR,
+        { A_ZEXT_H, }
+
         { F-extension }
         A_FLW,A_FSW,
         A_FMADD_S,A_FMSUB_S,A_FNMSUB_S,A_FNMADD_S,
@@ -129,17 +168,20 @@ uses
         A_CSRSI,A_CSRCI
       );
 
-      TAsmOps = set of TAsmOp;
-
-      {# This should define the array of instructions as string }
+      { This should define the array of instructions as string }
       op2strtable=array[tasmop] of string[8];
 
     Const
-      {# First value of opcode enumeration }
+      { First value of opcode enumeration }
       firstop = low(tasmop);
-      {# Last value of opcode enumeration  }
+      { Last value of opcode enumeration  }
       lastop  = high(tasmop);
 
+      { Last value of opcode for TCommonAsmOps set below  }
+      LastCommonAsmOp = A_MRET;
+
+    Type
+      TCommonAsmOps = Set of A_None .. LastCommonAsmOp;
 
 {*****************************************************************************
                                   Registers

compiler/riscv/itcpugas.pas

@@ -74,6 +74,45 @@ unit itcpugas;
         'amoor.d','amomin.d','amomax.d','amominu.d','amomaxu.d',
 {$endif RISCV64}
 
+        { B-extension }
+        'add.uw','andn','clmul','clmulh','clmulr','clz',
+{$ifdef RISCV64}
+        'clzw',
+{$endif RISCV64}
+        'cpop',
+{$ifdef RISCV64}
+        'cpopw',
+{$endif RISCV64}
+        'ctz',
+{$ifdef RISCV64}
+        'ctzw',
+{$endif RISCV64}
+        'max','maxu','min','minu','orc.b','orn','rev8','rol',
+{$ifdef RISCV64}
+        'rolw',
+{$endif RISCV64}
+        'ror','rori',
+{$ifdef RISCV64}
+        'roriw',
+        'rorw',
+{$endif RISCV64}
+        'bclr','bclri','bext','bexti','binv','binvi','bset','seti',{ 'sext.b','sext.h', }
+        'sh1add',
+{$ifdef RISCV64}
+        'sh1add.uw',
+{$endif RISCV64}
+        'sh2add',
+{$ifdef RISCV64}
+        'sh2add.uw',
+{$endif RISCV64}
+        'sh3add',
+{$ifdef RISCV64}
+        'sh3add.uw',
+        'slli.uw',
+{$endif RISCV64}
+        'xnor',
+        { 'zext.h', }
+
         { f-extension }
         'flw','fsw',
         'fmadd.s','fmsub.s','fnmsub.s','fnmadd.s',