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@@ -29,6 +29,54 @@
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{****************************************************************************}
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+{ 68881/2 FPCR Encodings
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+ Rounding Mode Rounding Precision
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+ (RND Field) Encoding (PREC Field)
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+ To Nearest (RN) 0 0 Extend (X)
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+ To Zero (RZ) 0 1 Single (S)
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+ To Minus Infinity (RM) 1 0 Double (D)
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+ To Plus Infinity (RP) 1 1 Undefined
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+}
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+
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+{ 68881/2 FPCR layout }
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+{ Exception Enable Byte: }
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+{ 15 - BSUN - Branch/Set on Unordered }
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+{ 14 - SNAN - Signal Not A Number }
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+{ 13 - OPERR - Operand Error }
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+{ 12 - OVFL - Overflow }
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+{ 11 - UNFL - Underflow }
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+{ 10 - DZ - Divide by Zero }
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+{ 09 - INEX2 - Inexact Operation }
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+{ 08 - INEX1 - Inexact Decimal Input }
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+{ Mode Control Byte: }
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+{ 07 - PREC - Rounding Precision }
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+{ 06 - PREC - Rounding Precision }
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+{ 05 - RND - Rounding Mode }
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+{ 04 - RND - Rounding Mode }
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+{ 03 - 0 - Reserved, Set to zero }
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+{ 02 - 0 - Reserved, Set to zero }
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+{ 01 - 0 - Reserved, Set to zero }
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+{ 00 - 0 - Reserved, Set to zero }
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+
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+
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+{$IFNDEF FPU_SOFT}
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+{$DEFINE FPC_SYSTEM_HAS_SYSRESETFPU}
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+procedure SysResetFPU; assembler;
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+asm
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+ clr.l d0
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+ fmove.l d0,fpcr
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+end;
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+
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+{$DEFINE FPC_SYSTEM_HAS_SYSINITFPU}
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+procedure SysInitFPU; assembler;
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+asm
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+ clr.l d0
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+ // FIX ME:
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+ // move.w 0,d0 // enable a sane set of exception flags here
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+ fmove.l d0,fpcr
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+end;
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+{$ENDIF}
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+
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procedure fpc_cpuinit;
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begin
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SysResetFPU;
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