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@@ -48,10 +48,10 @@ unit cpubase;
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A_OR,A_ORI,A_EOR,A_COM,A_NEG,A_SBR,A_CBR,A_INC,A_DEC,A_TST,A_CLR,
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A_SER,A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU,A_RJMP,A_IJMP,
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A_EIJMP,A_JMP,A_RCALL,A_ICALL,R_EICALL,A_CALL,A_RET,A_RETI,A_CPSE,
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- A_CP,A_CPC,A_CPI,A_SBxx,A_BRxx,A_MOV,A_MOVW,A_LDI,A_LDS,A_LD,A_LDD,
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+ A_CP,A_CPC,A_CPI,A_SBIC,A_SBIS,A_BRxx,A_MOV,A_MOVW,A_LDI,A_LDS,A_LD,A_LDD,
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A_STS,A_ST,A_STD,A_LPM,A_ELPM,A_SPM,A_IN,A_OUT,A_PUSH,A_POP,
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A_LSL,A_LSR,A_ROL,A_ROR,A_ASR,A_SWAP,A_BSET,A_BCLR,A_SBI,A_CBI,
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- A_BST,A_BLD,A_Sxx,A_Cxx,A_BRAK,A_NOP,A_SLEEP,A_WDR);
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+ A_BST,A_BLD,A_Sxx,A_CLI,A_BRAK,A_NOP,A_SLEEP,A_WDR);
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{ This should define the array of instructions as string }
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@@ -63,7 +63,8 @@ unit cpubase;
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{ Last value of opcode enumeration }
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lastop = high(tasmop);
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- jmp_instructions = [A_BRxx,A_SBxx,A_JMP,A_RCALL,A_ICALL,A_EIJMP,A_RJMP,A_CALL,A_RET,A_RETI,A_CPSE,A_IJMP];
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+ jmp_instructions = [A_BRxx,A_SBIC,A_SBIS,A_JMP,A_RCALL,A_ICALL,A_EIJMP,
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+ A_RJMP,A_CALL,A_RET,A_RETI,A_CPSE,A_IJMP];
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{*****************************************************************************
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Registers
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@@ -90,9 +91,13 @@ unit cpubase;
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NR_ZLO = NR_R30;
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NR_ZHI = NR_R31;
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+ NIO_SREG = $3f;
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+ NIO_SP_LO = $3d;
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+ NIO_SP_HI = $3e;
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+
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{ Integer Super registers first and last }
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first_int_supreg = RS_R0;
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- first_int_imreg = $10;
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+ first_int_imreg = $20;
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{ Float Super register first and last }
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first_fpu_supreg = RS_INVALID;
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@@ -102,8 +107,7 @@ unit cpubase;
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first_mm_supreg = RS_INVALID;
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first_mm_imreg = RS_INVALID;
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-{ TODO: Calculate bsstart}
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- regnumber_count_bsstart = 64;
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+ regnumber_count_bsstart = 32;
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regnumber_table : array[tregisterindex] of tregister = (
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{$i ravrnum.inc}
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@@ -129,19 +133,19 @@ unit cpubase;
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type
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TAsmCond=(C_None,
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- C_EQ,C_NE,C_CS,C_CC,C_MI,C_PL,C_VS,C_VC,C_HI,C_LS,
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- C_GE,C_LT,C_GT,C_LE,C_AL,C_NV
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+ C_CC,C_CS,C_EQ,C_GE,C_HC,C_HS,C_ID,C_IE,C_LO,C_LT,
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+ C_MI,C_NE,C_PL,C_SH,C_TC,C_TS,C_VC,C_VS
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);
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const
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cond2str : array[TAsmCond] of string[2]=('',
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- 'eq','ne','cs','cc','mi','pl','vs','vc','hi','ls',
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- 'ge','lt','gt','le','al','nv'
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+ 'cc','cs','eq','ge','hc','hs','id','ie','lo','lt',
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+ 'mi','ne','pl','sh','tc','ts','vc','vs'
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);
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uppercond2str : array[TAsmCond] of string[2]=('',
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- 'EQ','NE','CS','CC','MI','PL','VS','VC','HI','LS',
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- 'GE','LT','GT','LE','AL','NV'
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+ 'CC','CS','EQ','GE','HC','HS','ID','IE','LO','LT',
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+ 'MI','NE','PL','SH','TC','TS','VC','VS'
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);
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{*****************************************************************************
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@@ -149,25 +153,14 @@ unit cpubase;
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*****************************************************************************}
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type
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- TResFlags = (F_EQ,F_NE,F_CS,F_CC,F_MI,F_PL,F_VS,F_VC,F_HI,F_LS,
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- F_GE,F_LT,F_GT,F_LE);
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+ TResFlags = (F_NotPossible,F_CC,F_CS,F_EQ,F_GE,F_LO,F_LT,
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+ F_NE,F_SH,F_VC,F_VS);
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{*****************************************************************************
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Operands
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*****************************************************************************}
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- taddressmode = (AM_OFFSET,AM_PREINDEXED,AM_POSTINDEXED);
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- tshiftmode = (SM_None,SM_LSL,SM_LSR,SM_ASR,SM_ROR,SM_RRX);
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-
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- tupdatereg = (UR_None,UR_Update);
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-
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- pshifterop = ^tshifterop;
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-
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- tshifterop = record
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- shiftmode : tshiftmode;
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- rs : tregister;
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- shiftimm : byte;
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- end;
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+ taddressmode = (AM_UNCHANGED,AM_POSTINCREMENT,AM_PREDRECEMENT);
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{*****************************************************************************
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Constants
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@@ -342,11 +335,12 @@ unit cpubase;
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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- function is_pc(const r : tregister) : boolean;
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-
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function dwarf_reg(r:tregister):byte;
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function GetHigh(const r : TRegister) : TRegister;
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+ { returns the next virtual register }
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+ function GetNextReg(const r : TRegister) : TRegister;
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+
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implementation
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uses
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@@ -374,16 +368,14 @@ unit cpubase;
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function reg_cgsize(const reg: tregister): tcgsize;
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- const subreg2cgsize:array[Tsubregister] of Tcgsize =
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- (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO);
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begin
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case getregtype(reg) of
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R_INTREGISTER :
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- reg_cgsize:=OS_32;
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- R_FPUREGISTER :
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- reg_cgsize:=OS_F80;
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+ reg_cgsize:=OS_8;
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+ R_ADDRESSREGISTER :
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+ reg_cgsize:=OS_16;
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else
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- internalerror(200303181);
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+ internalerror(2011021905);
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end;
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end;
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@@ -391,8 +383,8 @@ unit cpubase;
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procedure inverse_flags(var f: TResFlags);
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const
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inv_flags: array[TResFlags] of TResFlags =
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- (F_NE,F_EQ,F_CC,F_CS,F_PL,F_MI,F_VC,F_VS,F_LS,F_HI,
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- F_LT,F_GE,F_LE,F_GT);
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+ (F_NotPossible,F_CS,F_CC,F_NE,F_LT,F_SH,F_GE,
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+ F_NE,F_LO,F_VS,F_VC);
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begin
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f:=inv_flags[f];
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end;
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@@ -400,10 +392,12 @@ unit cpubase;
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function flags_to_cond(const f: TResFlags) : TAsmCond;
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const
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- flag_2_cond: array[F_EQ..F_LE] of TAsmCond =
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- (C_EQ,C_NE,C_CS,C_CC,C_MI,C_PL,C_VS,C_VC,C_HI,C_LS,
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- C_GE,C_LT,C_GT,C_LE);
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+ flag_2_cond: array[F_CC..F_VS] of TAsmCond =
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+ (C_CC,C_CS,C_EQ,C_GE,C_LO,C_LT,
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+ C_NE,C_SH,C_VC,C_VS);
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begin
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+ if f=F_NotPossible then
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+ internalerror(2011022101);
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if f>high(flag_2_cond) then
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internalerror(200112301);
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result:=flag_2_cond[f];
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@@ -434,24 +428,11 @@ unit cpubase;
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end;
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- procedure shifterop_reset(var so : tshifterop);
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- begin
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- FillChar(so,sizeof(so),0);
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- end;
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-
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-
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- function is_pc(const r : tregister) : boolean;
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- begin
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- is_pc:=(r=NR_R15);
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- end;
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-
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-
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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const
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inverse: array[TAsmCond] of TAsmCond=(C_None,
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- C_NE,C_EQ,C_CC,C_CS,C_PL,C_MI,C_VC,C_VS,C_LS,C_HI,
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- C_LT,C_GE,C_LE,C_GT,C_None,C_None
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- );
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+ C_CS,C_CC,C_NE,C_LT,C_HS,C_HC,C_IE,C_ID,C_SH,C_GE,
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+ C_PL,C_EQ,C_MI,C_LO,C_TS,C_TC,C_VS,C_VC);
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begin
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result := inverse[c];
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end;
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@@ -482,4 +463,10 @@ unit cpubase;
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result:=TRegister(longint(r)+1)
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end;
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+
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+ function GetNextReg(const r: TRegister): TRegister;
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+ begin
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+ result:=TRegister(longint(r)+1);
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+ end;
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+
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end.
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