embedded, arm, stm32: Fix CAN register definition

- bxCAN controller only has 2 RX mailboxes.
The registers behind were misplaced.
Refer to RM0008 section 24.9.3 and 24.9.4

rtl/embedded/arm/stm32f10x_conn.pp

@@ -159,7 +159,7 @@ type
   res5: array[$020..$17F] of byte;
 
   TX: array[0..2] of TCANMailbox;
-  RX: array[0..2] of TCANMailbox;
+  RX: array[0..1] of TCANMailbox;
 
   res6: array[$1D0..$1FF] of byte;
 

rtl/embedded/arm/stm32f10x_hd.pp

@@ -159,7 +159,7 @@ type
   res5: array[$020..$17F] of byte;
 
   TX: array[0..2] of TCANMailbox;
-  RX: array[0..2] of TCANMailbox;
+  RX: array[0..1] of TCANMailbox;
 
   res6: array[$1D0..$1FF] of byte;
 

rtl/embedded/arm/stm32f10x_ld.pp

@@ -159,7 +159,7 @@ type
   res5: array[$020..$17F] of byte;
 
   TX: array[0..2] of TCANMailbox;
-  RX: array[0..2] of TCANMailbox;
+  RX: array[0..1] of TCANMailbox;
 
   res6: array[$1D0..$1FF] of byte;
 

rtl/embedded/arm/stm32f10x_md.pp

@@ -159,7 +159,7 @@ type
   res5: array[$020..$17F] of byte;
 
   TX: array[0..2] of TCANMailbox;
-  RX: array[0..2] of TCANMailbox;
+  RX: array[0..1] of TCANMailbox;
 
   res6: array[$1D0..$1FF] of byte;
 

rtl/embedded/arm/stm32f10x_xl.pp

@@ -159,7 +159,7 @@ type
   res5: array[$020..$17F] of byte;
 
   TX: array[0..2] of TCANMailbox;
-  RX: array[0..2] of TCANMailbox;
+  RX: array[0..1] of TCANMailbox;
 
   res6: array[$1D0..$1FF] of byte;