* support OS_32/OS_64 in AArch64 cgsize2subreg() for MM registers (can happen

    for records with floating point fields with the LLVM code generator)

git-svn-id: trunk@40570 -

compiler/aarch64/cpubase.pas

@@ -368,8 +368,11 @@ unit cpubase;
           R_MMREGISTER:
             begin
               case s of
+                { records }
+                OS_32,
                 OS_F32:
                   cgsize2subreg:=R_SUBMMS;
+                OS_64,
                 OS_F64:
                   cgsize2subreg:=R_SUBMMD;
                 else