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* load 2 on x86 stack by fld1/fadd, if pic code is generated. It is more efficient as two memory accesses are saved.

florian 1 year ago
parent
commit
8c2aca6ece
1 changed files with 11 additions and 2 deletions
  1. 11 2
      compiler/x86/nx86con.pas

+ 11 - 2
compiler/x86/nx86con.pas

@@ -37,7 +37,7 @@ interface
 implementation
 implementation
 
 
     uses
     uses
-      systems,globals,
+      systems,globals,globtype,
       symdef,
       symdef,
       defutil,
       defutil,
       cpubase,
       cpubase,
@@ -51,7 +51,8 @@ implementation
     function tx86realconstnode.pass_1 : tnode;
     function tx86realconstnode.pass_1 : tnode;
       begin
       begin
          result:=nil;
          result:=nil;
-         if is_number_float(value_real) and not(use_vectorfpu(resultdef)) and ((value_real=1.0) or ((value_real=0.0) and (get_real_sign(value_real)=1))) then
+         if is_number_float(value_real) and not(use_vectorfpu(resultdef)) and ((value_real=1.0) or ((value_real=0.0) and (get_real_sign(value_real)=1)) or
+           ((value_real=2.0) and (cs_create_pic in current_settings.moduleswitches))) then
            expectloc:=LOC_FPUREGISTER
            expectloc:=LOC_FPUREGISTER
          else if (value_real=0.0) and (get_real_sign(value_real)=1) and use_vectorfpu(resultdef) then
          else if (value_real=0.0) and (get_real_sign(value_real)=1) and use_vectorfpu(resultdef) then
            expectloc:=LOC_MMREGISTER
            expectloc:=LOC_MMREGISTER
@@ -71,6 +72,14 @@ implementation
                   location.register:=NR_ST;
                   location.register:=NR_ST;
                   tcgx86(cg).inc_fpu_stack;
                   tcgx86(cg).inc_fpu_stack;
                end
                end
+             else if (value_real=2.0) and (cs_create_pic in current_settings.moduleswitches) and not(use_vectorfpu(resultdef)) then
+               begin
+                  emit_none(A_FLD1,S_NO);
+                  emit_reg_reg(A_FADD,S_NO,NR_ST,NR_ST);
+                  location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
+                  location.register:=NR_ST;
+                  tcgx86(cg).inc_fpu_stack;
+               end
              else if (value_real=0.0) and (get_real_sign(value_real)=1) then
              else if (value_real=0.0) and (get_real_sign(value_real)=1) then
                begin
                begin
                  if use_vectorfpu(resultdef) then
                  if use_vectorfpu(resultdef) then