* several fixes for new reg allocator

compiler/x86_64/cpubase.inc

@@ -46,29 +46,6 @@ const
   }
   std_op2str:op2strtable={$i x86_64in.inc}
 
-  { Standard register table (for each tregister enumeration). The
-    register strings should conform to the the names as defined
-    by the processor manufacturer
-  }
-  std_reg2str : reg2strtable = ('',
-    'rax','rcx','rdx','rbx','rsp','rbp','rsi','rdi',
-    'r8','r9','r10','r11','r12','r13','r14','r15','rip',
-    'eax','ecx','edx','ebx','esp','ebp','esi','edi',
-    'r8d','r9d','r10d','r11d','r12d','r13d','r14d','r15d',
-    'ax','cx','dx','bx','sp','bp','si','di',
-    'r8w','r9w','r10w','r11w','r12w','r13w','r14w','r15w',
-    'al','cl','dl','bl','spl','bpl','sil','dil',
-    'r8b','r9b','r10b','r11b','r12b','r13b','r14b','r15b',
-    'ah','ch','bh','dh',
-    'cs','ds','es','ss','fs','gs',
-    'st','st(0)','st(1)','st(2)','st(3)','st(4)','st(5)','st(6)','st(7)',
-    'dr0','dr1','dr2','dr3','dr6','dr7',
-    'cr0','cr2','cr3','cr4',
-    'tr3','tr4','tr5','tr6','tr7',
-    'mm0','mm1','mm2','mm3','mm4','mm5','mm6','mm7',
-    'xmm0','xmm1','xmm2','xmm3','xmm4','xmm5','xmm6','xmm7',
-    'xmm8','xmm9','xmm10','xmm11','xmm12','xmm13','xmm14','xmm15');
-
 {*****************************************************************************
                                  Constants
 *****************************************************************************}
@@ -76,40 +53,27 @@ const
     const
       firstsaveintreg = RS_RAX;
       lastsaveintreg  = RS_R15;
-      firstsavefpureg = R_NO;
-      lastsavefpureg  = R_NO;
-      firstsavemmreg  = R_XMM0;
-      lastsavemmreg   = R_XMM15;
+      firstsavefpureg = RS_INVALID;
+      lastsavefpureg  = RS_INVALID;
+      firstsavemmreg  = RS_MM0;
+      lastsavemmreg   = RS_MM15;
 
-      general_registers = [R_EAX,R_EBX,R_ECX,R_EDX];
+      general_registers = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
       general_superregisters = [RS_RAX,RS_RBX,RS_RCX,RS_RDX];
 
-{$ifdef newra}
-      usableregsint = [first_imreg..last_imreg];
-{$else}
-      usableregsint = [RS_RAX,RS_RBX,RS_RCX,RS_RDX];
-{$endif}
+      usableregsint = [first_int_imreg..last_int_imreg];
       c_countusableregsint = 4;
 
-      maxaddrregs = 1;
-      addrregs    = [R_ESI];
-      usableregsaddr = [RS_RSI];
-      c_countusableregsaddr = 1;
+      maxaddrregs = 0;
+      usableregsaddr = [];
+      c_countusableregsaddr = 0;
 
       maxvarregs = 4;
-      varregs : array[1..maxvarregs] of Toldregister =
-         (R_EBX,R_EDX,R_ECX,R_EAX);
+      varregs : array[1..maxvarregs] of tsuperregister =
+         (RS_EBX,RS_EDX,RS_ECX,RS_EAX);
 
       maxfpuvarregs = 8;
 
-      {# Registers which are defined as scratch and no need to save across
-         routine calls or in assembler blocks.
-      }
-{$ifndef newra}
-      max_scratch_regs = 1;
-      scratch_regs : array[1..max_scratch_regs] of Tsuperregister = (RS_RDI);
-{$endif}
-
 {*****************************************************************************
                                GDB Information
 *****************************************************************************}
@@ -121,28 +85,8 @@ const
           (FIXED_REGISTERS) from GCC 3.x source code
 
       }
-      stab_regindex : array[firstreg..lastreg] of shortint =
-        (-1,
-        0,1,2,3,4,5,6,7, {!!!! FIX ME }
-        0,1,2,3,4,5,6,7,7, {!!!! FIX ME }
-
-        0,1,2,3,4,5,6,7,
-        0,1,2,3,4,5,6,7, {!!!! FIX ME }
-
-        0,1,2,3,4,5,6,7,
-        0,1,2,3,4,5,6,7, {!!!! FIX ME }
-
-        0,1,2,3,4,5,6,7,
-        0,1,2,3,4,5,6,7, {!!!! FIX ME }
-        0,1,2,3,
-        -1,-1,-1,-1,-1,-1,
-        12,12,13,14,15,16,17,18,19,
-        -1,-1,-1,-1,-1,-1,
-        -1,-1,-1,-1,
-        -1,-1,-1,-1,-1,
-        29,30,31,32,33,34,35,36,
-        21,22,23,24,25,26,27,28,
-        21,22,23,24,25,26,27,28
+      stab_regindex : array[tregisterindex] of shortint = (
+        {$i r8664stab.inc}
       );
 
 {*****************************************************************************
@@ -165,7 +109,6 @@ const
       {# Stack pointer register }
       NR_STACK_POINTER_REG = NR_RSP;
       {# Frame pointer register }
-      frame_pointer_reg = R_RBP;
       RS_FRAME_POINTER_REG = RS_EBP;
       NR_FRAME_POINTER_REG = NR_RBP;
       { Register for addressing absolute data in a position independant way,
@@ -180,8 +123,13 @@ const
       NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
       RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
 
-      fpu_result_reg = R_ST;
-      mmresultreg = R_MM0;
+      { WARNING: don't change to R_ST0!! See comments above implementation of }
+      { a_loadfpu* methods in rgcpu (JM)                                      }
+      NR_FPU_RESULT_REG = NR_ST;
+      NR_MM_RESULT_REG = NR_MM0;
+
+      { Offset where the parent framepointer is pushed }
+      PARENT_FRAMEPOINTER_OFFSET = 16;
 
 {*****************************************************************************
                        GCC /ABI linking information
@@ -195,7 +143,7 @@ const
         This value can be deduced from the CALLED_USED_REGISTERS array in the
         GCC source.
       }
-      std_saved_registers = [R_ESI,R_EDI,R_EBX];
+      std_saved_registers = [RS_ESI,RS_EDI,RS_EBX];
       { Required parameter alignment when calling a routine declared as
         stdcall and cdecl. The alignment value should be the one defined
         by GCC or the target ABI.
@@ -207,7 +155,10 @@ const
 
 {
   $Log$
-  Revision 1.6  2003-06-03 13:01:59  daniel
+  Revision 1.7  2003-09-24 17:12:02  florian
+    * several fixes for new reg allocator
+
+  Revision 1.6  2003/06/03 13:01:59  daniel
     * Register allocator finished
 
   Revision 1.5  2003/05/31 15:05:28  peter

compiler/x86_64/cpuinfo.pas

@@ -54,6 +54,17 @@ Type
       (no_processor,
        ClassDefault
       );
+
+   tfputype =
+     (no_fpuprocessor,
+      fpu_soft,
+      fpu_standard,
+      fpu_x87,
+      fpu_sse,
+      fpu_sse2,
+      fpu_sse3
+     );
+
 Const
    { Size of native extended type }
    extended_size = 10;
@@ -76,7 +87,10 @@ Implementation
 end.
 {
   $Log$
-  Revision 1.6  2003-01-05 13:36:54  florian
+  Revision 1.7  2003-09-24 17:12:02  florian
+    * several fixes for new reg allocator
+
+  Revision 1.6  2003/01/05 13:36:54  florian
     * x86-64 compiles
     + very basic support for float128 type (x86-64 only)
 

compiler/x86_64/r8664ari.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+2,
+1,
+3,
+17,
+16,
+30,
+29,
+18,
+7,
+6,
+81,
+82,
+83,
+84,
+69,
+8,
+12,
+26,
+25,
+11,
+75,
+76,
+77,
+78,
+79,
+80,
+70,
+13,
+4,
+31,
+19,
+9,
+27,
+14,
+71,
+23,
+35,
+73,
+74,
+99,
+100,
+101,
+102,
+103,
+104,
+105,
+106,
+45,
+46,
+48,
+47,
+49,
+50,
+52,
+51,
+53,
+54,
+56,
+55,
+57,
+58,
+60,
+59,
+61,
+62,
+64,
+63,
+65,
+66,
+68,
+67,
+37,
+38,
+40,
+39,
+41,
+42,
+44,
+43,
+5,
+32,
+20,
+10,
+28,
+15,
+24,
+36,
+22,
+21,
+34,
+33,
+72,
+98,
+90,
+91,
+92,
+93,
+94,
+95,
+96,
+97,
+85,
+86,
+87,
+88,
+89,
+107,
+108,
+117,
+118,
+119,
+120,
+121,
+122,
+109,
+110,
+111,
+112,
+113,
+114,
+115,
+116,
+0

compiler/x86_64/r8664att.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+'INVALID',
+'%al',
+'%ah',
+'%ax',
+'%eax',
+'%rax',
+'%cl',
+'%ch',
+'%cx',
+'%ecx',
+'%rcx',
+'%dl',
+'%dh',
+'%dx',
+'%edx',
+'%rdx',
+'%bl',
+'%bh',
+'%bx',
+'%ebx',
+'%rbx',
+'%sil',
+'%si',
+'%esi',
+'%rsi',
+'%dil',
+'%di',
+'%edi',
+'%rdi',
+'%bpl',
+'%bp',
+'%ebp',
+'%rbp',
+'%spl',
+'%sp',
+'%esp',
+'%rsp',
+'%r8',
+'%r8b',
+'%r8w',
+'%r8d',
+'%r9',
+'%r9b',
+'%r9w',
+'%r9d',
+'%r10',
+'%r10b',
+'%r10w',
+'%r10d',
+'%r11',
+'%r11b',
+'%r11w',
+'%r11d',
+'%r12',
+'%r12b',
+'%r12w',
+'%r12d',
+'%r13',
+'%r13b',
+'%r13w',
+'%r13d',
+'%r14',
+'%r14b',
+'%r14w',
+'%r14d',
+'%r15',
+'%r15b',
+'%r15w',
+'%r15d',
+'%cs',
+'%ds',
+'%es',
+'%ss',
+'%fs',
+'%gs',
+'%dr0',
+'%dr1',
+'%dr2',
+'%dr3',
+'%dr6',
+'%dr7',
+'%cr0',
+'%cr2',
+'%cr3',
+'%cr4',
+'%tr3',
+'%tr4',
+'%tr5',
+'%tr6',
+'%tr7',
+'%st(0)',
+'%st(1)',
+'%st(2)',
+'%st(3)',
+'%st(4)',
+'%st(5)',
+'%st(6)',
+'%st(7)',
+'%st',
+'%mm0',
+'%mm1',
+'%mm2',
+'%mm3',
+'%mm4',
+'%mm5',
+'%mm6',
+'%mm7',
+'%xmm0',
+'%xmm1',
+'%xmm2',
+'%xmm3',
+'%xmm4',
+'%xmm5',
+'%xmm6',
+'%xmm7',
+'%xmm8',
+'%xmm9',
+'%xmm10',
+'%xmm11',
+'%xmm12',
+'%xmm13',
+'%xmm14',
+'%xmm15'

compiler/x86_64/r8664con.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+NR_NO = $00000000;
+NR_AL = $01010000;
+NR_AH = $01020000;
+NR_AX = $01030000;
+NR_EAX = $01040000;
+NR_RAX = $01050000;
+NR_CL = $01010001;
+NR_CH = $01020001;
+NR_CX = $01030001;
+NR_ECX = $01040001;
+NR_RCX = $01050001;
+NR_DL = $01010002;
+NR_DH = $01020002;
+NR_DX = $01030002;
+NR_EDX = $01040002;
+NR_RDX = $01050002;
+NR_BL = $01010003;
+NR_BH = $01020003;
+NR_BX = $01030003;
+NR_EBX = $01040003;
+NR_RBX = $01050003;
+NR_SIL = $01010004;
+NR_SI = $01030004;
+NR_ESI = $01040004;
+NR_RSI = $01050004;
+NR_DIL = $01010005;
+NR_DI = $01030005;
+NR_EDI = $01040005;
+NR_RDI = $01050005;
+NR_BPL = $01010006;
+NR_BP = $01030006;
+NR_EBP = $01040006;
+NR_RBP = $01050006;
+NR_SPL = $01010007;
+NR_SP = $01030007;
+NR_ESP = $01040007;
+NR_RSP = $01050007;
+NR_R8 = $01050008;
+NR_R8L = $01010008;
+NR_R8W = $01030008;
+NR_R8D = $01040008;
+NR_R9 = $01050009;
+NR_R9L = $01010009;
+NR_R9W = $01030009;
+NR_R9D = $01040009;
+NR_R10 = $0105000a;
+NR_R10L = $0101000a;
+NR_R10W = $0103000a;
+NR_R10D = $0104000a;
+NR_R11 = $0105000b;
+NR_R11L = $0101000b;
+NR_R11W = $0103000b;
+NR_R11D = $0104000b;
+NR_R12 = $0105000c;
+NR_R12L = $0101000c;
+NR_R12W = $0103000c;
+NR_R12D = $0104000c;
+NR_R13 = $0105000d;
+NR_R13L = $0101000d;
+NR_R13W = $0103000d;
+NR_R13D = $0104000d;
+NR_R14 = $0105000e;
+NR_R14L = $0101000e;
+NR_R14W = $0103000e;
+NR_R14D = $0104000e;
+NR_R15 = $0105000f;
+NR_R15L = $0101000f;
+NR_R15W = $0103000f;
+NR_R15D = $0104000f;
+NR_CS = $05000001;
+NR_DS = $05000002;
+NR_ES = $05000003;
+NR_SS = $05000004;
+NR_FS = $05000005;
+NR_GS = $05000006;
+NR_DR0 = $05000007;
+NR_DR1 = $05000008;
+NR_DR2 = $05000009;
+NR_DR3 = $0500000a;
+NR_DR6 = $0500000b;
+NR_DR7 = $0500000c;
+NR_CR0 = $0500000d;
+NR_CR2 = $0500000e;
+NR_CR3 = $0500000f;
+NR_CR4 = $05000010;
+NR_TR3 = $05000011;
+NR_TR4 = $05000012;
+NR_TR5 = $05000013;
+NR_TR6 = $05000014;
+NR_TR7 = $05000015;
+NR_ST0 = $02000000;
+NR_ST1 = $02000001;
+NR_ST2 = $02000002;
+NR_ST3 = $02000003;
+NR_ST4 = $02000004;
+NR_ST5 = $02000005;
+NR_ST6 = $02000006;
+NR_ST7 = $02000007;
+NR_ST = $02000008;
+NR_MM0 = $03000000;
+NR_MM1 = $03000001;
+NR_MM2 = $03000002;
+NR_MM3 = $03000003;
+NR_MM4 = $03000004;
+NR_MM5 = $03000005;
+NR_MM6 = $03000006;
+NR_MM7 = $03000007;
+NR_XMM0 = $04000000;
+NR_XMM1 = $04000001;
+NR_XMM2 = $04000002;
+NR_XMM3 = $04000003;
+NR_XMM4 = $04000004;
+NR_XMM5 = $04000005;
+NR_XMM6 = $04000006;
+NR_XMM7 = $04000007;
+NR_XMM8 = $04000008;
+NR_XMM9 = $04000009;
+NR_XMM10 = $0400000a;
+NR_XMM11 = $0400000b;
+NR_XMM12 = $0400000c;
+NR_XMM13 = $0400000d;
+NR_XMM14 = $0400000e;
+NR_XMM15 = $0400000f;

compiler/x86_64/r8664nor.inc

@@ -0,0 +1,2 @@
+{ don't edit, this file is generated from x86reg.dat }
+123

compiler/x86_64/r8664num.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+$00000000,
+$01010000,
+$01020000,
+$01030000,
+$01040000,
+$01050000,
+$01010001,
+$01020001,
+$01030001,
+$01040001,
+$01050001,
+$01010002,
+$01020002,
+$01030002,
+$01040002,
+$01050002,
+$01010003,
+$01020003,
+$01030003,
+$01040003,
+$01050003,
+$01010004,
+$01030004,
+$01040004,
+$01050004,
+$01010005,
+$01030005,
+$01040005,
+$01050005,
+$01010006,
+$01030006,
+$01040006,
+$01050006,
+$01010007,
+$01030007,
+$01040007,
+$01050007,
+$01050008,
+$01010008,
+$01030008,
+$01040008,
+$01050009,
+$01010009,
+$01030009,
+$01040009,
+$0105000a,
+$0101000a,
+$0103000a,
+$0104000a,
+$0105000b,
+$0101000b,
+$0103000b,
+$0104000b,
+$0105000c,
+$0101000c,
+$0103000c,
+$0104000c,
+$0105000d,
+$0101000d,
+$0103000d,
+$0104000d,
+$0105000e,
+$0101000e,
+$0103000e,
+$0104000e,
+$0105000f,
+$0101000f,
+$0103000f,
+$0104000f,
+$05000001,
+$05000002,
+$05000003,
+$05000004,
+$05000005,
+$05000006,
+$05000007,
+$05000008,
+$05000009,
+$0500000a,
+$0500000b,
+$0500000c,
+$0500000d,
+$0500000e,
+$0500000f,
+$05000010,
+$05000011,
+$05000012,
+$05000013,
+$05000014,
+$05000015,
+$02000000,
+$02000001,
+$02000002,
+$02000003,
+$02000004,
+$02000005,
+$02000006,
+$02000007,
+$02000008,
+$03000000,
+$03000001,
+$03000002,
+$03000003,
+$03000004,
+$03000005,
+$03000006,
+$03000007,
+$04000000,
+$04000001,
+$04000002,
+$04000003,
+$04000004,
+$04000005,
+$04000006,
+$04000007,
+$04000008,
+$04000009,
+$0400000a,
+$0400000b,
+$0400000c,
+$0400000d,
+$0400000e,
+$0400000f

compiler/x86_64/r8664op.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+0,
+4,
+0,
+0,
+0,
+1,
+5,
+1,
+1,
+1,
+2,
+6,
+2,
+2,
+2,
+3,
+7,
+3,
+3,
+3,
+6,
+6,
+6,
+6,
+7,
+7,
+7,
+7,
+5,
+5,
+5,
+5,
+4,
+4,
+4,
+4,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+1,
+3,
+0,
+2,
+4,
+5,
+0,
+1,
+2,
+3,
+6,
+7,
+0,
+2,
+3,
+4,
+3,
+4,
+5,
+6,
+7,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+0,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7

compiler/x86_64/r8664ot.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+OT_NONE,
+OT_REG_AL,
+OT_REG8,
+OT_REG_AX,
+OT_REG_EAX,
+OT_REG_RAX,
+OT_REG_CL,
+OT_REG8,
+OT_REG_CX,
+OT_REG_ECX,
+OT_REG_RCX,
+OT_REG8,
+OT_REG8,
+OT_REG_DX,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG64,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG_CS,
+OT_REG_DESS,
+OT_REG_DESS,
+OT_REG_DESS,
+OT_REG_FSGS,
+OT_REG_FSGS,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_CREG,
+OT_REG_CREG,
+OT_REG_CREG,
+OT_REG_CR4,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_FPU0,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPU0,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG

compiler/x86_64/r8664rni.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+1,
+6,
+11,
+16,
+21,
+25,
+29,
+33,
+38,
+42,
+46,
+50,
+54,
+58,
+62,
+66,
+2,
+7,
+12,
+17,
+3,
+8,
+13,
+18,
+22,
+26,
+30,
+34,
+39,
+43,
+47,
+51,
+55,
+59,
+63,
+67,
+4,
+9,
+14,
+19,
+23,
+27,
+31,
+35,
+40,
+44,
+48,
+52,
+56,
+60,
+64,
+68,
+5,
+10,
+15,
+20,
+24,
+28,
+32,
+36,
+37,
+41,
+45,
+49,
+53,
+57,
+61,
+65,
+90,
+91,
+92,
+93,
+94,
+95,
+96,
+97,
+98,
+99,
+100,
+101,
+102,
+103,
+104,
+105,
+106,
+107,
+108,
+109,
+110,
+111,
+112,
+113,
+114,
+115,
+116,
+117,
+118,
+119,
+120,
+121,
+122,
+69,
+70,
+71,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80,
+81,
+82,
+83,
+84,
+85,
+86,
+87,
+88,
+89

compiler/x86_64/r8664sri.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+2,
+1,
+3,
+17,
+16,
+30,
+29,
+18,
+7,
+6,
+81,
+82,
+83,
+84,
+69,
+8,
+12,
+26,
+25,
+11,
+75,
+76,
+77,
+78,
+79,
+80,
+70,
+13,
+4,
+31,
+19,
+9,
+27,
+14,
+71,
+23,
+35,
+73,
+74,
+99,
+100,
+101,
+102,
+103,
+104,
+105,
+106,
+45,
+46,
+48,
+47,
+49,
+50,
+52,
+51,
+53,
+54,
+56,
+55,
+57,
+58,
+60,
+59,
+61,
+62,
+64,
+63,
+65,
+66,
+68,
+67,
+37,
+38,
+40,
+39,
+41,
+42,
+44,
+43,
+5,
+32,
+20,
+10,
+28,
+15,
+24,
+36,
+22,
+21,
+34,
+33,
+72,
+98,
+90,
+91,
+92,
+93,
+94,
+95,
+96,
+97,
+85,
+86,
+87,
+88,
+89,
+107,
+108,
+117,
+118,
+119,
+120,
+121,
+122,
+109,
+110,
+111,
+112,
+113,
+114,
+115,
+116

compiler/x86_64/r8664stab.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+-1,
+0,
+0,
+0,
+0,
+0,
+1,
+1,
+1,
+1,
+1,
+2,
+2,
+2,
+2,
+2,
+3,
+3,
+3,
+3,
+3,
+6,
+6,
+6,
+6,
+7,
+7,
+7,
+7,
+5,
+5,
+5,
+5,
+4,
+4,
+4,
+4,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+12,
+13,
+14,
+15,
+16,
+17,
+18,
+19,
+12,
+29,
+30,
+31,
+32,
+33,
+34,
+35,
+36,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1

compiler/x86_64/r8664std.inc

@@ -0,0 +1,124 @@
+{ don't edit, this file is generated from x86reg.dat }
+'INVALID',
+'al',
+'ah',
+'ax',
+'eax',
+'rax',
+'cl',
+'ch',
+'cx',
+'ecx',
+'rcx',
+'dl',
+'dh',
+'dx',
+'edx',
+'rdx',
+'bl',
+'bh',
+'bx',
+'ebx',
+'rbx',
+'sil',
+'si',
+'esi',
+'rsi',
+'dil',
+'di',
+'edi',
+'rdi',
+'bpl',
+'bp',
+'ebp',
+'rbp',
+'spl',
+'sp',
+'esp',
+'rsp',
+'r8',
+'r8b',
+'r8w',
+'r8d',
+'r9',
+'r9b',
+'r9w',
+'r9d',
+'r10',
+'r10b',
+'r10w',
+'r10d',
+'r11',
+'r11b',
+'r11w',
+'r11d',
+'r12',
+'r12b',
+'r12w',
+'r12d',
+'r13',
+'r13b',
+'r13w',
+'r13d',
+'r14',
+'r14b',
+'r14w',
+'r14d',
+'r15',
+'r15b',
+'r15w',
+'r15d',
+'cs',
+'ds',
+'es',
+'ss',
+'fs',
+'gs',
+'dr0',
+'dr1',
+'dr2',
+'dr3',
+'dr6',
+'dr7',
+'cr0',
+'cr2',
+'cr3',
+'cr4',
+'tr3',
+'tr4',
+'tr5',
+'tr6',
+'tr7',
+'st(0)',
+'st(1)',
+'st(2)',
+'st(3)',
+'st(4)',
+'st(5)',
+'st(6)',
+'st(7)',
+'st',
+'mm0',
+'mm1',
+'mm2',
+'mm3',
+'mm4',
+'mm5',
+'mm6',
+'mm7',
+'xmm0',
+'xmm1',
+'xmm2',
+'xmm3',
+'xmm4',
+'xmm5',
+'xmm6',
+'xmm7',
+'xmm8',
+'xmm9',
+'xmm10',
+'xmm11',
+'xmm12',
+'xmm13',
+'xmm14',
+'xmm15'

compiler/x86_64/rgcpu.pas

@@ -36,18 +36,10 @@ unit rgcpu;
 
     type
        trgcpu = class(trgobj)
+          fpuvaroffset : byte;
 
-          { to keep the same allocation order as with the old routines }
-          function getregisterint(list:Taasmoutput;size:Tcgsize):Tregister;override;
-{$ifndef newra}
-          procedure ungetregisterint(list:Taasmoutput;r:Tregister); override;
-          function getexplicitregisterint(list:Taasmoutput;r:Tnewregister):Tregister;override;
-{$endif newra}
-
-          function getregisterfpu(list: taasmoutput) : tregister; override;
-          procedure ungetregisterfpu(list: taasmoutput; r : tregister); override;
-
-          procedure ungetreference(list: taasmoutput; const ref : treference); override;
+          function getregisterfpu(list: taasmoutput;size:TCGSize) : tregister; override;
+          procedure ungetregisterfpu(list: taasmoutput; r : tregister;size:TCGSize); override;
 
           {# Returns a subset register of the register r with the specified size.
              WARNING: There is no clearing of the upper parts of the register,
@@ -56,12 +48,27 @@ unit rgcpu;
           }
           function makeregsize(reg: tregister; size: tcgsize): tregister; override;
 
+          { pushes and restores registers }
+{$ifdef SUPPORT_MMX}
+          procedure pushusedotherregisters(list:Taasmoutput;
+                                           var pushed:Tpushedsavedother;
+                                           const s:Totherregisterset);
+{$endif SUPPORT_MMX}
+{$ifdef SUPPORT_MMX}
+          procedure popusedotherregisters(list:Taasmoutput;
+                                          const pushed:Tpushedsavedother);
+{$endif SUPPORT_MMX}
+
+          procedure saveusedotherregisters(list:Taasmoutput;
+                                           var saved:Tpushedsavedother;
+                                           const s:Totherregisterset);override;
+          procedure restoreusedotherregisters(list:Taasmoutput;
+                                              const saved:Tpushedsavedother);override;
+
           procedure resetusableregisters;override;
 
          { corrects the fpu stack register by ofs }
          function correct_fpuregister(r : tregister;ofs : byte) : tregister;
-
-         fpuvaroffset : byte;
        end;
 
 
@@ -72,247 +79,116 @@ unit rgcpu;
        globals,verbose,
        tgobj;
 
-{************************************************************************}
-{                         routine helpers                                }
-{************************************************************************}
-
-  const
-    reg2reg64 : array[firstreg..lastreg] of toldregister = (R_NO,
-      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
-      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,R_RIP,
-      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
-      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,
-      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
-      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,
-      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
-      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
-    );
-
-    reg2reg32 : array[firstreg..lastreg] of toldregister = (R_NO,
-      R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
-      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,R_NO,
-      R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
-      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
-      R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
-      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
-      R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
-      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
-    );
-
-    reg2reg16 : array[firstreg..lastreg] of toldregister = (R_NO,
-      R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
-      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,R_NO,
-      R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
-      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
-      R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
-      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
-      R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
-      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
-    );
-
-    reg2reg8 : array[firstreg..lastreg] of toldregister = (R_NO,
-      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
-      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,R_NO,
-      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
-      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
-      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
-      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
-      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
-      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
-      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
-    );
-
-    { convert a register to a specfied register size }
-    function changeregsize(r:tregister;size:topsize):tregister;
-      var
-        reg : tregister;
+    function trgcpu.getregisterfpu(list: taasmoutput;size: TCGSize) : tregister;
+
       begin
-        case size of
-          S_B :
-            reg.enum:=reg2reg8[r.enum];
-          S_W :
-            reg.enum:=reg2reg16[r.enum];
-          S_L :
-            reg.enum:=reg2reg32[r.enum];
-          S_Q :
-            reg.enum:=reg2reg64[r.enum];
-          else
-            internalerror(200204101);
-        end;
-        if reg.enum=R_NO then
-         internalerror(200204102);
-        changeregsize:=reg;
+        { note: don't return R_ST0, see comments above implementation of }
+        { a_loadfpu_* methods in cgcpu (JM)                              }
+        result:=NR_ST;
       end;
 
 
-{************************************************************************}
-{                               trgcpu                                   }
-{************************************************************************}
+    procedure trgcpu.ungetregisterfpu(list : taasmoutput; r : tregister;size:TCGSize);
 
-    function trgcpu.getregisterint(list: taasmoutput;size:Tcgsize): tregister;
-    var subreg:Tsubregister;
+      begin
+        { nothing to do, fpu stack management is handled by the load/ }
+        { store operations in cgcpu (JM)                              }
+      end;
 
-    begin
-      subreg:=cgsize2subreg(size);
 
-      if countunusedregsint=0 then
-        internalerror(10);
-      result.enum:=R_INTREGISTER;
-{$ifdef TEMPREGDEBUG}
-      if curptree^.usableregsint-countunusedregsint>curptree^.registers32 then
-        internalerror(10);
-{$endif TEMPREGDEBUG}
-{$ifdef EXTTEMPREGDEBUG}
-      if curptree^.usableregs-countunusedregistersint>curptree^^.reallyusedregs then
-        curptree^.reallyusedregs:=curptree^^.usableregs-countunusedregistersint;
-{$endif EXTTEMPREGDEBUG}
-      if RS_RAX in unusedregsint then
-        begin
-          dec(countunusedregsint);
-          exclude(unusedregsint,RS_RAX);
-          include(used_in_proc_int,RS_RAX);
-          result.number:=RS_RAX shl 8 or subreg;
-{$ifdef TEMPREGDEBUG}
-          reg_user[R_RAX]:=curptree^;
-{$endif TEMPREGDEBUG}
-          exprasmlist.concat(tai_regalloc.alloc(result));
-        end
-      else if RS_RDX in unusedregsint then
-        begin
-          dec(countunusedregsint);
-          exclude(unusedregsint,RS_RDX);
-          include(used_in_proc_int,RS_RDX);
-          result.number:=RS_RDX shl 8 or subreg;
-{$ifdef TEMPREGDEBUG}
-          reg_user[R_RDX]:=curptree^;
-{$endif TEMPREGDEBUG}
-          exprasmlist.concat(tai_regalloc.alloc(result));
-        end
-      else if RS_RBX in unusedregsint then
-        begin
-          dec(countunusedregsint);
-          exclude(unusedregsint,RS_RBX);
-          include(used_in_proc_int,RS_RBX);
-          result.number:=RS_RBX shl 8 or subreg;
-{$ifdef TEMPREGDEBUG}
-          reg_user[R_RBX]:=curptree^;
-{$endif TEMPREGDEBUG}
-          exprasmlist.concat(tai_regalloc.alloc(result));
-        end
-      else if RS_RCX in unusedregsint then
+{$ifdef SUPPORT_MMX}
+    procedure trgcpu.pushusedotherregisters(list:Taasmoutput;
+                                            var pushed:Tpushedsavedother;
+                                            const s:Totherregisterset);
+
+{    var r:Toldregister;
+        r2:Tregister;
+        hr:Treference;}
+
+    begin
+(*      used_in_proc_other:=used_in_proc_other+s;
+      for r:=R_MM0 to R_MM6 do
         begin
-          dec(countunusedregsint);
-          exclude(unusedregsint,RS_RCX);
-          include(used_in_proc_int,RS_RCX);
-          result.number:=RS_RCX shl 8 or subreg;
-{$ifdef TEMPREGDEBUG}
-          reg_user[R_RCX]:=curptree^;
-{$endif TEMPREGDEBUG}
-          exprasmlist.concat(tai_regalloc.alloc(result));
-        end
-      else
-        internalerror(10);
+          pushed[r].pushed:=false;
+          { if the register is used by the calling subroutine    }
+          if not is_reg_var_other[r] and
+             (r in s) and
+             { and is present in use }
+             not(r in unusedregsmm) then
+            begin
+              r2.enum:=R_INTREGISTER;
+              r2.number:=NR_ESP;
+              list.concat(Taicpu.Op_const_reg(A_SUB,S_L,8,r2));
+              reference_reset_base(hr,r2,0);
+              r2.enum:=r;
+              list.concat(Taicpu.Op_reg_ref(A_MOVQ,S_NO,r2,hr));
+              include(unusedregsmm,r);
+              pushed[r].pushed:=true;
+            end;
+        end;*)
 {$ifdef TEMPREGDEBUG}
       testregisters;
 {$endif TEMPREGDEBUG}
     end;
+{$endif SUPPORT_MMX}
 
 
+{$ifdef SUPPORT_MMX}
+    procedure trgcpu.popusedotherregisters(list:Taasmoutput;
+                                           const pushed:Tpushedsavedother);
 
-    procedure trgcpu.ungetregisterint(list: taasmoutput; r : tregister);
-      var supreg:Tsuperregister;
-      begin
-         if r.enum=R_NO then
-          exit;
-         if r.enum<>R_INTREGISTER then
-            internalerror(200301234);
-         supreg:=r.number shr 8;
-         if (supreg in [RS_RDI]) then
-           begin
-             list.concat(tai_regalloc.DeAlloc(r));
-             exit;
-           end;
-         if not(supreg in [RS_RAX,RS_RBX,RS_RCX,RS_RDX,RS_RSI]) then
-           exit;
-         inherited ungetregisterint(list,r);
-      end;
-
-
-   function trgcpu.getexplicitregisterint(list: taasmoutput; r : tnewregister) : tregister;
-
-   var r2:Tregister;
+{    var r:Toldregister;
+        r2,r3:Tregister;
+        hr:Treference;}
 
     begin
-      if (r shr 8) in [RS_RDI] then
-        begin
-          r2.enum:=R_INTREGISTER;
-          r2.number:=r;
-          list.concat(Tai_regalloc.alloc(r2));
-          getexplicitregisterint:=r2;
-          exit;
-        end;
-      result:=inherited getexplicitregisterint(list,r);
+      { restore in reverse order: }
+{      for r:=R_MM6 downto R_MM0 do
+        if pushed[r].pushed then
+          begin
+            r2.enum:=R_INTREGISTER;
+            r2.number:=NR_ESP;
+            reference_reset_base(hr,r2,0);
+            r3.enum:=r;
+            list.concat(Taicpu.op_ref_reg(A_MOVQ,S_NO,hr,r3));
+            list.concat(Taicpu.op_const_reg(A_ADD,S_L,8,r2));
+            exclude(unusedregsmm,r);
+          end;}
+{$ifdef TEMPREGDEBUG}
+      testregisters;
+{$endif TEMPREGDEBUG}
     end;
+{$endif SUPPORT_MMX}
 
 
-    function trgcpu.getregisterfpu(list: taasmoutput) : tregister;
-
-      begin
-        { note: don't return R_ST0, see comments above implementation of }
-        { a_loadfpu_* methods in cgcpu (JM)                              }
-        result.enum := R_ST;
-      end;
 
+    procedure trgcpu.saveusedotherregisters(list:Taasmoutput;var saved:Tpushedsavedother;
+                                            const s:totherregisterset);
 
-    procedure trgcpu.ungetregisterfpu(list : taasmoutput; r : tregister);
+    begin
+{$ifdef SUPPORT_MMX}
+      if (aktoptprocessor in [class386,classP5]) or
+         (CS_LittleSize in aktglobalswitches) then
+        pushusedotherregisters(list,saved,s)
+      else
+{$endif SUPPORT_MMX}
+        inherited saveusedotherregisters(list,saved,s);
+    end;
 
-      begin
-        { nothing to do, fpu stack management is handled by the load/ }
-        { store operations in cgcpu (JM)                              }
-      end;
 
+    procedure trgcpu.restoreusedotherregisters(list:Taasmoutput;
+                                               const saved:tpushedsavedother);
 
-    procedure trgcpu.ungetreference(list: taasmoutput; const ref : treference);
+    begin
+{$ifdef SUPPORT_MMX}
+      if (aktoptprocessor in [class386,classP5]) or
+         (CS_LittleSize in aktglobalswitches) then
+        popusedotherregisters(list,saved)
+      else
+{$endif SUPPORT_MMX}
+        inherited restoreusedotherregisters(list,saved);
+    end;
 
-      begin
-         ungetregisterint(list,ref.base);
-         ungetregisterint(list,ref.index);
-      end;
 
    procedure trgcpu.resetusableregisters;
 
@@ -325,43 +201,30 @@ unit rgcpu;
    function trgcpu.correct_fpuregister(r : tregister;ofs : byte) : tregister;
 
      begin
-        correct_fpuregister.enum:=toldregister(longint(r.enum)+ofs);
+        correct_fpuregister:=r;
+        setsupreg(correct_fpuregister,ofs);
      end;
 
 
     function trgcpu.makeregsize(reg: tregister; size: tcgsize): tregister;
-
       var
-        _result : topsize;
+        subreg : tsubregister;
       begin
-        case size of
-          OS_32,OS_S32:
-            begin
-              _result := S_L;
-            end;
-          OS_8,OS_S8:
-            begin
-              _result := S_B;
-            end;
-          OS_16,OS_S16:
-            begin
-              _result := S_W;
-            end;
-          else
-            internalerror(2001092312);
-        end;
-        makeregsize := changeregsize(reg,_result);
+        if getregtype(reg)<>R_INTREGISTER then
+          internalerror(200306032);
+        subreg:=cgsize2subreg(size);
+        result:=reg;
+        setsubreg(result,subreg);
+        add_constraints(result);
       end;
 
-
-
-initialization
-  rg := trgcpu.create(15);
 end.
-
 {
   $Log$
-  Revision 1.5  2003-06-13 21:19:33  peter
+  Revision 1.6  2003-09-24 17:12:02  florian
+    * several fixes for new reg allocator
+
+  Revision 1.5  2003/06/13 21:19:33  peter
     * current_procdef removed, use current_procinfo.procdef instead
 
   Revision 1.4  2002/04/25 20:15:40  florian