Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).

Add missing fields to other elf targets.

git-svn-id: branches/laksen/armiw@29286 -

compiler/arm/aasmcpu.pas

@@ -2994,7 +2994,7 @@ implementation
                     end
                   else
                     begin
-                      offset:=(((currsym.offset-insoffset-8) shr 2) and $ffffff);
+                      offset:=((currsym.offset-insoffset-8) and $3fffffe);
                       bytes:=bytes or ((offset shr 2) and $ffffff);
                       bytes:=bytes or ((offset shr 1) and $1) shl 24;
                     end;

compiler/arm/armins.dat

@@ -121,8 +121,8 @@ imm24                    \x1\x0B                        ARM32,ARMv4
 mem32                    \x1\x0B                        ARM32,ARMv4
 
 [BLX]
-imm24                    \x28\xA                       ARM32,ARMv5T
-mem32                    \x28\xA                       ARM32,ARMv5T
+imm24                    \x28\xFA                       ARM32,ARMv5T
+mem32                    \x28\xFA                       ARM32,ARMv5T
 reg32                    \3\x01\x2F\xFF\x30            ARM32,ARMv5T
 
 [BKPTcc]
@@ -1116,4 +1116,4 @@ void                 void                          none
 
 [LGNcc]
 
-[LOGcc]
+[LOGcc]

compiler/arm/armtab.inc

@@ -130,14 +130,14 @@
     opcode  : A_BLX;
     ops     : 1;
     optypes : (ot_immediate24,ot_none,ot_none,ot_none,ot_none,ot_none);
-    code    : #40#10;
+    code    : #40#250;
     flags   : if_arm32 or if_armv5t
   ),
   (
     opcode  : A_BLX;
     ops     : 1;
     optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none,ot_none,ot_none);
-    code    : #40#10;
+    code    : #40#250;
     flags   : if_arm32 or if_armv5t
   ),
   (

compiler/i386/cpuelf.pas

@@ -496,6 +496,7 @@ implementation
         encodereloc:       @elf_i386_encodeReloc;
         loadreloc:         @elf_i386_loadReloc;
         loadsection:       nil;
+        encodeflags:       nil;
       );
 
     as_i386_elf32_info : tasminfo =

compiler/mips/cpuelf.pas

@@ -1026,6 +1026,7 @@ implementation
         encodereloc:       @elf_mips_encodeReloc;
         loadreloc:         @elf_mips_loadReloc;
         loadsection:       @elf_mips_loadSection;
+        encodeflags:       nil;
       );
 
 initialization

compiler/ogelf.pas

@@ -1274,7 +1274,8 @@ implementation
            header.e_shnum:=nsections;
            header.e_ehsize:=sizeof(telfheader);
            header.e_shentsize:=sizeof(telfsechdr);
-           header.e_flags:=ElfTarget.encodeflags();
+           if assigned(ElfTarget.encodeflags) then
+             header.e_flags:=ElfTarget.encodeflags();
            MaybeSwapHeader(header);
            writer.write(header,sizeof(header));
            writer.writezeros($40-sizeof(header)); { align }
@@ -2046,7 +2047,8 @@ implementation
         header.e_shnum:=ExeSectionList.Count+1;
         header.e_phnum:=segmentlist.count;
         header.e_ehsize:=sizeof(telfheader);
-        header.e_flags:=ElfTarget.encodeflags();
+        if assigned(ElfTarget.encodeflags) then
+          header.e_flags:=ElfTarget.encodeflags();
         if assigned(EntrySym) then
           header.e_entry:=EntrySym.Address;
         header.e_shentsize:=sizeof(telfsechdr);

compiler/sparc/cpuelf.pas

@@ -114,6 +114,7 @@ implementation
         encodereloc:       @elf_sparc_encodeReloc;
         loadreloc:         @elf_sparc_loadReloc;
         loadsection:       nil;
+        encodeflags:       nil;
       );
 
     as_sparc_elf32_info : tasminfo =

compiler/x86_64/cpuelf.pas

@@ -664,6 +664,7 @@ implementation
         encodereloc:       @elf_x86_64_encodeReloc;
         loadreloc:         @elf_x86_64_loadReloc;
         loadsection:       nil;
+        encodeflags:       nil;
       );