* Patch by J. Gareth "Kit" Moreton (issue #39343). Added missing allocation

  of flags in tx86typeconvnode.second_int_to_bool and in generic
  tcgtypeconvnode.second_int_to_bool. This fixes random failures of the
  tcnvint1 test and some other tests when compiled with -O2.

compiler/ncgcnv.pas

@@ -237,11 +237,13 @@ interface
                  cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.reference,hregister);
                  href:=left.location.reference;
                  inc(href.offset,4);
+                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                  cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,href,hregister);
                end
               else
                begin
                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
+                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                  cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
                end;
             end;
@@ -256,11 +258,13 @@ interface
                begin
                  hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
                  cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
+                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                  cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
                end
               else
 {$endif not cpu64bitalu and not cpuhighleveltarget}
                begin
+                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                  cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
                end;
             end;
@@ -274,6 +278,7 @@ interface
               cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
               cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,hregister);
               cg.a_label(current_asmdata.CurrAsmList,hlabel);
+              cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
               cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,hregister,hregister);
             end;
           else

compiler/x86/nx86cnv.pas

@@ -120,6 +120,7 @@ implementation
             LOC_CREFERENCE,
             LOC_REFERENCE :
               begin
+                cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
 {$ifndef cpu64bitalu}
                 if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
                  begin
@@ -145,6 +146,7 @@ implementation
               end;
             LOC_REGISTER,LOC_CREGISTER :
               begin
+                cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
 {$if defined(cpu32bitalu)}
                 if left.location.size in [OS_64,OS_S64] then
                  begin
@@ -196,6 +198,7 @@ implementation
                 begin
                   hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
                   cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
+                  cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                   if (is_cbool(resultdef)) then
                     cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
                   location.register64.reglo:=hreg2;
@@ -212,6 +215,7 @@ implementation
                begin
                  location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
                  cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
+                 cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                  if (is_cbool(resultdef)) then
                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
                end