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@@ -1,234 +1,234 @@
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-@---------------------------------------------------------------------------------
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- .section ".init"
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- .global _start
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-@---------------------------------------------------------------------------------
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- .align 4
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- .arm
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-@---------------------------------------------------------------------------------
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-_start:
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-@---------------------------------------------------------------------------------
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- mov r0, #0x04000000 @ IME = 0;
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- str r0, [r0, #0x208]
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-
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-@---------------------------------------------------------------------------------
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-@ turn the power on for M3
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-@---------------------------------------------------------------------------------
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- ldr r1, =0x8203
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- add r0,r0,#0x304
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- strh r1, [r0]
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-
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- ldr r1, =0x00002078 @ disable TCM and protection unit
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- mcr p15, 0, r1, c1, c0
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-
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-@---------------------------------------------------------------------------------
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-@ Protection Unit Setup added by Sasq
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-@---------------------------------------------------------------------------------
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- @ Disable cache
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- mov r0, #0
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- mcr p15, 0, r0, c7, c5, 0 @ Instruction cache
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- mcr p15, 0, r0, c7, c6, 0 @ Data cache
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-
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- @ Wait for write buffer to empty
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- mcr p15, 0, r0, c7, c10, 4
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-
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- ldr r0, =__dtcm_start
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- orr r0,r0,#0x0a
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- mcr p15, 0, r0, c9, c1,0 @ DTCM base = __dtcm_start, size = 16 KB
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-
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- mov r0,#0x20
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- mcr p15, 0, r0, c9, c1,1 @ ITCM base = 0 , size = 32 MB
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-
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-@---------------------------------------------------------------------------------
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-@ Setup memory regions similar to Release Version
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-@---------------------------------------------------------------------------------
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-
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- @-------------------------------------------------------------------------
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- @ Region 0 - IO registers
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- @-------------------------------------------------------------------------
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- ldr r0,=( (0b11001 << 1) | 0x04000000 | 1)
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- mcr p15, 0, r0, c6, c0, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 1 - Main Memory
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- @-------------------------------------------------------------------------
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- ldr r0,=( (0b10101 << 1) | 0x02000000 | 1)
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- mcr p15, 0, r0, c6, c1, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 2 - iwram
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- @-------------------------------------------------------------------------
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- ldr r0,=( (0b01110 << 1) | 0x037F8000 | 1)
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- mcr p15, 0, r0, c6, c2, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 3 - DS Accessory (GBA Cart)
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- @-------------------------------------------------------------------------
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- ldr r0,=( (0b11010 << 1) | 0x08000000 | 1)
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- mcr p15, 0, r0, c6, c3, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 4 - DTCM
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- @-------------------------------------------------------------------------
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- ldr r0,=__dtcm_start
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- orr r0,r0,#((0b01101 << 1) | 1)
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- mcr p15, 0, r0, c6, c4, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 5 - ITCM
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- @-------------------------------------------------------------------------
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- ldr r0,=__itcm_start
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- orr r0,r0,#((0b01110 << 1) | 1)
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- mcr p15, 0, r0, c6, c5, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 6 - System ROM
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- @-------------------------------------------------------------------------
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- ldr r0,=( (0b01110 << 1) | 0xFFFF0000 | 1)
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- mcr p15, 0, r0, c6, c6, 0
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-
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- @-------------------------------------------------------------------------
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- @ Region 7 - non cacheable main ram
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- @-------------------------------------------------------------------------
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- ldr r0,=( (0b10101 << 1) | 0x02400000 | 1)
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- mcr p15, 0, r0, c6, c7, 0
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-
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- @-------------------------------------------------------------------------
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- @ Write buffer enable
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- @-------------------------------------------------------------------------
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- ldr r0,=0b00000110
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- mcr p15, 0, r0, c3, c0, 0
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-
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- @-------------------------------------------------------------------------
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- @ DCache & ICache enable
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- @-------------------------------------------------------------------------
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- ldr r0,=0b01000010
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-
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- mcr p15, 0, r0, c2, c0, 0
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- mcr p15, 0, r0, c2, c0, 1
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-
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- @-------------------------------------------------------------------------
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- @ IAccess
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- @-------------------------------------------------------------------------
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- ldr r0,=0x36636333
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- mcr p15, 0, r0, c5, c0, 3
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-
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- @-------------------------------------------------------------------------
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- @ DAccess
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- @-------------------------------------------------------------------------
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- ldr r0,=0x36333333
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- mcr p15, 0, r0, c5, c0, 2
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-
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- @-------------------------------------------------------------------------
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- @ Enable ICache, DCache, ITCM & DTCM
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- @-------------------------------------------------------------------------
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- mrc p15, 0, r0, c1, c0, 0
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- ldr r1,= (1<<18) | (1<<16) | (1<<12) | (1<<2) | (1<<0)
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- orr r0,r0,r1
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- mcr p15, 0, r0, c1, c0, 0
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-
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- mov r0, #0x12 @ Switch to IRQ Mode
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- msr cpsr, r0
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- ldr sp, =__sp_irq @ Set IRQ stack
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-
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- mov r0, #0x13 @ Switch to SVC Mode
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- msr cpsr, r0
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- ldr sp, =__sp_svc @ Set SVC stack
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-
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- mov r0, #0x1F @ Switch to System Mode
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- msr cpsr, r0
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- ldr sp, =__sp_usr @ Set user stack
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-
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- ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA (ROM to RAM)
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- ldr r2, =__itcm_start
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- ldr r4, =__itcm_end
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- bl CopyMemCheck
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-
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- ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA (ROM to RAM)
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- ldr r2, =__dtcm_start
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- ldr r4, =__dtcm_end
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- bl CopyMemCheck
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-
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- ldr r0, =__bss_start @ Clear BSS section
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- ldr r1, =__bss_end
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- sub r1, r1, r0
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- bl ClearMem
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-
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- ldr r0, =__sbss_start @ Clear SBSS section
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- ldr r1, =__sbss_end
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- sub r1, r1, r0
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- bl ClearMem
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-
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- ldr r1, =fake_heap_end @ set heap end
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- ldr r0, =__eheap_end
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- str r0, [r1]
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-
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- mov r0, #0 @ int argc
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- mov r1, #0 @ char *argv[]
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- ldr r3, =main
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- bx r3
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- nop
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-
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- @ If the user ever returns, go to an infinte loop
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- ldr r0, =ILoop
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- ldr r0, [r0]
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- ldr r1, =0x027FFE78
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- str r0, [r1]
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- bx r1
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-ILoop:
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- b ILoop
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-
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-
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-@---------------------------------------------------------------------------------
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-@---------------------------------------------------------------------------------
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-@ Clear memory to 0x00 if length != 0
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-@ r0 = Start Address
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-@ r1 = Length
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-@---------------------------------------------------------------------------------
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-ClearMem:
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-@---------------------------------------------------------------------------------
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- mov r2, #3 @ Round down to nearest word boundary
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- add r1, r1, r2 @ Shouldn't be needed
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- bics r1, r1, r2 @ Clear 2 LSB (and set Z)
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- bxeq lr @ Quit if copy size is 0
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-
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- mov r2, #0
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-ClrLoop:
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- stmia r0!, {r2}
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- subs r1, r1, #4
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- bne ClrLoop
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-
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- bx lr
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-
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-@---------------------------------------------------------------------------------
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-@ Copy memory if length != 0
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-@ r1 = Source Address
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-@ r2 = Dest Address
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-@ r4 = Dest Address + Length
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-@---------------------------------------------------------------------------------
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-CopyMemCheck:
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-@---------------------------------------------------------------------------------
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- sub r3, r4, r2 @ Is there any data to copy?
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-@---------------------------------------------------------------------------------
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-@ Copy memory
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-@ r1 = Source Address
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-@ r2 = Dest Address
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-@ r3 = Length
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-@---------------------------------------------------------------------------------
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-CopyMem:
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-@---------------------------------------------------------------------------------
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- mov r0, #3 @ These commands are used in cases where
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- add r3, r3, r0 @ the length is not a multiple of 4,
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- bics r3, r3, r0 @ even though it should be.
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- bxeq lr @ Length is zero, so exit
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-CIDLoop:
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- ldmia r1!, {r0}
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- stmia r2!, {r0}
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- subs r3, r3, #4
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- bne CIDLoop
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-
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- bx lr
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-@---------------------------------------------------------------------------------
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- .align
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- .pool
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- .end
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-@---------------------------------------------------------------------------------
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+@---------------------------------------------------------------------------------
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+ .section ".init"
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+ .global _start
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+@---------------------------------------------------------------------------------
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+ .align 4
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+ .arm
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+@---------------------------------------------------------------------------------
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+_start:
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+@---------------------------------------------------------------------------------
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+ mov r0, #0x04000000 @ IME = 0;
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+ str r0, [r0, #0x208]
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+
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+@---------------------------------------------------------------------------------
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+@ turn the power on for M3
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+@---------------------------------------------------------------------------------
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+ ldr r1, =0x8203
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+ add r0,r0,#0x304
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+ strh r1, [r0]
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+
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+ ldr r1, =0x00002078 @ disable TCM and protection unit
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+ mcr p15, 0, r1, c1, c0
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+
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+@---------------------------------------------------------------------------------
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+@ Protection Unit Setup added by Sasq
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+@---------------------------------------------------------------------------------
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+ @ Disable cache
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+ mov r0, #0
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+ mcr p15, 0, r0, c7, c5, 0 @ Instruction cache
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+ mcr p15, 0, r0, c7, c6, 0 @ Data cache
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+
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+ @ Wait for write buffer to empty
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+ mcr p15, 0, r0, c7, c10, 4
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+
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+ ldr r0, =__dtcm_start
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+ orr r0,r0,#0x0a
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+ mcr p15, 0, r0, c9, c1,0 @ DTCM base = __dtcm_start, size = 16 KB
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+
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+ mov r0,#0x20
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+ mcr p15, 0, r0, c9, c1,1 @ ITCM base = 0 , size = 32 MB
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+
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+@---------------------------------------------------------------------------------
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+@ Setup memory regions similar to Release Version
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+@---------------------------------------------------------------------------------
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 0 - IO registers
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+ @-------------------------------------------------------------------------
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+ ldr r0,=( (0b11001 << 1) | 0x04000000 | 1)
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+ mcr p15, 0, r0, c6, c0, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 1 - Main Memory
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+ @-------------------------------------------------------------------------
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+ ldr r0,=( (0b10101 << 1) | 0x02000000 | 1)
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+ mcr p15, 0, r0, c6, c1, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 2 - iwram
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+ @-------------------------------------------------------------------------
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+ ldr r0,=( (0b01110 << 1) | 0x037F8000 | 1)
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+ mcr p15, 0, r0, c6, c2, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 3 - DS Accessory (GBA Cart)
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+ @-------------------------------------------------------------------------
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+ ldr r0,=( (0b11010 << 1) | 0x08000000 | 1)
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+ mcr p15, 0, r0, c6, c3, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 4 - DTCM
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+ @-------------------------------------------------------------------------
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+ ldr r0,=__dtcm_start
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+ orr r0,r0,#((0b01101 << 1) | 1)
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+ mcr p15, 0, r0, c6, c4, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 5 - ITCM
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+ @-------------------------------------------------------------------------
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+ ldr r0,=__itcm_start
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+ orr r0,r0,#((0b01110 << 1) | 1)
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+ mcr p15, 0, r0, c6, c5, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 6 - System ROM
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+ @-------------------------------------------------------------------------
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+ ldr r0,=( (0b01110 << 1) | 0xFFFF0000 | 1)
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+ mcr p15, 0, r0, c6, c6, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Region 7 - non cacheable main ram
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+ @-------------------------------------------------------------------------
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+ ldr r0,=( (0b10101 << 1) | 0x02400000 | 1)
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+ mcr p15, 0, r0, c6, c7, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ Write buffer enable
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+ @-------------------------------------------------------------------------
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+ ldr r0,=0b00000110
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+ mcr p15, 0, r0, c3, c0, 0
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+
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+ @-------------------------------------------------------------------------
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+ @ DCache & ICache enable
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+ @-------------------------------------------------------------------------
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+ ldr r0,=0b01000010
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+
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+ mcr p15, 0, r0, c2, c0, 0
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+ mcr p15, 0, r0, c2, c0, 1
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+
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+ @-------------------------------------------------------------------------
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+ @ IAccess
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+ @-------------------------------------------------------------------------
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+ ldr r0,=0x36636333
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+ mcr p15, 0, r0, c5, c0, 3
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+
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+ @-------------------------------------------------------------------------
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+ @ DAccess
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+ @-------------------------------------------------------------------------
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+ ldr r0,=0x36333333
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+ mcr p15, 0, r0, c5, c0, 2
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+
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+ @-------------------------------------------------------------------------
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+ @ Enable ICache, DCache, ITCM & DTCM
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+ @-------------------------------------------------------------------------
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+ mrc p15, 0, r0, c1, c0, 0
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+ ldr r1,= (1<<18) | (1<<16) | (1<<12) | (1<<2) | (1<<0)
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+ orr r0,r0,r1
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+ mcr p15, 0, r0, c1, c0, 0
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+
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+ mov r0, #0x12 @ Switch to IRQ Mode
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+ msr cpsr, r0
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+ ldr sp, =__sp_irq @ Set IRQ stack
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+
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+ mov r0, #0x13 @ Switch to SVC Mode
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+ msr cpsr, r0
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+ ldr sp, =__sp_svc @ Set SVC stack
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+
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+ mov r0, #0x1F @ Switch to System Mode
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+ msr cpsr, r0
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+ ldr sp, =__sp_usr @ Set user stack
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+
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+ ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA (ROM to RAM)
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+ ldr r2, =__itcm_start
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+ ldr r4, =__itcm_end
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+ bl CopyMemCheck
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+
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+ ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA (ROM to RAM)
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+ ldr r2, =__dtcm_start
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+ ldr r4, =__dtcm_end
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+ bl CopyMemCheck
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+
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+ ldr r0, =__bss_start @ Clear BSS section
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+ ldr r1, =__bss_end
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+ sub r1, r1, r0
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+ bl ClearMem
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+
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+ ldr r0, =__sbss_start @ Clear SBSS section
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+ ldr r1, =__sbss_end
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+ sub r1, r1, r0
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+ bl ClearMem
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+
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+ ldr r1, =fake_heap_end @ set heap end
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+ ldr r0, =__eheap_end
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+ str r0, [r1]
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+
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+ mov r0, #0 @ int argc
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+ mov r1, #0 @ char *argv[]
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+ ldr r3, =main
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+ bx r3
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+ nop
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+
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+ @ If the user ever returns, go to an infinte loop
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+ ldr r0, =ILoop
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+ ldr r0, [r0]
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+ ldr r1, =0x027FFE78
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+ str r0, [r1]
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+ bx r1
|
|
|
+ILoop:
|
|
|
+ b ILoop
|
|
|
+
|
|
|
+
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+@ Clear memory to 0x00 if length != 0
|
|
|
+@ r0 = Start Address
|
|
|
+@ r1 = Length
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+ClearMem:
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+ mov r2, #3 @ Round down to nearest word boundary
|
|
|
+ add r1, r1, r2 @ Shouldn't be needed
|
|
|
+ bics r1, r1, r2 @ Clear 2 LSB (and set Z)
|
|
|
+ bxeq lr @ Quit if copy size is 0
|
|
|
+
|
|
|
+ mov r2, #0
|
|
|
+ClrLoop:
|
|
|
+ stmia r0!, {r2}
|
|
|
+ subs r1, r1, #4
|
|
|
+ bne ClrLoop
|
|
|
+
|
|
|
+ bx lr
|
|
|
+
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+@ Copy memory if length != 0
|
|
|
+@ r1 = Source Address
|
|
|
+@ r2 = Dest Address
|
|
|
+@ r4 = Dest Address + Length
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+CopyMemCheck:
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+ sub r3, r4, r2 @ Is there any data to copy?
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+@ Copy memory
|
|
|
+@ r1 = Source Address
|
|
|
+@ r2 = Dest Address
|
|
|
+@ r3 = Length
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+CopyMem:
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+ mov r0, #3 @ These commands are used in cases where
|
|
|
+ add r3, r3, r0 @ the length is not a multiple of 4,
|
|
|
+ bics r3, r3, r0 @ even though it should be.
|
|
|
+ bxeq lr @ Length is zero, so exit
|
|
|
+CIDLoop:
|
|
|
+ ldmia r1!, {r0}
|
|
|
+ stmia r2!, {r0}
|
|
|
+ subs r3, r3, #4
|
|
|
+ bne CIDLoop
|
|
|
+
|
|
|
+ bx lr
|
|
|
+@---------------------------------------------------------------------------------
|
|
|
+ .align
|
|
|
+ .pool
|
|
|
+ .end
|
|
|
+@---------------------------------------------------------------------------------
|