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@@ -962,74 +962,86 @@ procedure TCgSparc.g_overflowCheck(List:TAasmOutput;const p:TNode);
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a_call_name(list,'FPC_OVERFLOW');
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a_call_name(list,'FPC_OVERFLOW');
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a_label(list,hl);
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a_label(list,hl);
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end;
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end;
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+
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{ *********** entry/exit code and address loading ************ }
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{ *********** entry/exit code and address loading ************ }
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procedure TCgSparc.g_stackframe_entry(list:TAasmOutput;LocalSize:LongInt);
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procedure TCgSparc.g_stackframe_entry(list:TAasmOutput;LocalSize:LongInt);
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var
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var
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- href:TReference;
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- r:Tregister;
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- i:integer;
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- again:tasmlabel;
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+ r : tregister;
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begin
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begin
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-{Althogh the SPARC architecture require only word alignment, software
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-convention and the operating system require every stack frame to be double word
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-aligned}
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- LocalSize:=(LocalSize+7)and $FFFFFFF8;
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-{Execute the SAVE instruction to get a new register window and create a new
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-stack frame. In the "SAVE %i6,size,%i6" the first %i6 is related to the state
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-before execution of the SAVE instrucion so it is the caller %i6, when the %i6
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-after execution of that instruction is the called function stack pointer}
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- r.enum:=stack_pointer_reg;
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- with list do
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- concat(Taicpu.Op_reg_const_reg(A_SAVE,r,-LocalSize,r));
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+ { Althogh the SPARC architecture require only word alignment, software
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+ convention and the operating system require every stack frame to be double word
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+ aligned }
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+ LocalSize:=align(LocalSize,8);
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+ { Execute the SAVE instruction to get a new register window and create a new
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+ stack frame. In the "SAVE %i6,size,%i6" the first %i6 is related to the state
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+ before execution of the SAVE instrucion so it is the caller %i6, when the %i6
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+ after execution of that instruction is the called function stack pointer}
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+ r.enum:=R_INTREGISTER;
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+ r.number:=NR_STACK_POINTER_REG;
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+ list.concat(Taicpu.Op_reg_const_reg(A_SAVE,r,-LocalSize,r));
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end;
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end;
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+
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+
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procedure TCgSparc.g_restore_all_registers(list:TaasmOutput;accused,acchiused:boolean);
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procedure TCgSparc.g_restore_all_registers(list:TaasmOutput;accused,acchiused:boolean);
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begin
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begin
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- {$warning FIX ME TCgSparc.g_restore_all_registers}
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+ { The sparc port uses the sparc standard calling convetions so this function has no used }
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end;
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end;
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+
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+
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procedure TCgSparc.g_restore_frame_pointer(list:TAasmOutput);
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procedure TCgSparc.g_restore_frame_pointer(list:TAasmOutput);
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begin
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begin
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-{This function intontionally does nothing as frame pointer is restored in the
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-delay slot of the return instrucion done in g_return_from_proc}
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+ { This function intontionally does nothing as frame pointer is restored in the
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+ delay slot of the return instrucion done in g_return_from_proc}
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end;
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end;
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+
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+
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procedure TCgSparc.g_restore_standard_registers(list:taasmoutput;usedinproc:Tsupregset);
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procedure TCgSparc.g_restore_standard_registers(list:taasmoutput;usedinproc:Tsupregset);
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begin
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begin
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- {$WARNING FIX ME TCgSparc.g_restore_standard_registers}
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+ { The sparc port uses the sparc standard calling convetions so this function has no used }
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end;
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end;
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-procedure TCgSparc.g_return_from_proc(list:TAasmOutput;parasize:aword);
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-var r,r2:Tregister;
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+procedure TCgSparc.g_return_from_proc(list:TAasmOutput;parasize:aword);
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+ var
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+ r,r2:Tregister;
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begin
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begin
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-{According to the SPARC ABI, the stack is cleared using the RESTORE instruction
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-which is genereted in the g_restore_frame_pointer. Notice that SPARC has no
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-RETURN instruction and that JMPL is used instead. The JMPL instrucion have one
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-delay slot, so an inversion is possible such as
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- JMPL %i7+8,%g0
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- RESTORE %g0,0,%g0
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-If no inversion we can use just
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- RESTORE %g0,0,%g0
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- JMPL %i7+8,%g0
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- NOP}
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+ { According to the SPARC ABI, the stack is cleared using the RESTORE instruction
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+ which is genereted in the g_restore_frame_pointer. Notice that SPARC has no
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+ RETURN instruction and that JMPL is used instead. The JMPL instrucion have one
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+ delay slot, so an inversion is possible such as
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+ JMPL %i7+8,%g0
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+ RESTORE %g0,0,%g0
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+ If no inversion we can use just
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+ RESTORE %g0,0,%g0
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+ JMPL %i7+8,%g0
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+ NOP
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+ }
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with list do
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with list do
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begin
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begin
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-{Return address is computed by adding 8 to the CALL address saved onto %i6}
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+ { Return address is computed by adding 8 to the CALL address saved onto %i6}
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r.enum:=R_G0;
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r.enum:=R_G0;
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r2.enum:=R_I7;
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r2.enum:=R_I7;
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concat(Taicpu.Op_caddr_reg(A_JMPL,r,8,r));
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concat(Taicpu.Op_caddr_reg(A_JMPL,r,8,r));
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-{We use trivial restore in the delay slot of the JMPL instruction, as we
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-already set result onto %i0}
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+ { We use trivial restore in the delay slot of the JMPL instruction, as we
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+ already set result onto %i0 }
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concat(Taicpu.Op_reg_const_reg(A_RESTORE,r,0,r));
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concat(Taicpu.Op_reg_const_reg(A_RESTORE,r,0,r));
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- end
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+ end
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end;
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end;
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+
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+
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procedure TCgSparc.g_save_all_registers(list : taasmoutput);
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procedure TCgSparc.g_save_all_registers(list : taasmoutput);
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begin
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begin
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- {$warning FIX ME TCgSparc.g_save_all_registers}
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+ { The sparc port uses the sparc standard calling convetions so this function has no used }
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end;
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end;
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+
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+
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procedure TCgSparc.g_save_standard_registers(list : taasmoutput; usedinproc:Tsupregset);
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procedure TCgSparc.g_save_standard_registers(list : taasmoutput; usedinproc:Tsupregset);
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begin
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begin
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- {$warning FIX ME tcgppc.g_save_standard_registers}
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+ { The sparc port uses the sparc standard calling convetions so this function has no used }
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end;
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end;
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+
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+
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procedure TCgSparc.a_loadaddr_ref_reg(list:TAasmOutput;CONST ref:TReference;r:tregister);
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procedure TCgSparc.a_loadaddr_ref_reg(list:TAasmOutput;CONST ref:TReference;r:tregister);
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begin
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begin
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@@ -1449,7 +1461,11 @@ BEGIN
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END.
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END.
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{
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{
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$Log$
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$Log$
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- Revision 1.49 2003-05-22 16:11:22 florian
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+ Revision 1.50 2003-05-23 22:33:48 florian
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+ * fix some small flaws which prevent sparc linux system unit from compiling
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+ * some reformatting done
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+
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+ Revision 1.49 2003/05/22 16:11:22 florian
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* fixed sparc compilation partially
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* fixed sparc compilation partially
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Revision 1.48 2003/05/07 15:04:30 mazen
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Revision 1.48 2003/05/07 15:04:30 mazen
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