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+ added range checking for the immediate operand of NEC V20/V30's instructions CLR1, SET1, NOT1 and TEST1

git-svn-id: trunk@33322 -
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Modificáronse 3 ficheiros con 23 adicións e 17 borrados
  1. 8 8
      compiler/i8086/i8086tab.inc
  2. 7 1
      compiler/x86/aasmcpu.pas
  3. 8 8
      compiler/x86/x86ins.dat

+ 8 - 8
compiler/i8086/i8086tab.inc

@@ -12976,14 +12976,14 @@
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     code    : #2#15#26#128#21;
     code    : #2#15#26#128#21;
-    flags   : if_nec or if_sb or if_16bitonly
+    flags   : if_nec or if_sb or if_imm3 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_CLR1;
     opcode  : A_CLR1;
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     code    : #2#15#27#128#21;
     code    : #2#15#27#128#21;
-    flags   : if_nec or if_sw or if_16bitonly
+    flags   : if_nec or if_sw or if_imm4 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_CMP4S;
     opcode  : A_CMP4S;
@@ -13039,14 +13039,14 @@
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     code    : #2#15#30#128#21;
     code    : #2#15#30#128#21;
-    flags   : if_nec or if_sb or if_16bitonly
+    flags   : if_nec or if_sb or if_imm3 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_NOT1;
     opcode  : A_NOT1;
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     code    : #2#15#31#128#21;
     code    : #2#15#31#128#21;
-    flags   : if_nec or if_sw or if_16bitonly
+    flags   : if_nec or if_sw or if_imm4 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_REPC;
     opcode  : A_REPC;
@@ -13095,14 +13095,14 @@
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     code    : #2#15#28#128#21;
     code    : #2#15#28#128#21;
-    flags   : if_nec or if_sb or if_16bitonly
+    flags   : if_nec or if_sb or if_imm3 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_SET1;
     opcode  : A_SET1;
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     code    : #2#15#29#128#21;
     code    : #2#15#29#128#21;
-    flags   : if_nec or if_sw or if_16bitonly
+    flags   : if_nec or if_sw or if_imm4 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_SUB4S;
     opcode  : A_SUB4S;
@@ -13130,14 +13130,14 @@
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
     code    : #2#15#24#128#21;
     code    : #2#15#24#128#21;
-    flags   : if_nec or if_sb or if_16bitonly
+    flags   : if_nec or if_sb or if_imm3 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_TEST1;
     opcode  : A_TEST1;
     ops     : 2;
     ops     : 2;
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
     code    : #2#15#25#128#21;
     code    : #2#15#25#128#21;
-    flags   : if_nec or if_sw or if_16bitonly
+    flags   : if_nec or if_sw or if_imm4 or if_16bitonly
   ),
   ),
   (
   (
     opcode  : A_VFMADD132PD;
     opcode  : A_VFMADD132PD;

+ 7 - 1
compiler/x86/aasmcpu.pas

@@ -481,6 +481,7 @@ implementation
        IF_PRE    = $40000000;  { it's a prefix instruction }
        IF_PRE    = $40000000;  { it's a prefix instruction }
        IF_PASS2  = $80000000;  { if the instruction can change in a second pass }
        IF_PASS2  = $80000000;  { if the instruction can change in a second pass }
        IF_IMM4   = $100000000; { immediate operand is a nibble (must be in range [0..15]) }
        IF_IMM4   = $100000000; { immediate operand is a nibble (must be in range [0..15]) }
+       IF_IMM3   = $200000000; { immediate operand is a triad (must be in range [0..7]) }
 
 
      type
      type
        TInsTabCache=array[TasmOp] of longint;
        TInsTabCache=array[TasmOp] of longint;
@@ -2969,7 +2970,12 @@ implementation
             &24,&25,&26,&27 :
             &24,&25,&26,&27 :
               begin
               begin
                 getvalsym(c-&24);
                 getvalsym(c-&24);
-                if (insentry^.flags and IF_IMM4)<>0 then
+                if (insentry^.flags and IF_IMM3)<>0 then
+                  begin
+                    if (currval<0) or (currval>7) then
+                      Message2(asmw_e_value_exceeds_bounds,'unsigned triad',tostr(currval));
+                  end
+                else if (insentry^.flags and IF_IMM4)<>0 then
                   begin
                   begin
                     if (currval<0) or (currval>15) then
                     if (currval<0) or (currval>15) then
                       Message2(asmw_e_value_exceeds_bounds,'unsigned nibble',tostr(currval));
                       Message2(asmw_e_value_exceeds_bounds,'unsigned nibble',tostr(currval));

+ 8 - 8
compiler/x86/x86ins.dat

@@ -5028,8 +5028,8 @@ imm                                   \2\x0F\xFF\24                       NEC,SB
 (Ch_Mop2, Ch_Rop1, Ch_None)
 (Ch_Mop2, Ch_Rop1, Ch_None)
 rm8,reg_cl                            \2\x0F\x12\200                      NEC,16BITONLY
 rm8,reg_cl                            \2\x0F\x12\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x13\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x13\200                      NEC,16BITONLY
-rm8,imm                               \2\x0F\x1A\200\25                   NEC,SB,16BITONLY
-rm16,imm                              \2\x0F\x1B\200\25                   NEC,SW,16BITONLY
+rm8,imm                               \2\x0F\x1A\200\25                   NEC,SB,IMM3,16BITONLY
+rm16,imm                              \2\x0F\x1B\200\25                   NEC,SW,IMM4,16BITONLY
 
 
 [CMP4S]
 [CMP4S]
 (Ch_All, Ch_None, Ch_None)
 (Ch_All, Ch_None, Ch_None)
@@ -5051,8 +5051,8 @@ reg8,imm                              \2\x0F\x39\200\25                   NEC,SB
 (Ch_Mop2, Ch_Rop1, Ch_None)
 (Ch_Mop2, Ch_Rop1, Ch_None)
 rm8,reg_cl                            \2\x0F\x16\200                      NEC,16BITONLY
 rm8,reg_cl                            \2\x0F\x16\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x17\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x17\200                      NEC,16BITONLY
-rm8,imm                               \2\x0F\x1E\200\25                   NEC,SB,16BITONLY
-rm16,imm                              \2\x0F\x1F\200\25                   NEC,SW,16BITONLY
+rm8,imm                               \2\x0F\x1E\200\25                   NEC,SB,IMM3,16BITONLY
+rm16,imm                              \2\x0F\x1F\200\25                   NEC,SW,IMM4,16BITONLY
 
 
 [REPC]
 [REPC]
 (Ch_RWECX, Ch_RWFlags, Ch_None)
 (Ch_RWECX, Ch_RWFlags, Ch_None)
@@ -5074,8 +5074,8 @@ rm8                                   \2\x0F\x2A\200                      NEC,16
 (Ch_Mop2, Ch_Rop1, Ch_None)
 (Ch_Mop2, Ch_Rop1, Ch_None)
 rm8,reg_cl                            \2\x0F\x14\200                      NEC,16BITONLY
 rm8,reg_cl                            \2\x0F\x14\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x15\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x15\200                      NEC,16BITONLY
-rm8,imm                               \2\x0F\x1C\200\25                   NEC,SB,16BITONLY
-rm16,imm                              \2\x0F\x1D\200\25                   NEC,SW,16BITONLY
+rm8,imm                               \2\x0F\x1C\200\25                   NEC,SB,IMM3,16BITONLY
+rm16,imm                              \2\x0F\x1D\200\25                   NEC,SW,IMM4,16BITONLY
 
 
 [SUB4S]
 [SUB4S]
 (Ch_All, Ch_None, Ch_None)
 (Ch_All, Ch_None, Ch_None)
@@ -5085,8 +5085,8 @@ void                                  \2\x0F\x22                          NEC,16
 (Ch_WFlags, Ch_Rop1, Ch_Rop2)
 (Ch_WFlags, Ch_Rop1, Ch_Rop2)
 rm8,reg_cl                            \2\x0F\x10\200                      NEC,16BITONLY
 rm8,reg_cl                            \2\x0F\x10\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x11\200                      NEC,16BITONLY
 rm16,reg_cl                           \2\x0F\x11\200                      NEC,16BITONLY
-rm8,imm                               \2\x0F\x18\200\25                   NEC,SB,16BITONLY
-rm16,imm                              \2\x0F\x19\200\25                   NEC,SW,16BITONLY
+rm8,imm                               \2\x0F\x18\200\25                   NEC,SB,IMM3,16BITONLY
+rm16,imm                              \2\x0F\x19\200\25                   NEC,SW,IMM4,16BITONLY
 
 
 ;*******************************************************************************
 ;*******************************************************************************
 ;********** FMA ****************************************************************
 ;********** FMA ****************************************************************