Mass typo fixes in comments for rtl part 1/2.

rtl/aix/ostypes.inc

@@ -224,7 +224,7 @@ Const
   F_GetOwn = 8;
 
 Const
- { Constansts for MMAP }
+ { Constants for MMAP }
  {$ifdef FPC_IS_SYSTEM}
   MAP_PRIVATE   =2;
  {$endif}

rtl/aix/ptypes.inc

@@ -64,7 +64,7 @@ Type
     TPid     = pid_t;
     pPid     = ^pid_t;
 
-    size_t   = culong;         { as definied in the C standard}
+    size_t   = culong;         { as defined in the C standard}
     ssize_t  = clong;          { used by function for returning number of bytes }
     clock_t  = cint;
     time_t   = {$ifdef cpu64}clong{$else}cint{$endif};           { used for returning the time  }
@@ -169,7 +169,7 @@ Type
 {$endif}
     vfstype : cint;    { what type of vfs this is }
     fsize   : culong;  { fundamental file system block size }
-    vfsnumber : cint;  { vfs indentifier number }
+    vfsnumber : cint;  { vfs identifier number }
     vfsoff : cint;     { reserved, for vfs specific data offset }
     vfslen : cint;     { reserved, for len of vfs specific data }
     vfsvers : cint;    { reserved, for vers of vfs specific data }

rtl/aix/signal.inc

@@ -49,7 +49,7 @@ const
   SIGEMT     =  7;      { EMT instruction }
   SIGSYS     = 12;      { bad argument to system call }
   SIGCLD     = SIGCHLD; { child status change }
-  SIGURG     = 16;      { (+) urgent contition on I/O channel  }
+  SIGURG     = 16;      { (+) urgent condition on I/O channel  }
   SIGPOLL    = 23;      { pollable event occurred }
   SIGXCPU    = 24;      { exceeded cpu limit }
   SIGXFSZ    = 25;
@@ -184,7 +184,7 @@ type
   PSignalRestorer = ^SignalRestorer;
   SigActionHandler = procedure(sig : longint; SigInfo: PSigInfo; SigContext: PSigContext);cdecl;
 
-  SigActionRec = record  // this needs correct 8-byte alignment for hander
+  SigActionRec = record  // this needs correct 8-byte alignment for handler
     sa_handler  : SigActionHandler;
     Sa_Mask     : SigSet;
     Sa_Flags    : cint;

rtl/aix/system.pp

@@ -85,7 +85,7 @@ function paramstr(l: longint) : shortstring;
   s: shortstring;
   s1: shortstring;
  begin
-   { stricly conforming POSIX applications  }
+   { strictly conforming POSIX applications }
    { have the executing filename as argv[0] }
      if ( l>= 0) and (l < argc) then
        paramstr:=strpas(argv[l])

rtl/aix/unxconst.inc

@@ -76,7 +76,7 @@ const
   STAT_IWUSR = STAT_IWOTH shl 6;
   STAT_IXUSR = STAT_IXOTH shl 6;
 
-  {Constansts Termios/Ioctl (used in Do_IsDevice) }
+  {Constants Termios/Ioctl (used in Do_IsDevice) }
   IOCtl_TCGETS= (ord('T') shl 8) or 1; // TCGETS is also in termios.inc, but the sysunix needs only this
 
   ITimer_Real    =0;

rtl/aix/unxfunc.inc

@@ -44,7 +44,7 @@ Function AssignPipe(var pipe_in,pipe_out:cint):cint; [public, alias : 'FPC_SYSC_
 {
   Sets up a pair of file variables, which act as a pipe. The first one can
   be read from, the second one can be written to.
-  If the operation was unsuccesful, linuxerror is set.
+  If the operation was unsuccessful, linuxerror is set.
 }
 var
   ret  : longint;

rtl/amicommon/athreads.pp

@@ -73,7 +73,7 @@ type
     nextThread: PThreadInfo; { threadinfos are a linked list, using this field }
     threadPtr: PProcess;     { our thread pointer, as returned by CreateNewProc(). invalid after exited field is true! }
     threadID: TThreadID;     { thread Unique ID }
-    stackLen: PtrUInt;       { stack size the thread was construced with }
+    stackLen: PtrUInt;       { stack size the thread was constructed with}
     exitCode: Pointer;       { exitcode after the process has exited     }
     f: TThreadFunc;          { ThreadFunc function pointer }
     p: Pointer;              { ThreadFunc argument }
@@ -1236,7 +1236,7 @@ begin
           {$ENDIF}
           Break;
         end;
-        // if we reach here, nothing happend...
+        // if we reach here, nothing happened...
         // we release the semaphore and wait for other threads to do something
         ReleaseSemaphore(@AmiEvent^.Sem);
         DosDelay(1);

rtl/amicommon/lineinfo.pp

@@ -127,7 +127,7 @@ var
   stabofs,              { absolute stab section offset in executable }
   stabstrlen,
   stabstrofs : longint; { absolute stabstr section offset in executable }
-  dirlength  : longint; { length of the dirctory part of the source file }
+  dirlength  : longint; { length of the directory part of the source file }
   stabs      : array[0..maxstabs-1] of tstab;  { buffer }
   stabsreloc : array[0..maxstabsreloc-1] of telf32_reloc;
   textofs,
@@ -502,7 +502,7 @@ begin
   BackTraceStrFunc:=@SysBackTraceStr;
 
   { on most architectures, (but not everywhere, Sparc is a notable exception)
-    for valid stacktraces you have to substract sizeof(pointer), or similar
+    for valid stacktraces you have to subtract sizeof(pointer), or similar
     instruction length from the trace address otherwise the lineinfo might
     be off-by-one, because of course the backtrace addresses don't point to
     the jump instructions, but the following address, which might belong to

rtl/amicommon/sysdir.inc

@@ -92,7 +92,7 @@ begin
   Dir := '';
 
   { dos.library's GetCurrentDirName() doesn't work when called from
-    Workbench (ie. when the process has no CLI sructure) }
+    Workbench (ie. when the process has no CLI structure) }
   { it also doesn't seem to work when invoked from make on AROS }
   LockDir := CurrentDir(0);
   NameFromLock(LockDir, tmpBuf, 256);

rtl/amicommon/sysfile.inc

@@ -21,7 +21,7 @@
 *****************************************************************************}
 type
   { AmigaOS does not automatically close opened files on exit back to  }
-  { the operating system, therefore as a precuation we close all files }
+  { the operating system, therefore as a precaution we close all files }
   { manually on exit.                                                  }
   PFileList = ^TFileList;
   TFileList = record { no packed, must be correctly aligned }

rtl/amiga/m68k/execd.inc

@@ -690,7 +690,7 @@ type
     { * Don't touch!!!!!!!!!..there'll be an interface
       * sooner than later.
       * New Entries...most of the above entries
-      * are only their for structure compatability.
+      * are only their for structure compatibility.
       * They have no meaning as the OS never supported
       * them.
       * }
@@ -1337,7 +1337,7 @@ const
     * You shouldn't use this for any normal code
     * as there's no real reason to do so. If you
     * really think you need to use it please ask
-    * us first on the dev mailinglist.
+    * us first on the dev mailing list.
     * (ULONG) $ffffffff stops it
     * }
   FUNCARRAY_32BIT_QUICK_NATIVE   = $fffbfffb;

rtl/amiga/m68k/legacyutil.inc

@@ -104,7 +104,7 @@ begin// how many days are passed
       end;
     end;
   end;
-  // the current year is a leap year and we are after Februar
+  // the current year is a leap year and we are after February
   if IsLeap and (d >= StartOfMonth[2]) then
     d := d + 1;
   // get the actual month

rtl/amiga/powerpc/execd.inc

@@ -137,7 +137,7 @@ type
 
 const
   {There is a problem with boolean
-  vaules in taglists, just use this
+  values in taglists, just use this
   for now instead}
   LTrue : LongInt = 1;
   LFalse: LongInt = 0;
@@ -382,7 +382,7 @@ const
 
 // ------ expansion.library
   AN_ExpansionLib     = $0A000000;
-  AN_BadExpansionFree = $0A000001; // freeed free region
+  AN_BadExpansionFree = $0A000001; // freed free region
 
 // ------ diskfont.library
   AN_DiskfontLib = $0B000000;
@@ -1526,7 +1526,7 @@ const
 // Memory Pool
   ASOPOOL_MFlags      = TAG_USER + 10; // Memory flags/requirements for this pool
   ASOPOOL_Puddle      = TAG_USER + 11; // Size of each puddle
-  ASOPOOL_Threshold   = TAG_USER + 12; // Largest alloction size that goes into the puddle
+  ASOPOOL_Threshold   = TAG_USER + 12; // Largest allocation size that goes into the puddle
   ASOPOOL_Protected   = TAG_USER + 13; // Protect pool with a semaphore
   ASOPOOL_Name        = TAG_USER + 14; // Name for the pool (for informational purpose only;
   ASOPOOL_CopyName    = TAG_USER + 15; // Copy the name string
@@ -1624,7 +1624,7 @@ const
   GCIT_TimeBaseSpeed  = TAG_USER + 17;
 
 // Family codes
-//enCPUFamiliy
+//enCPUFamily
   CPUFAMILY_UNKNOWN = 0;
   CPUFAMILY_60X     = 1;
   CPUFAMILY_7X0     = 2;

rtl/arm/arm.inc

@@ -323,7 +323,7 @@ asm
         mov     ip,r2
 .LFillchar_at_least_8bytes:
         // Do 16 bytes per loop
-        // More unrolling is uncessary, as we'll just stall on the write buffers
+        // More unrolling is unnecessary, as we'll just stall on the write buffers
         stmia   r3!,{r2,ip}
         subs    r1,r1,#8
         stmplia r3!,{r2,ip}
@@ -788,11 +788,11 @@ asm
 
   // We expect this to work without looping most of the time
   // R3 gets clobbered in kuser_cmpxchg so in the unlikely case that we have to
-  // loop here again, we have to reload the value. Normaly this just fills the
+  // loop here again, we have to reload the value. Normally this just fills the
   // load stall-cycles from the above ldr so in reality we'll not get any additional
   // delays because of this
   // Don't use ldr to load r3 to avoid cacheline trashing
-  // Load 0xffff0fff into r3 and substract to 0xffff0fc0,
+  // Load 0xffff0fff into r3 and subtract to 0xffff0fc0,
   // the kuser_cmpxchg entry point
   mvn r3, #0x0000f000
   sub r3, r3, #0x3F
@@ -876,11 +876,11 @@ asm
 
   // We expect this to work without looping most of the time
   // R3 gets clobbered in kuser_cmpxchg so in the unlikely case that we have to
-  // loop here again, we have to reload the value. Normaly this just fills the
+  // loop here again, we have to reload the value. Normally this just fills the
   // load stall-cycles from the above ldr so in reality we'll not get any additional
   // delays because of this
   // Don't use ldr to load r3 to avoid cacheline trashing
-  // Load 0xffff0fff into r3 and substract to 0xffff0fc0,
+  // Load 0xffff0fff into r3 and subtract to 0xffff0fc0,
   // the kuser_cmpxchg entry point
   mvn r3, #0x0000f000
   sub r3, r3, #0x3F
@@ -962,11 +962,11 @@ asm
 
   // We expect this to work without looping most of the time
   // R3 gets clobbered in kuser_cmpxchg so in the unlikely case that we have to
-  // loop here again, we have to reload the value. Normaly this just fills the
+  // loop here again, we have to reload the value. Normally this just fills the
   // load stall-cycles from the above ldr so in reality we'll not get any additional
   // delays because of this
   // Don't use ldr to load r3 to avoid cacheline trashing
-  // Load 0xffff0fff into r3 and substract to 0xffff0fc0,
+  // Load 0xffff0fff into r3 and subtract to 0xffff0fc0,
   // the kuser_cmpxchg entry point
   mvn r3, #0x0000f000
   sub r3, r3, #0x3F
@@ -1049,11 +1049,11 @@ asm
 
   // We expect this to work without looping most of the time
   // R3 gets clobbered in kuser_cmpxchg so in the unlikely case that we have to
-  // loop here again, we have to reload the value. Normaly this just fills the
+  // loop here again, we have to reload the value. Normally this just fills the
   // load stall-cycles from the above ldr so in reality we'll not get any additional
   // delays because of this
   // Don't use ldr to load r3 to avoid cacheline trashing
-  // Load 0xffff0fff into r3 and substract to 0xffff0fc0,
+  // Load 0xffff0fff into r3 and subtract to 0xffff0fc0,
   // the kuser_cmpxchg entry point
   mvn r3, #0x0000f000
   sub r3, r3, #0x3F
@@ -1163,7 +1163,7 @@ asm
   // The error case is a bit tricky, kuser_cmpxchg does not return the current value
   // So we may need to loop to avoid race conditions
   // The loop case is HIGHLY unlikely, it would require that we got rescheduled between
-  // calling kuser_cmpxchg and the ldr. While beeing rescheduled another process/thread
+  // calling kuser_cmpxchg and the ldr. While being rescheduled another process/thread
   // would have the set the value to our comperand
   ldr   r0, [r2] // Load the currently set value
   cmp   r0, r4   // Return if Comperand != current value, otherwise loop again

rtl/arm/thumb2.inc

@@ -238,7 +238,7 @@ asm
   bne .Lbyteloop
 (*
   // yes, then align
-  // alignment to 4 byte boundries is enough
+  // alignment to 4 byte boundaries is enough
   ldrb ip,[r0],#1
   sub r2,r2,#1
   stb ip,[r1],#1
@@ -309,7 +309,7 @@ asm
   bne .Lbyteloop
 (*
   // yes, then align
-  // alignment to 4 byte boundries is enough
+  // alignment to 4 byte boundaries is enough
   ldrb ip,[r0],#1
   sub r2,r2,#1
   stb ip,[r1],#1

rtl/aros/doslibd.inc

@@ -313,7 +313,7 @@ type  // Checked OK 04.08.2011 ALB
   PProcess = ^TProcess;
   TProcess = record
     pr_Task          : TTask;    // Embedded task structure
-    pr_MsgPort       : TMsgPort; // Processes standard message-port. Used for various puposes.
+    pr_MsgPort       : TMsgPort; // Processes standard message-port. Used for various purposes.
     pr_Pad           : Word;     // Private
     pr_SegList       : BPTR;     // SegList array, used by this process.
     pr_StackSize     : LongInt;  // StackSize of the current process.

rtl/aros/i386/execd.inc

@@ -758,7 +758,7 @@ type
     { * Don't touch!!!!!!!!!..there'll be an interface
       * sooner than later.
       * New Entries...most of the above entries
-      * are only their for structure compatability.
+      * are only their for structure compatibility.
       * They have no meaning as the OS never supported
       * them.
       * }
@@ -1439,7 +1439,7 @@ const
     * You shouldn't use this for any normal code
     * as there's no real reason to do so. If you
     * really think you need to use it please ask
-    * us first on the dev mailinglist.
+    * us first on the dev mailing list.
     * (ULONG) $ffffffff stops it
     * }
   FUNCARRAY_32BIT_QUICK_NATIVE   = $fffbfffb;

rtl/atari/syspara.inc

@@ -166,7 +166,7 @@ end;
 
 Function FSearch(const path:RawByteString;dirlist:RawByteString):RawByteString;
 {
-  Searches for a file 'path' in the list of direcories in 'dirlist'.
+  Searches for a file 'path' in the list of directories in 'dirlist'.
   returns an empty string if not found. Wildcards are NOT allowed.
   If dirlist is empty, it is set to '.'
 

rtl/beos/baseunix.pp

@@ -106,7 +106,7 @@ Uses Sysctl;
 //  {$i settimeo.inc}
 {$endif}
 {$i settimeo.inc}
-{$i osmacro.inc}        { macro implenenations }
+{$i osmacro.inc}        { macro implementations }
 {$i bunxovl.inc}        { redefs and overloads implementation }
 
 {$ifndef ver1_0}

rtl/beos/i386/sighnd.inc

@@ -24,7 +24,7 @@ begin
   case sig of
     SIGFPE :
       begin
-        { this is not allways necessary but I don't know yet
+        { this is not always necessary but I don't know yet
           how to tell if it is or not PM }
         res:=200;
         // fp_status always here under BeOS and x86 CPU

rtl/beos/osdefs.inc

@@ -3,7 +3,7 @@
     Copyright (c) 2002 Marco van de Voort
     member of the Free Pascal development team.
 
-    Target dependent defines used when compileing the baseunix unit
+    Target dependent defines used when compiling the baseunix unit
 
     See the file COPYING.FPC, included in this distribution,
     for details about the copyright.

rtl/beos/ossysc.inc

@@ -2,7 +2,7 @@
     Copyright (c) 2002 by Marco van de Voort
 
     The base *BSD syscalls required to implement the system unit. These
-    are aliased for use in other units (to avoid poluting the system units
+    are aliased for use in other units (to avoid polluting the system units
     interface)
 
     See the file COPYING.FPC, included in this distribution,
@@ -566,7 +566,7 @@ begin
  if (dirp^.dd_loc=-1)   OR     {First readdir on this pdir. Initial fill of buffer}
    (dirp^.dd_rewind>=(longint(dirp^.dd_buf)+dirblksiz)) then  {no more entries left?}
   Begin
-    if readbuffer=0 then        {succesful read?}
+    if readbuffer=0 then        {successful read?}
      Exit(NIL);                 {No more data}
   End;
  FinalEntry:=NIL;
@@ -585,7 +585,7 @@ begin
    begin {block entirely searched or reclen=0}
     Novalid:=True;
     if dirp^.dd_loc<>0 THEN             {blocks left?}
-     if readbuffer()<>0 then        {succesful read?}
+     if readbuffer()<>0 then        {successful read?}
       novalid:=false;
    end;
  until (FinalEntry<>nil) or novalid;
@@ -1049,9 +1049,9 @@ end;
 {$endif}
 
 
-(* Implemented in sytem under BeOS
+(* Implemented in system under BeOS
 CONST
- { Constansts for MMAP }
+ { Constants for MMAP }
   MAP_PRIVATE   =2;
   MAP_ANONYMOUS =$1000;
 

rtl/beos/ostypes.inc

@@ -361,7 +361,7 @@ const B_SYMBOL_TYPE_DATA = $1;
 const B_SYMBOL_TYPE_TEXT = $2;
 const B_SYMBOL_TYPE_ANY  = $5;
 
-{ Constansts for MMAP }
+{ Constants for MMAP }
 const
   MAP_ANONYMOUS =$1000;
 

rtl/beos/ptypes.inc

@@ -68,7 +68,7 @@ type
     pPid     = ^pid_t;
 
     wint_t	 = cint32;
-    size_t   = cuint32;         { as definied in the C standard}
+    size_t   = cuint32;         { as defined in the C standard}
     TSize    = size_t;
     pSize    = ^size_t;
     psize_t   = pSize;		

rtl/beos/sysconst.inc

@@ -69,7 +69,7 @@ const
   fs_proc     = $9fa0;
   fs_xia      = $012FD16D;
 
-  {Constansts Termios/Ioctl (used in Do_IsDevice) }
+  {Constants Termios/Ioctl (used in Do_IsDevice) }
   IOCtl_TCGETS= $40000000+$2C7400+ 19; // TCGETS is also in termios.inc, but the sysunix needs only this
 
   ITimer_Real    =0;

rtl/beos/system.pp

@@ -266,7 +266,7 @@ var
   s1: shortstring;
 begin
 
-  { stricly conforming POSIX applications  }
+  { strictly conforming POSIX applications }
   { have the executing filename as argv[0] }
   if l = 0 then
   begin

rtl/bsd/bunxsysc.inc

@@ -330,7 +330,7 @@ end;
 
 Function FPlink(existing:PAnsiChar;newone:PAnsiChar):cint;
 {
-  Proceduces a hard link from new to old.
+  Procedures a hard link from new to old.
   In effect, new will be the same file as old.
 }
 begin

rtl/bsd/osdefs.inc

@@ -3,7 +3,7 @@
     Copyright (c) 2002 Marco van de Voort
     member of the Free Pascal development team.
 
-    Target dependent defines used when compileing the baseunix unit
+    Target dependent defines used when compiling the baseunix unit
 
     See the file COPYING.FPC, included in this distribution,
     for details about the copyright.

rtl/bsd/ossysc.inc

@@ -2,7 +2,7 @@
     Copyright (c) 2002 by Marco van de Voort
 
     The base *BSD syscalls required to implement the system unit. These
-    are aliased for use in other units (to avoid poluting the system units
+    are aliased for use in other units (to avoid polluting the system units
     interface)
 
     See the file COPYING.FPC, included in this distribution,
@@ -322,7 +322,7 @@ begin
  if (dirp^.dd_loc=-1)   OR     {First readdir on this pdir. Initial fill of buffer}
    (dirp^.dd_rewind>=(ptrint(dirp^.dd_buf)+dirp^.dd_size)) then  {no more entries left?}
   Begin
-    if readbuffer=0 then        {succesful read?}
+    if readbuffer=0 then        {successful read?}
      Exit(NIL);                 {No more data}
   End;
  FinalEntry:=NIL;
@@ -345,7 +345,7 @@ begin
    begin {block entirely searched or reclen=0}
     Novalid:=True;
     if dirp^.dd_loc<>0 THEN             {blocks left?}
-     if readbuffer()<>0 then        {succesful read?}
+     if readbuffer()<>0 then        {successful read?}
       novalid:=false;
    end;
  until (FinalEntry<>nil) or novalid;

rtl/bsd/ostypes.inc

@@ -565,7 +565,7 @@ Type
   piovec=^tiovec;		
 
 CONST
- { Constansts for MMAP }
+ { Constants for MMAP }
 {$ifdef FPC_IS_SYSTEM}
   MAP_PRIVATE   =2;
 {$endif}

rtl/bsd/system.pp

@@ -170,7 +170,7 @@ end;
 
 function paramstr(l: longint) : shortstring;
  begin
-   { stricly conforming POSIX applications  }
+   { strictly conforming POSIX applications }
    { have the executing filename as argv[0] }
 //   if l=0 then
 //     begin
@@ -216,7 +216,7 @@ end;
 {$ifdef DEBUG}
   { Declare InstallDefaultSignalHandler as forward to be able
     to test aclling fpsigaction again within SignalToRunError
-    function implemented within sighnd.inc inlcude file }
+    function implemented within sighnd.inc include file }
 procedure InstallDefaultSignalHandler(signum: longint; out oldact: SigActionRec); forward;
 {$endif}
 

rtl/darwin/console.pp

@@ -321,7 +321,7 @@ const
          V_ADP_INITIALIZED=(1 SHL 17);
          V_ADP_REGISTERED =(1 SHL 18);
 
-{ adapter infromation block }
+{ adapter information block }
 type  video_adapter  = record
                         va_index                : longint;
                         va_type                 : longint;
@@ -1151,8 +1151,8 @@ CONST
         DMAC            =$8d;           { macron}
         DBRE            =$8e;           { breve}
         DDOT            =$8f;           { dot}
-        DUML            =$90;           { umlaut/diaresis}
-        DDIA            =$90;           { diaresis}
+        DUML            =$90;           { umlaut/diaeresis}
+        DDIA            =$90;           { diaeresis}
         DSLA            =$91;           { slash}
         DRIN            =$92;           { ring}
         DCED            =$93;           { cedilla}
@@ -1359,7 +1359,7 @@ type  mousemode = record
                     protocol    : longint;              { MOUSE_PROTO_XXX }
                     rate        : longint;              { report rate (per sec), -1 if unknown }
                     resolution  : longint;              { MOUSE_RES_XXX, -1 if unknown }
-                    accelfactor : longint;              { accelation factor (must be 1 or greater) }
+                    accelfactor : longint;              { acceleration factor (must be 1 or greater) }
                     level       : longint;              { driver operation level }
                     packetsize  : longint;              { the length of the data packet }
                     syncmask    : array[0..1] of uchar; { sync. data bits in the header byte }

rtl/darwin/extres_multiarch.inc

@@ -149,7 +149,7 @@ procedure FixResEndian(ResHeader : PExtHeader);
 var ptr : plongword;
     blockend : plongword;
 begin
-  //all info nodes reside in a contiguos block of memory.
+  //all info nodes reside in a contiguous block of memory.
   //they are all 16 bytes long and made by longwords
   //so, simply swap each longword in the block
   ptr:=GetPtr(ResHeader,sizeof(TExtHeader));
@@ -237,7 +237,7 @@ begin
     FpClose(aInfo.fd);
     exit;
   end;
-//  writeln('fpfstat suceeded');
+//  writeln('fpfstat succeeded');
   aInfo.size:=fdstat.st_size;
   aInfo.ResHeader:=PExtHeader(Fpmmap(nil,aInfo.size,PROT_READ or PROT_WRITE,
     MAP_PRIVATE,aInfo.fd,0));

rtl/darwin/ptypes.inc

@@ -64,7 +64,7 @@ type
     TPid     = pid_t;
     pPid     = ^pid_t;
 
-    size_t   = culong;          { as definied in the C standard}
+    size_t   = culong;          { as defined in the C standard}
     TSize    = size_t;
     pSize    = ^size_t;
     psize_t  = ^size_t;

rtl/darwin/sysinit.pas

@@ -2,7 +2,7 @@
     This file is part of the Free Pascal run time library.
     Copyright (c) 1999-2000 by the Free Pascal development team
 
-    Implements indirect entry point for executables and libaries
+    Implements indirect entry point for executables and libraries
 
     See the file COPYING.FPC, included in this distribution,
     for details about the copyright.

rtl/darwin/termios.inc

@@ -584,7 +584,7 @@ Type
   { copy parameters in }
   IOC_IN = culong($80000000);
 
-  { copy paramters in and out }
+  { copy parameters in and out }
   IOC_INOUT = (IOC_IN or IOC_OUT);
 
   { mask for IN/OUT/VOID }

rtl/darwin/unxconst.inc

@@ -71,5 +71,5 @@ Const
   STAT_IWUSR = STAT_IWOTH shl 6;
   STAT_IXUSR = STAT_IXOTH shl 6;
 
-  {Constansts Termios/Ioctl (used in Do_IsDevice) }
+  {Constants Termios/Ioctl (used in Do_IsDevice) }
   IOCtl_TCGETS=$40000000+$2C7400+19; // TCGETS is also in termios.inc (as TIOCGETA), but the sysunix needs only this

rtl/darwin/unxfunc.inc

@@ -47,7 +47,7 @@ Function AssignPipe(var pipe_in,pipe_out:cint):cint; [public, alias : 'FPC_SYSC_
 {
   Sets up a pair of file variables, which act as a pipe. The first one can
   be read from, the second one can be written to.
-  If the operation was unsuccesful, linuxerror is set.
+  If the operation was unsuccessful, linuxerror is set.
 }
 var
   ret  : longint;

rtl/dragonfly/console.pp

@@ -321,7 +321,7 @@ const
          V_ADP_INITIALIZED=(1 SHL 17);
          V_ADP_REGISTERED =(1 SHL 18);
 
-{ adapter infromation block }
+{ adapter information block }
 type  video_adapter  = record
                         va_index                : longint;
                         va_type                 : longint;
@@ -1151,8 +1151,8 @@ CONST
         DMAC            =$8d;           { macron}
         DBRE            =$8e;           { breve}
         DDOT            =$8f;           { dot}
-        DUML            =$90;           { umlaut/diaresis}
-        DDIA            =$90;           { diaresis}
+        DUML            =$90;           { umlaut/diaeresis}
+        DDIA            =$90;           { diaeresis}
         DSLA            =$91;           { slash}
         DRIN            =$92;           { ring}
         DCED            =$93;           { cedilla}
@@ -1359,7 +1359,7 @@ type  mousemode = record
                     protocol    : longint;              { MOUSE_PROTO_XXX }
                     rate        : longint;              { report rate (per sec), -1 if unknown }
                     resolution  : longint;              { MOUSE_RES_XXX, -1 if unknown }
-                    accelfactor : longint;              { accelation factor (must be 1 or greater) }
+                    accelfactor : longint;              { acceleration factor (must be 1 or greater) }
                     level       : longint;              { driver operation level }
                     packetsize  : longint;              { the length of the data packet }
                     syncmask    : array[0..1] of uchar; { sync. data bits in the header byte }

rtl/dragonfly/ptypes.inc

@@ -58,7 +58,7 @@ type
 {$ifdef CPU64}
     size_t   = cuint64;
 {$else}
-    size_t   = cuint32;         { as definied in the C standard}
+    size_t   = cuint32;         { as defined in the C standard}
 {$endif}
     TSize    = size_t;
     pSize    = ^size_t;
@@ -101,7 +101,7 @@ type
   TTimeVal = timeval;
 
   timespec = packed record
-    tv_sec   : time_t;                  // should be time_t, bug compability
+    tv_sec   : time_t;                  // should be time_t, bug compatibility
     tv_nsec  : clong;
   end;
   ptimespec= ^timespec;

rtl/dragonfly/sysctlh.inc

@@ -631,7 +631,7 @@ const
         IPPROTO_IGRP            = 88;           { Cisco/GXS IGRP }
         IPPROTO_OSPFIGP         = 89;           { OSPFIGP }
         IPPROTO_SRPC            = 90;           { Strite RPC protocol }
-        IPPROTO_LARP            = 91;           { Locus Address Resoloution }
+        IPPROTO_LARP            = 91;           { Locus Address Resolution }
         IPPROTO_MTP             = 92;           { Multicast Transport }
         IPPROTO_AX25            = 93;           { AX.25 Frames }
         IPPROTO_IPEIP           = 94;           { IP encapsulated in IP }
@@ -661,7 +661,7 @@ const
 }
         IP_OPTIONS              = 1;    { buf/ip_opts; set/get IP options }
         IP_HDRINCL              = 2;    { int; header is included with data }
-        IP_TOS                  = 3;    { int; IP type of service and preced. }
+        IP_TOS                  = 3;    { int; IP type of service and precede. }
         IP_TTL                  = 4;    { int; IP time to live }
         IP_RECVOPTS             = 5;    { bool; receive all IP opts w/dgram }
         IP_RECVRETOPTS          = 6;    { bool; receive IP opts for response }
@@ -677,7 +677,7 @@ const
         IP_RSVP_OFF             = 16;   { disable RSVP in kernel }
         IP_RSVP_VIF_ON          = 17;   { set RSVP per-vif socket }
         IP_RSVP_VIF_OFF         = 18;   { unset RSVP per-vif socket }
-        IP_PORTRANGE            = 19;   { int; range to choose for unspec port }
+        IP_PORTRANGE            = 19;   { int; range to choose for unspecified port }
         IP_RECVIF               = 20;   { bool; receive reception if w/dgram }
 { for IPSEC }
         IP_IPSEC_POLICY         = 21;   { int; set/get security policy }
@@ -794,7 +794,7 @@ const
         IPCTL_STATS             = 12;   { ipstat structure }
         IPCTL_ACCEPTSOURCEROUTE = 13;   { may accept source routed packets }
         IPCTL_FASTFORWARDING    = 14;   { use fast IP forwarding code }
-        IPCTL_KEEPFAITH         = 15;   { FAITH IPv4->IPv6 translater ctl }
+        IPCTL_KEEPFAITH         = 15;   { FAITH IPv4->IPv6 translator ctl }
         IPCTL_GIF_TTL           = 16;   { default TTL for gif encap packet }
         IPCTL_MAXID             = 17;
 

rtl/dragonfly/unxconst.inc

@@ -89,7 +89,7 @@ const
   fs_proc     = $9fa0;
   fs_xia      = $012FD16D;
 
-  {Constansts Termios/Ioctl (used in Do_IsDevice) }
+  {Constants Termios/Ioctl (used in Do_IsDevice) }
   IOCtl_TCGETS= $40000000+$2C7400+ 19; // TCGETS is also in termios.inc, but the sysunix needs only this
 
   ITimer_Real    =0;

rtl/dragonfly/unxfunc.inc

@@ -45,7 +45,7 @@ Function AssignPipe(var pipe_in,pipe_out:cint):cint; [public, alias : 'FPC_SYSC_
 {
   Sets up a pair of file variables, which act as a pipe. The first one can
   be read from, the second one can be written to.
-  If the operation was unsuccesful, errno is set.
+  If the operation was unsuccessful, errno is set.
 }
 var
   pip  : tfildes;

rtl/embedded/arm/mk64f12.pp

@@ -230,7 +230,7 @@ type
     ENET_1588_Timer_IRQn = 82,        // *< Ethernet MAC IEEE 1588 Timer Interrupt
     ENET_Transmit_IRQn = 83,          // *< Ethernet MAC Transmit Interrupt
     ENET_Receive_IRQn = 84,           // *< Ethernet MAC Receive Interrupt
-    ENET_Error_IRQn = 85              // *< Ethernet MAC Error and miscelaneous Interrupt
+    ENET_Error_IRQn = 85              // *< Ethernet MAC Error and miscellaneous Interrupt
   );
 
   TADC_Registers = record

rtl/embedded/arm/nrf51.pp

@@ -390,9 +390,9 @@ type
   end;
 
   TGPIOTE_Registers = record          // GPIOTE Structure
-    TASKS_OUT  : array[0..3] of longword; // Tasks asssociated with GPIOTE channels.
+    TASKS_OUT  : array[0..3] of longword; // Tasks associated with GPIOTE channels.
     RESERVED0  : array[0..59] of longword;
-    EVENTS_IN  : array[0..3] of longword; // Tasks asssociated with GPIOTE channels.
+    EVENTS_IN  : array[0..3] of longword; // Tasks associated with GPIOTE channels.
     RESERVED1  : array[0..26] of longword;
     EVENTS_PORT : longword;           // Event generated from multiple pins.
     RESERVED2  : array[0..96] of longword;
@@ -662,7 +662,7 @@ type
     ERASEPAGE  : longword;            // Register for erasing a non-protected non-volatile memory page.
     ERASEALL   : longword;            // Register for erasing all non-volatile user memory.
     ERASEPCR0  : longword;            // Register for erasing a protected non-volatile memory page.
-    ERASEUICR  : longword;            // Register for start erasing User Information Congfiguration Registers.
+    ERASEUICR  : longword;            // Register for start erasing User Information Configuration Registers.
   end;
 
   TPPI_Registers = record             // PPI Structure
@@ -685,7 +685,7 @@ type
     CLENR0     : longword;            // Length of code region 0 in bytes.
     PPFC       : longword;            // Pre-programmed factory code present.
     RESERVED2  : longword;
-    NUMRAMBLOCK : longword;           // Number of individualy controllable RAM blocks.
+    NUMRAMBLOCK : longword;           // Number of individually controllable RAM blocks.
     SIZERAMBLOCK : array[0..3] of longword; // Deprecated array of size of RAM block in bytes. This name is
     RESERVED3  : array[0..4] of longword;
     CONFIGID   : longword;            // Configuration identifier.

rtl/embedded/arm/samd51p19a.pp

@@ -216,9 +216,9 @@ type
     INTFLAG      : byte;                 //002E Interrupt Flag Status and Clear
     STATUS       : byte;                 //002F Status
     SYNCBUSY     : longWord;             //0030 Synchronization Busy
-    DSEQDATA     : longWord;             //0034 DMA Sequencial Data
+    DSEQDATA     : longWord;             //0034 DMA Sequential Data
     DSEQCTRL     : longWord;             //0038 DMA Sequential Control
-    DSEQSTAT     : longWord;             //003C DMA Sequencial Status
+    DSEQSTAT     : longWord;             //003C DMA Sequential Status
     RESULT       : word;                 //0040 Result Conversion Value
     RESERVED2    : word;
     RESS         : word;                 //0044 Last Sample Result

rtl/embedded/arm/stm32f0xx.pp

@@ -739,7 +739,7 @@ const
 
 //******************  Bit definition for ADC_CCR register  *******************
   ADC_CCR_VBATEN = longword($01000000);           //Voltage battery enable
-  ADC_CCR_TSEN = longword($00800000);             //Tempurature sensore enable
+  ADC_CCR_TSEN = longword($00800000);             //Tempurature sensor enable
   ADC_CCR_VREFEN = longword($00400000);           //Vrefint enable
 
 //****************************************************************************
@@ -1948,7 +1948,7 @@ const
   RCC_BDCR_RTCSEL_0 = longword($00000100);        //Bit 0
   RCC_BDCR_RTCSEL_1 = longword($00000200);        //Bit 1
 
-//RTC congiguration
+//RTC configuration
   RCC_BDCR_RTCSEL_NOCLOCK = longword($00000000);  //No clock
   RCC_BDCR_RTCSEL_LSE = longword($00000100);      //LSE oscillator clock used as RTC clock
   RCC_BDCR_RTCSEL_LSI = longword($00000200);      //LSI oscillator clock used as RTC clock

rtl/embedded/arm/stm32f10x_cl.pp

@@ -739,7 +739,7 @@ const
 
 //******************  Bit definition for ADC_CCR register  *******************
   ADC_CCR_VBATEN = longword($01000000);           //Voltage battery enable
-  ADC_CCR_TSEN = longword($00800000);             //Tempurature sensore enable
+  ADC_CCR_TSEN = longword($00800000);             //Tempurature sensor enable
   ADC_CCR_VREFEN = longword($00400000);           //Vrefint enable
 
 //****************************************************************************
@@ -1948,7 +1948,7 @@ const
   RCC_BDCR_RTCSEL_0 = longword($00000100);        //Bit 0
   RCC_BDCR_RTCSEL_1 = longword($00000200);        //Bit 1
 
-//RTC congiguration
+//RTC configuration
   RCC_BDCR_RTCSEL_NOCLOCK = longword($00000000);  //No clock
   RCC_BDCR_RTCSEL_LSE = longword($00000100);      //LSE oscillator clock used as RTC clock
   RCC_BDCR_RTCSEL_LSI = longword($00000200);      //LSI oscillator clock used as RTC clock

rtl/embedded/avr/at90can128.pp

@@ -227,7 +227,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -251,7 +251,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun
@@ -495,12 +495,12 @@ const
   SERG = 3; // Stuff Error General
   CERG = 2; // CRC Error General
   FERG = 1; // Form Error General
-  AERG = 0; // Ackknowledgement Error General
+  AERG = 0; // Acknowledgment Error General
   // CANGIE
   ENIT = 7; // Enable all Interrupts
   ENBOFF = 6; // Enable Bus Off INterrupt
   ENRX = 5; // Enable Receive Interrupt
-  ENTX = 4; // Enable Transmitt Interrupt
+  ENTX = 4; // Enable Transmit Interrupt
   ENERR = 3; // Enable MOb Error Interrupt
   ENBX = 2; // Enable Burst Receive Interrupt
   ENERG = 1; // Enable General Error Interrupt
@@ -526,7 +526,7 @@ const
   SERR = 3; // Stuff Error
   CERR = 2; // CRC Error
   FERR = 1; // Form Error
-  AERR = 0; // Ackknowledgement Error
+  AERR = 0; // Acknowledgment Error
   // CANCDMOB
   CONMOB = 6; // MOb Config Bits
   RPLV = 5; // Reply Valid

rtl/embedded/avr/at90can32.pp

@@ -227,7 +227,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -251,7 +251,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun
@@ -495,12 +495,12 @@ const
   SERG = 3; // Stuff Error General
   CERG = 2; // CRC Error General
   FERG = 1; // Form Error General
-  AERG = 0; // Ackknowledgement Error General
+  AERG = 0; // Acknowledgment Error General
   // CANGIE
   ENIT = 7; // Enable all Interrupts
   ENBOFF = 6; // Enable Bus Off INterrupt
   ENRX = 5; // Enable Receive Interrupt
-  ENTX = 4; // Enable Transmitt Interrupt
+  ENTX = 4; // Enable Transmit Interrupt
   ENERR = 3; // Enable MOb Error Interrupt
   ENBX = 2; // Enable Burst Receive Interrupt
   ENERG = 1; // Enable General Error Interrupt
@@ -526,7 +526,7 @@ const
   SERR = 3; // Stuff Error
   CERR = 2; // CRC Error
   FERR = 1; // Form Error
-  AERR = 0; // Ackknowledgement Error
+  AERR = 0; // Acknowledgment Error
   // CANCDMOB
   CONMOB = 6; // MOb Config Bits
   RPLV = 5; // Reply Valid

rtl/embedded/avr/at90can64.pp

@@ -227,7 +227,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -251,7 +251,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun
@@ -495,12 +495,12 @@ const
   SERG = 3; // Stuff Error General
   CERG = 2; // CRC Error General
   FERG = 1; // Form Error General
-  AERG = 0; // Ackknowledgement Error General
+  AERG = 0; // Acknowledgment Error General
   // CANGIE
   ENIT = 7; // Enable all Interrupts
   ENBOFF = 6; // Enable Bus Off INterrupt
   ENRX = 5; // Enable Receive Interrupt
-  ENTX = 4; // Enable Transmitt Interrupt
+  ENTX = 4; // Enable Transmit Interrupt
   ENERR = 3; // Enable MOb Error Interrupt
   ENBX = 2; // Enable Burst Receive Interrupt
   ENERG = 1; // Enable General Error Interrupt
@@ -526,7 +526,7 @@ const
   SERR = 3; // Stuff Error
   CERR = 2; // CRC Error
   FERR = 1; // Form Error
-  AERR = 0; // Ackknowledgement Error
+  AERR = 0; // Acknowledgment Error
   // CANCDMOB
   CONMOB = 6; // MOb Config Bits
   RPLV = 5; // Reply Valid

rtl/embedded/avr/at90pwm161.pp

@@ -455,7 +455,7 @@ procedure TIMER1_CAPT_ISR; external name 'TIMER1_CAPT_ISR'; // Interrupt 11 Time
 procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 12 Timer/Counter1 Overflow
 procedure ADC_ISR; external name 'ADC_ISR'; // Interrupt 13 ADC Conversion Complete
 procedure INT1_ISR; external name 'INT1_ISR'; // Interrupt 14 External Interrupt Request 1
-procedure SPI__STC_ISR; external name 'SPI__STC_ISR'; // Interrupt 15 SPI Serial Transfer Complet
+procedure SPI__STC_ISR; external name 'SPI__STC_ISR'; // Interrupt 15 SPI Serial Transfer Complete
 procedure INT2_ISR; external name 'INT2_ISR'; // Interrupt 16 External Interrupt Request 2
 procedure WDT_ISR; external name 'WDT_ISR'; // Interrupt 17 Watchdog Timeout Interrupt
 procedure EE_READY_ISR; external name 'EE_READY_ISR'; // Interrupt 18 EEPROM Ready

rtl/embedded/avr/at90pwm81.pp

@@ -455,7 +455,7 @@ procedure TIMER1_CAPT_ISR; external name 'TIMER1_CAPT_ISR'; // Interrupt 11 Time
 procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 12 Timer/Counter1 Overflow
 procedure ADC_ISR; external name 'ADC_ISR'; // Interrupt 13 ADC Conversion Complete
 procedure INT1_ISR; external name 'INT1_ISR'; // Interrupt 14 External Interrupt Request 1
-procedure SPI__STC_ISR; external name 'SPI__STC_ISR'; // Interrupt 15 SPI Serial Transfer Complet
+procedure SPI__STC_ISR; external name 'SPI__STC_ISR'; // Interrupt 15 SPI Serial Transfer Complete
 procedure INT2_ISR; external name 'INT2_ISR'; // Interrupt 16 External Interrupt Request 2
 procedure WDT_ISR; external name 'WDT_ISR'; // Interrupt 17 Watchdog Timeout Interrupt
 procedure EE_READY_ISR; external name 'EE_READY_ISR'; // Interrupt 18 EEPROM Ready

rtl/embedded/avr/at90usb1286.pp

@@ -280,7 +280,7 @@ const
   SPI2X = 0; // Double SPI Speed Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/at90usb1287.pp

@@ -308,7 +308,7 @@ const
   SPI2X = 0; // Double SPI Speed Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/at90usb162.pp

@@ -363,7 +363,7 @@ const
   PCIE = 0; // Pin Change Interrupt Enables
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/at90usb646.pp

@@ -308,7 +308,7 @@ const
   SPI2X = 0; // Double SPI Speed Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/at90usb647.pp

@@ -308,7 +308,7 @@ const
   SPI2X = 0; // Double SPI Speed Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/at90usb82.pp

@@ -363,7 +363,7 @@ const
   PCIE = 0; // Pin Change Interrupt Enables
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega128.pp

@@ -185,7 +185,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -209,7 +209,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega1280.pp

@@ -262,7 +262,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -367,7 +367,7 @@ const
   WDE = 3; // Watch Dog Enable
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun
@@ -617,7 +617,7 @@ const
   SPMEN = 0; // Store Program Memory Enable
   // UCSR2A
   RXC2 = 7; // USART Receive Complete
-  TXC2 = 6; // USART Transmitt Complete
+  TXC2 = 6; // USART Transmit Complete
   UDRE2 = 5; // USART Data Register Empty
   FE2 = 4; // Framing Error
   DOR2 = 3; // Data overRun
@@ -641,7 +641,7 @@ const
   UCPOL2 = 0; // Clock Polarity
   // UCSR3A
   RXC3 = 7; // USART Receive Complete
-  TXC3 = 6; // USART Transmitt Complete
+  TXC3 = 6; // USART Transmit Complete
   UDRE3 = 5; // USART Data Register Empty
   FE3 = 4; // Framing Error
   DOR3 = 3; // Data overRun

rtl/embedded/avr/atmega1281.pp

@@ -229,7 +229,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -253,7 +253,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega1284.pp

@@ -166,7 +166,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -353,7 +353,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega1284p.pp

@@ -166,7 +166,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -353,7 +353,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega1284rfr2.pp

@@ -1851,7 +1851,7 @@ procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TR
 procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
 procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
 procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
-procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
+procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - transceiver is reaching state TRX_OFF
 procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
 procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
 procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt

rtl/embedded/avr/atmega128a.pp

@@ -185,7 +185,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -209,7 +209,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega128rfa1.pp

@@ -1018,7 +1018,7 @@ procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TR
 procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
 procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
 procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
-procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
+procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - transceiver is reaching state TRX_OFF
 procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
 procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
 procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt

rtl/embedded/avr/atmega128rfr2.pp

@@ -1859,7 +1859,7 @@ procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TR
 procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
 procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
 procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
-procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
+procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - transceiver is reaching state TRX_OFF
 procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
 procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
 procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt

rtl/embedded/avr/atmega16.pp

@@ -202,7 +202,7 @@ const
   SPR = 0; // SPI Clock Rate Selects
   // UCSRA
   RXC = 7; // USART Receive Complete
-  TXC = 6; // USART Transmitt Complete
+  TXC = 6; // USART Transmit Complete
   UDRE = 5; // USART Data Register Empty
   FE = 4; // Framing Error
   DOR = 3; // Data overRun

rtl/embedded/avr/atmega1608.pp

@@ -8,7 +8,7 @@ type
     Reserved1: byte;
     MUXCTRLA: byte;  //Mux Control A
     Reserved3: byte;
-    DACREF: byte;  //Referance scale control
+    DACREF: byte;  //Reference scale control
     Reserved5: byte;
     INTCTRL: byte;  //Interrupt Control
     STATUS: byte;  //Status
@@ -236,7 +236,7 @@ type
     VLMCFG_BELOW = $00;
     VLMCFG_ABOVE = $02;
     VLMCFG_CROSS = $04;
-    // voltage level monitor interrrupt enable
+    // voltage level monitor interrupt enable
     VLMIEbm = $01;
     // Voltage level monitor interrupt flag
     VLMIFbm = $01;
@@ -1260,7 +1260,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     TEMP: byte;  //Temporary data for 16-bit Access
     Reserved16: byte;
     Reserved17: byte;
@@ -1389,7 +1389,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     Reserved15: byte;
     Reserved16: byte;
     Reserved17: byte;
@@ -1942,7 +1942,7 @@ type
     WINDOW_8KCLK = $B0;
     // Lock enable
     LOCKbm = $80;
-    // Syncronization busy
+    // Synchronization busy
     SYNCBUSYbm = $01;
   end;
 

rtl/embedded/avr/atmega1609.pp

@@ -8,7 +8,7 @@ type
     Reserved1: byte;
     MUXCTRLA: byte;  //Mux Control A
     Reserved3: byte;
-    DACREF: byte;  //Referance scale control
+    DACREF: byte;  //Reference scale control
     Reserved5: byte;
     INTCTRL: byte;  //Interrupt Control
     STATUS: byte;  //Status
@@ -236,7 +236,7 @@ type
     VLMCFG_BELOW = $00;
     VLMCFG_ABOVE = $02;
     VLMCFG_CROSS = $04;
-    // voltage level monitor interrrupt enable
+    // voltage level monitor interrupt enable
     VLMIEbm = $01;
     // Voltage level monitor interrupt flag
     VLMIFbm = $01;
@@ -1262,7 +1262,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     TEMP: byte;  //Temporary data for 16-bit Access
     Reserved16: byte;
     Reserved17: byte;
@@ -1391,7 +1391,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     Reserved15: byte;
     Reserved16: byte;
     Reserved17: byte;
@@ -1944,7 +1944,7 @@ type
     WINDOW_8KCLK = $B0;
     // Lock enable
     LOCKbm = $80;
-    // Syncronization busy
+    // Synchronization busy
     SYNCBUSYbm = $01;
   end;
 

rtl/embedded/avr/atmega162.pp

@@ -183,7 +183,7 @@ const
   ACIS = 0; // Analog Comparator Interrupt Mode Select bits
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -208,7 +208,7 @@ const
   UCPOL0 = 0; // Clock Polarity
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun
@@ -289,7 +289,7 @@ const
   // SPMCR
   SPMIE = 7; // SPM Interrupt Enable
   RWWSB = 6; // Read While Write Section Busy
-  RWWSRE = 4; // Read While Write secion read enable
+  RWWSRE = 4; // Read While Write section read enable
   BLBSET = 3; // Boot Lock Bit Set
   PGWRT = 2; // Page Write
   PGERS = 1; // Page Erase

rtl/embedded/avr/atmega164a.pp

@@ -146,7 +146,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -331,7 +331,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega164p.pp

@@ -146,7 +146,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -331,7 +331,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega164pa.pp

@@ -146,7 +146,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -331,7 +331,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega168.pp

@@ -117,7 +117,7 @@ var
 const
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun

rtl/embedded/avr/atmega168a.pp

@@ -117,7 +117,7 @@ var
 const
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun

rtl/embedded/avr/atmega168p.pp

@@ -117,7 +117,7 @@ var
 const
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun

rtl/embedded/avr/atmega168pa.pp

@@ -117,7 +117,7 @@ var
 const
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun

rtl/embedded/avr/atmega16a.pp

@@ -202,7 +202,7 @@ const
   SPR = 0; // SPI Clock Rate Selects
   // UCSRA
   RXC = 7; // USART Receive Complete
-  TXC = 6; // USART Transmitt Complete
+  TXC = 6; // USART Transmit Complete
   UDRE = 5; // USART Data Register Empty
   FE = 4; // Framing Error
   DOR = 3; // Data overRun

rtl/embedded/avr/atmega16hva.pp

@@ -325,7 +325,7 @@ procedure TIMER1_COMPA_ISR; external name 'TIMER1_COMPA_ISR'; // Interrupt 8 Tim
 procedure TIMER1_COMPB_ISR; external name 'TIMER1_COMPB_ISR'; // Interrupt 9 Timer 1 Compare Match B
 procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 10 Timer 1 overflow
 procedure TIMER0_IC_ISR; external name 'TIMER0_IC_ISR'; // Interrupt 11 Timer 0 Input Capture
-procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 12 Timer 0 Comapre Match A
+procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 12 Timer 0 Compare Match A
 procedure TIMER0_COMPB_ISR; external name 'TIMER0_COMPB_ISR'; // Interrupt 13 Timer 0 Compare Match B
 procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 14 Timer 0 Overflow
 procedure SPI_STC_ISR; external name 'SPI_STC_ISR'; // Interrupt 15 SPI Serial transfer complete

rtl/embedded/avr/atmega16hvb.pp

@@ -250,7 +250,7 @@ const
   SCIF = 4; // Short-circuit Protection Activated Interrupt Flag
   DOCIF = 3; // Discharge Over-current Protection Activated Interrupt Flag
   COCIF = 2; // Charge Over-current Protection Activated Interrupt Flag
-  DHCIF = 1; // Disharge High-current Protection Activated Interrupt
+  DHCIF = 1; // Discharge High-current Protection Activated Interrupt
   CHCIF = 0; // Charge High-current Protection Activated Interrupt
   // BPIMSK
   SCIE = 4; // Short-circuit Protection Activated Interrupt Enable
@@ -367,7 +367,7 @@ procedure TIMER1_COMPA_ISR; external name 'TIMER1_COMPA_ISR'; // Interrupt 13 Ti
 procedure TIMER1_COMPB_ISR; external name 'TIMER1_COMPB_ISR'; // Interrupt 14 Timer 1 Compare Match B
 procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 15 Timer 1 overflow
 procedure TIMER0_IC_ISR; external name 'TIMER0_IC_ISR'; // Interrupt 16 Timer 0 Input Capture
-procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 17 Timer 0 Comapre Match A
+procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 17 Timer 0 Compare Match A
 procedure TIMER0_COMPB_ISR; external name 'TIMER0_COMPB_ISR'; // Interrupt 18 Timer 0 Compare Match B
 procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 19 Timer 0 Overflow
 procedure TWIBUSCD_ISR; external name 'TWIBUSCD_ISR'; // Interrupt 20 Two-Wire Bus Connect/Disconnect

rtl/embedded/avr/atmega16hvbrevb.pp

@@ -691,7 +691,7 @@ procedure TIMER1_COMPA_ISR; external name 'TIMER1_COMPA_ISR'; // Interrupt 13 Ti
 procedure TIMER1_COMPB_ISR; external name 'TIMER1_COMPB_ISR'; // Interrupt 14 Timer 1 Compare Match B
 procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 15 Timer 1 overflow
 procedure TIMER0_IC_ISR; external name 'TIMER0_IC_ISR'; // Interrupt 16 Timer 0 Input Capture
-procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 17 Timer 0 Comapre Match A
+procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 17 Timer 0 Compare Match A
 procedure TIMER0_COMPB_ISR; external name 'TIMER0_COMPB_ISR'; // Interrupt 18 Timer 0 Compare Match B
 procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 19 Timer 0 Overflow
 procedure TWIBUSCD_ISR; external name 'TWIBUSCD_ISR'; // Interrupt 20 Two-Wire Bus Connect/Disconnect

rtl/embedded/avr/atmega16m1.pp

@@ -220,12 +220,12 @@ const
   SERG = 3; // Stuff Error General Flag
   CERG = 2; // CRC Error General Flag
   FERG = 1; // Form Error General Flag
-  AERG = 0; // Ackknowledgement Error General Flag
+  AERG = 0; // Acknowledgment Error General Flag
   // CANGIE
   ENIT = 7; // Enable all Interrupts
   ENBOFF = 6; // Enable Bus Off Interrupt
   ENRX = 5; // Enable Receive Interrupt
-  ENTX = 4; // Enable Transmitt Interrupt
+  ENTX = 4; // Enable Transmit Interrupt
   ENERR = 3; // Enable MOb Error Interrupt
   ENBX = 2; // Enable Burst Receive Interrupt
   ENERG = 1; // Enable General Error Interrupt
@@ -260,7 +260,7 @@ const
   SERR = 3; // Stuff Error on MOb
   CERR = 2; // CRC Error on MOb
   FERR = 1; // Form Error on MOb
-  AERR = 0; // Ackknowledgement Error on MOb
+  AERR = 0; // Acknowledgment Error on MOb
   // CANCDMOB
   CONMOB = 6; // MOb Config bits
   RPLV = 5; // Reply Valid

rtl/embedded/avr/atmega16u2.pp

@@ -363,7 +363,7 @@ const
   PCIE = 0; // Pin Change Interrupt Enables
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega16u4.pp

@@ -204,7 +204,7 @@ const
   SPI2X = 0; // Double SPI Speed Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega2560.pp

@@ -262,7 +262,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -367,7 +367,7 @@ const
   WDE = 3; // Watch Dog Enable
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun
@@ -617,7 +617,7 @@ const
   SPMEN = 0; // Store Program Memory Enable
   // UCSR2A
   RXC2 = 7; // USART Receive Complete
-  TXC2 = 6; // USART Transmitt Complete
+  TXC2 = 6; // USART Transmit Complete
   UDRE2 = 5; // USART Data Register Empty
   FE2 = 4; // Framing Error
   DOR2 = 3; // Data overRun
@@ -641,7 +641,7 @@ const
   UCPOL2 = 0; // Clock Polarity
   // UCSR3A
   RXC3 = 7; // USART Receive Complete
-  TXC3 = 6; // USART Transmitt Complete
+  TXC3 = 6; // USART Transmit Complete
   UDRE3 = 5; // USART Data Register Empty
   FE3 = 4; // Framing Error
   DOR3 = 3; // Data overRun

rtl/embedded/avr/atmega2561.pp

@@ -230,7 +230,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -335,7 +335,7 @@ const
   WDE = 3; // Watch Dog Enable
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega2564rfr2.pp

@@ -1853,7 +1853,7 @@ procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TR
 procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
 procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
 procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
-procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
+procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - transceiver is reaching state TRX_OFF
 procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
 procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
 procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt

rtl/embedded/avr/atmega256rfr2.pp

@@ -1861,7 +1861,7 @@ procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TR
 procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
 procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
 procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
-procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
+procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - transceiver is reaching state TRX_OFF
 procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
 procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
 procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt

rtl/embedded/avr/atmega32.pp

@@ -179,7 +179,7 @@ const
   SPR = 0; // SPI Clock Rate Selects
   // UCSRA
   RXC = 7; // USART Receive Complete
-  TXC = 6; // USART Transmitt Complete
+  TXC = 6; // USART Transmit Complete
   UDRE = 5; // USART Data Register Empty
   FE = 4; // Framing Error
   DOR = 3; // Data overRun
@@ -247,7 +247,7 @@ const
   // SPMCR
   SPMIE = 7; // SPM Interrupt Enable
   RWWSB = 6; // Read While Write Section Busy
-  RWWSRE = 4; // Read While Write secion read enable
+  RWWSRE = 4; // Read While Write section read enable
   BLBSET = 3; // Boot Lock Bit Set
   PGWRT = 2; // Page Write
   PGERS = 1; // Page Erase

rtl/embedded/avr/atmega3208.pp

@@ -8,7 +8,7 @@ type
     Reserved1: byte;
     MUXCTRLA: byte;  //Mux Control A
     Reserved3: byte;
-    DACREF: byte;  //Referance scale control
+    DACREF: byte;  //Reference scale control
     Reserved5: byte;
     INTCTRL: byte;  //Interrupt Control
     STATUS: byte;  //Status
@@ -236,7 +236,7 @@ type
     VLMCFG_BELOW = $00;
     VLMCFG_ABOVE = $02;
     VLMCFG_CROSS = $04;
-    // voltage level monitor interrrupt enable
+    // voltage level monitor interrupt enable
     VLMIEbm = $01;
     // Voltage level monitor interrupt flag
     VLMIFbm = $01;
@@ -1260,7 +1260,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     TEMP: byte;  //Temporary data for 16-bit Access
     Reserved16: byte;
     Reserved17: byte;
@@ -1389,7 +1389,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     Reserved15: byte;
     Reserved16: byte;
     Reserved17: byte;
@@ -1942,7 +1942,7 @@ type
     WINDOW_8KCLK = $B0;
     // Lock enable
     LOCKbm = $80;
-    // Syncronization busy
+    // Synchronization busy
     SYNCBUSYbm = $01;
   end;
 

rtl/embedded/avr/atmega3209.pp

@@ -8,7 +8,7 @@ type
     Reserved1: byte;
     MUXCTRLA: byte;  //Mux Control A
     Reserved3: byte;
-    DACREF: byte;  //Referance scale control
+    DACREF: byte;  //Reference scale control
     Reserved5: byte;
     INTCTRL: byte;  //Interrupt Control
     STATUS: byte;  //Status
@@ -236,7 +236,7 @@ type
     VLMCFG_BELOW = $00;
     VLMCFG_ABOVE = $02;
     VLMCFG_CROSS = $04;
-    // voltage level monitor interrrupt enable
+    // voltage level monitor interrupt enable
     VLMIEbm = $01;
     // Voltage level monitor interrupt flag
     VLMIFbm = $01;
@@ -1262,7 +1262,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     TEMP: byte;  //Temporary data for 16-bit Access
     Reserved16: byte;
     Reserved17: byte;
@@ -1391,7 +1391,7 @@ type
     INTFLAGS: byte;  //Interrupt Flags
     Reserved12: byte;
     Reserved13: byte;
-    DBGCTRL: byte;  //Degbug Control
+    DBGCTRL: byte;  //Debug Control
     Reserved15: byte;
     Reserved16: byte;
     Reserved17: byte;
@@ -1944,7 +1944,7 @@ type
     WINDOW_8KCLK = $B0;
     // Lock enable
     LOCKbm = $80;
-    // Syncronization busy
+    // Synchronization busy
     SYNCBUSYbm = $01;
   end;
 

rtl/embedded/avr/atmega324a.pp

@@ -146,7 +146,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -331,7 +331,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega324p.pp

@@ -146,7 +146,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -331,7 +331,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega324pa.pp

@@ -146,7 +146,7 @@ const
   AIN0D = 0; // AIN0 Digital Input Disable
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun
@@ -331,7 +331,7 @@ const
   TWGCE = 0; // TWI General Call Recognition Enable Bit
   // UCSR1A
   RXC1 = 7; // USART Receive Complete
-  TXC1 = 6; // USART Transmitt Complete
+  TXC1 = 6; // USART Transmit Complete
   UDRE1 = 5; // USART Data Register Empty
   FE1 = 4; // Framing Error
   DOR1 = 3; // Data overRun

rtl/embedded/avr/atmega328.pp

@@ -117,7 +117,7 @@ var
 const
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun

rtl/embedded/avr/atmega328p.pp

@@ -117,7 +117,7 @@ var
 const
   // UCSR0A
   RXC0 = 7; // USART Receive Complete
-  TXC0 = 6; // USART Transmitt Complete
+  TXC0 = 6; // USART Transmit Complete
   UDRE0 = 5; // USART Data Register Empty
   FE0 = 4; // Framing Error
   DOR0 = 3; // Data overRun

rtl/embedded/avr/atmega32a.pp

@@ -179,7 +179,7 @@ const
   SPR = 0; // SPI Clock Rate Selects
   // UCSRA
   RXC = 7; // USART Receive Complete
-  TXC = 6; // USART Transmitt Complete
+  TXC = 6; // USART Transmit Complete
   UDRE = 5; // USART Data Register Empty
   FE = 4; // Framing Error
   DOR = 3; // Data overRun
@@ -247,7 +247,7 @@ const
   // SPMCR
   SPMIE = 7; // SPM Interrupt Enable
   RWWSB = 6; // Read While Write Section Busy
-  RWWSRE = 4; // Read While Write secion read enable
+  RWWSRE = 4; // Read While Write section read enable
   BLBSET = 3; // Boot Lock Bit Set
   PGWRT = 2; // Page Write
   PGERS = 1; // Page Erase

rtl/embedded/avr/atmega32c1.pp

@@ -180,12 +180,12 @@ const
   SERG = 3; // Stuff Error General Flag
   CERG = 2; // CRC Error General Flag
   FERG = 1; // Form Error General Flag
-  AERG = 0; // Ackknowledgement Error General Flag
+  AERG = 0; // Acknowledgment Error General Flag
   // CANGIE
   ENIT = 7; // Enable all Interrupts
   ENBOFF = 6; // Enable Bus Off Interrupt
   ENRX = 5; // Enable Receive Interrupt
-  ENTX = 4; // Enable Transmitt Interrupt
+  ENTX = 4; // Enable Transmit Interrupt
   ENERR = 3; // Enable MOb Error Interrupt
   ENBX = 2; // Enable Burst Receive Interrupt
   ENERG = 1; // Enable General Error Interrupt
@@ -220,7 +220,7 @@ const
   SERR = 3; // Stuff Error on MOb
   CERR = 2; // CRC Error on MOb
   FERR = 1; // Form Error on MOb
-  AERR = 0; // Ackknowledgement Error on MOb
+  AERR = 0; // Acknowledgment Error on MOb
   // CANCDMOB
   CONMOB = 6; // MOb Config bits
   RPLV = 5; // Reply Valid