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@@ -0,0 +1,534 @@
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+{
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+ Copyright (c) 2000-2006 by Florian Klaempfl and Jonas Maebe
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+
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+ Code generation for add nodes on the PowerPC (32 and 64 bit generic)
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+
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+ This program is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ This program is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with this program; if not, write to the Free Software
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+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+
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+ ****************************************************************************
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+}
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+
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+unit ngppcadd;
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+
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+
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+{$i fpcdefs.inc}
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+
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+interface
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+
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+ uses
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+ node,nadd,ncgadd,cpubase;
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+
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+ type
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+ tgenppcaddnode = class(tcgaddnode)
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+ function pass_1: tnode; override;
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+ protected
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+ procedure pass_left_and_right;
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+ procedure load_left_right(cmpop, load_constants: boolean);
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+ function getresflags : tresflags;
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+ procedure emit_compare(unsigned: boolean); virtual; abstract;
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+ procedure second_addfloat;override;
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+ procedure second_addboolean;override;
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+ procedure second_addsmallset;override;
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+ end;
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+
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+
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+implementation
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+
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+{*****************************************************************************
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+ Pass 1
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+*****************************************************************************}
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+
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+ uses
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+ globtype,systems,
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+ cutils,verbose,globals,
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+ symconst,symdef,paramgr,
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+ aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
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+ cgbase,cpuinfo,pass_1,pass_2,regvars,
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+ cpupara,cgcpu,cgutils,procinfo,
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+ ncon,nset,
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+ ncgutil,tgobj,rgobj,rgcpu,cgobj;
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+
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+
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+{*****************************************************************************
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+ Pass 1
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+*****************************************************************************}
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+
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+ function tgenppcaddnode.pass_1: tnode;
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+ begin
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+ resulttypepass(left);
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+ if (nodetype in [equaln,unequaln]) and
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+ (left.resulttype.def.deftype = orddef) and
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+ is_64bit(left.resulttype.def) then
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+ begin
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+ result := nil;
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+ firstpass(left);
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+ firstpass(right);
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+ expectloc := LOC_FLAGS;
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+ calcregisters(self,2,0,0);
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+ exit;
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+ end;
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+ result := inherited pass_1;
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+ end;
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+
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+{*****************************************************************************
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+ Helpers
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+*****************************************************************************}
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+
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+ procedure tgenppcaddnode.pass_left_and_right;
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+ begin
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+ { calculate the operator which is more difficult }
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+ firstcomplex(self);
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+
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+ { in case of constant put it to the left }
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+ if (left.nodetype=ordconstn) then
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+ swapleftright;
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+
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+ secondpass(left);
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+ secondpass(right);
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+ end;
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+
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+
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+ procedure tgenppcaddnode.load_left_right(cmpop, load_constants: boolean);
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+
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+ procedure load_node(var n: tnode);
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+ begin
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+ case n.location.loc of
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+ LOC_REGISTER,
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+ LOC_CREGISTER:
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+ ;
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+ LOC_REFERENCE,LOC_CREFERENCE:
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+ location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resulttype.def),false);
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+ LOC_CONSTANT:
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+ begin
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+ if load_constants then
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+ location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resulttype.def),false);
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+ end;
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+ else
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+ location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resulttype.def),false);
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+ end;
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+ end;
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+
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+ begin
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+ load_node(left);
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+ load_node(right);
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+ if not(cmpop) then
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+ begin
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+ location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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+{$ifndef cpu64bit}
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+ if is_64bit(resulttype.def) then
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+ location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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+{$endif cpu64bit}
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+ end;
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+ end;
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+
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+
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+ function tgenppcaddnode.getresflags : tresflags;
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+ begin
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+ if (left.resulttype.def.deftype <> floatdef) then
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+ result.cr := RS_CR0
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+ else
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+ result.cr := RS_CR1;
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+ case nodetype of
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+ equaln : result.flag:=F_EQ;
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+ unequaln : result.flag:=F_NE;
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+ else
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+ if nf_swaped in flags then
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+ case nodetype of
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+ ltn : result.flag:=F_GT;
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+ lten : result.flag:=F_GE;
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+ gtn : result.flag:=F_LT;
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+ gten : result.flag:=F_LE;
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+ end
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+ else
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+ case nodetype of
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+ ltn : result.flag:=F_LT;
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+ lten : result.flag:=F_LE;
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+ gtn : result.flag:=F_GT;
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+ gten : result.flag:=F_GE;
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+ end;
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+ end
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+ end;
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+
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+
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+{*****************************************************************************
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+ AddBoolean
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+*****************************************************************************}
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+
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+ procedure tgenppcaddnode.second_addboolean;
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+ var
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+ cgop : TOpCg;
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+ cgsize : TCgSize;
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+ cmpop,
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+ isjump : boolean;
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+ otl,ofl : tasmlabel;
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+ begin
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+ { calculate the operator which is more difficult }
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+ firstcomplex(self);
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+
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+ cmpop:=false;
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+ if (torddef(left.resulttype.def).typ=bool8bit) or
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+ (torddef(right.resulttype.def).typ=bool8bit) then
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+ cgsize:=OS_8
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+ else
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+ if (torddef(left.resulttype.def).typ=bool16bit) or
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+ (torddef(right.resulttype.def).typ=bool16bit) then
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+ cgsize:=OS_16
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+ else
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+ cgsize:=OS_32;
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+
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+ if ((cs_full_boolean_eval in aktlocalswitches) and
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+ not(nf_short_bool in flags)) or
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+ (nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
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+ begin
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+ if left.nodetype in [ordconstn,realconstn] then
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+ swapleftright;
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+
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+ isjump:=(left.expectloc=LOC_JUMP);
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+ if isjump then
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+ begin
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+ otl:=current_procinfo.CurrTrueLabel;
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+ current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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+ ofl:=current_procinfo.CurrFalseLabel;
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+ current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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+ end;
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+ secondpass(left);
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+ if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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+ location_force_reg(current_asmdata.CurrAsmList,left.location,cgsize,false);
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+ if isjump then
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+ begin
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+ current_procinfo.CurrTrueLabel:=otl;
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+ current_procinfo.CurrFalseLabel:=ofl;
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+ end
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+ else if left.location.loc=LOC_JUMP then
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+ internalerror(2003122901);
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+
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+ isjump:=(right.expectloc=LOC_JUMP);
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+ if isjump then
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+ begin
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+ otl:=current_procinfo.CurrTrueLabel;
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+ current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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+ ofl:=current_procinfo.CurrFalseLabel;
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+ current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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+ end;
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+ secondpass(right);
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+ if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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+ location_force_reg(current_asmdata.CurrAsmList,right.location,cgsize,false);
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+ if isjump then
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+ begin
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+ current_procinfo.CurrTrueLabel:=otl;
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+ current_procinfo.CurrFalseLabel:=ofl;
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+ end
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+ else if right.location.loc=LOC_JUMP then
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+ internalerror(200312292);
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+
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+ cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
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+
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+ { set result location }
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+ if not cmpop then
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+ location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
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+ else
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+
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+ load_left_right(cmpop,false);
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+
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+ if (left.location.loc = LOC_CONSTANT) then
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+ swapleftright;
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+
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+ { compare the }
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+ case nodetype of
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+ ltn,lten,gtn,gten,
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+ equaln,unequaln :
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+ begin
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+ if (right.location.loc <> LOC_CONSTANT) then
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,
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+ left.location.register,right.location.register))
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+ else
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPLWI,
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+ left.location.register,longint(right.location.value)));
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+ location.resflags := getresflags;
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+ end;
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+ else
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+ begin
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+ case nodetype of
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+ xorn :
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+ cgop:=OP_XOR;
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+ orn :
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+ cgop:=OP_OR;
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+ andn :
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+ cgop:=OP_AND;
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+ else
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+ internalerror(200203247);
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+ end;
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+
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+ if right.location.loc <> LOC_CONSTANT then
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+ cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
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+ left.location.register,right.location.register,
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+ location.register)
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+ else
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+ cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
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+ right.location.value,left.location.register,
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+ location.register);
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+ end;
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+ end;
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+ end
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+ else
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+ inherited second_addboolean;
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+ end;
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+
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+
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+{*****************************************************************************
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+ AddFloat
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+*****************************************************************************}
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+
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+ procedure tgenppcaddnode.second_addfloat;
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+ var
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+ op : TAsmOp;
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+ cmpop,
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+ singleprec : boolean;
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+ begin
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+ pass_left_and_right;
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+
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+ cmpop:=false;
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+ singleprec:=tfloatdef(left.resulttype.def).typ=s32real;
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+ case nodetype of
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+ addn :
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+ if singleprec then
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+ op:=A_FADDS
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+ else
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+ op:=A_FADD;
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+ muln :
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+ if singleprec then
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+ op:=A_FMULS
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+ else
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+ op:=A_FMUL;
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+ subn :
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+ if singleprec then
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+ op:=A_FSUBS
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+ else
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+ op:=A_FSUB;
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+ slashn :
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+ if singleprec then
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+ op:=A_FDIVS
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+ else
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+ op:=A_FDIV;
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+ ltn,lten,gtn,gten,
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+ equaln,unequaln :
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+ begin
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+ op:=A_FCMPO;
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+ cmpop:=true;
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+ end;
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+ else
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+ internalerror(200403182);
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+ end;
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+
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+ // get the operands in the correct order, there are no special cases
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+ // here, everything is register-based
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+ if nf_swaped in flags then
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+ swapleftright;
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+
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+ // put both operands in a register
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+ location_force_fpureg(current_asmdata.CurrAsmList,right.location,true);
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+ location_force_fpureg(current_asmdata.CurrAsmList,left.location,true);
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+
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+ // initialize de result
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+ if not cmpop then
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+ begin
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+ location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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+ location.register := cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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+ end
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+ else
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+ begin
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+ location.resflags := getresflags;
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+ end;
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+
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+ // emit the actual operation
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+ if not cmpop then
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+ begin
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
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+ location.register,left.location.register,
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+ right.location.register))
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+ end
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+ else
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+ begin
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
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+ newreg(R_SPECIALREGISTER,location.resflags.cr,R_SUBNONE),left.location.register,right.location.register))
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+ end;
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+ end;
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+
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+
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+{*****************************************************************************
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+ AddSmallSet
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+*****************************************************************************}
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+
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+ procedure tgenppcaddnode.second_addsmallset;
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+ var
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+ cgop : TOpCg;
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+ tmpreg : tregister;
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+ opdone,
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+ cmpop : boolean;
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+ begin
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+ pass_left_and_right;
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+
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+ { when a setdef is passed, it has to be a smallset }
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+ if ((left.resulttype.def.deftype=setdef) and
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+ (tsetdef(left.resulttype.def).settype<>smallset)) or
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+ ((right.resulttype.def.deftype=setdef) and
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+ (tsetdef(right.resulttype.def).settype<>smallset)) then
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+ internalerror(200203301);
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+
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+ opdone := false;
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+ cmpop:=nodetype in [equaln,unequaln,lten,gten];
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+
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+ { set result location }
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+ if not cmpop then
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+ location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
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+ else
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+
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+ load_left_right(cmpop,false);
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+
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+ if not(cmpop) then
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+ location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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+
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+ case nodetype of
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+ addn :
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+ begin
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+ if (nf_swaped in flags) and (left.nodetype=setelementn) then
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+ swapleftright;
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+ { are we adding set elements ? }
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+ if right.nodetype=setelementn then
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+ begin
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+ { no range support for smallsets! }
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+ if assigned(tsetelementnode(right).right) then
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+ internalerror(43244);
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+ if (right.location.loc = LOC_CONSTANT) then
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+ cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
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+ aint(aword(1) shl aword(right.location.value)),
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+ left.location.register,location.register)
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+ else
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+ begin
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+ tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
|
|
|
+ cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,tmpreg);
|
|
|
+ cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_SHL,OS_INT,
|
|
|
+ right.location.register,tmpreg);
|
|
|
+ if left.location.loc <> LOC_CONSTANT then
|
|
|
+ cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,tmpreg,
|
|
|
+ left.location.register,location.register)
|
|
|
+ else
|
|
|
+ cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
|
|
|
+ left.location.value,tmpreg,location.register);
|
|
|
+ end;
|
|
|
+ opdone := true;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ cgop := OP_OR;
|
|
|
+ end;
|
|
|
+ symdifn :
|
|
|
+ cgop:=OP_XOR;
|
|
|
+ muln :
|
|
|
+ cgop:=OP_AND;
|
|
|
+ subn :
|
|
|
+ begin
|
|
|
+ cgop:=OP_AND;
|
|
|
+ if (not(nf_swaped in flags)) then
|
|
|
+ if (right.location.loc=LOC_CONSTANT) then
|
|
|
+ right.location.value := not(right.location.value)
|
|
|
+ else
|
|
|
+ opdone := true
|
|
|
+ else if (left.location.loc=LOC_CONSTANT) then
|
|
|
+ left.location.value := not(left.location.value)
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ swapleftright;
|
|
|
+ opdone := true;
|
|
|
+ end;
|
|
|
+ if opdone then
|
|
|
+ begin
|
|
|
+ if left.location.loc = LOC_CONSTANT then
|
|
|
+ begin
|
|
|
+ tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
|
|
|
+ cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
|
|
|
+ left.location.value,tmpreg);
|
|
|
+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
|
|
|
+ location.register,tmpreg,right.location.register));
|
|
|
+ end
|
|
|
+ else
|
|
|
+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
|
|
|
+ location.register,left.location.register,
|
|
|
+ right.location.register));
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ equaln,
|
|
|
+ unequaln :
|
|
|
+ begin
|
|
|
+ emit_compare(true);
|
|
|
+ opdone := true;
|
|
|
+ end;
|
|
|
+ lten,gten:
|
|
|
+ begin
|
|
|
+ If (not(nf_swaped in flags) and
|
|
|
+ (nodetype = lten)) or
|
|
|
+ ((nf_swaped in flags) and
|
|
|
+ (nodetype = gten)) then
|
|
|
+ swapleftright;
|
|
|
+ // now we have to check whether left >= right
|
|
|
+ tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
|
|
|
+ if left.location.loc = LOC_CONSTANT then
|
|
|
+ begin
|
|
|
+ cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,
|
|
|
+ not(left.location.value),right.location.register,tmpreg);
|
|
|
+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPWI,tmpreg,0));
|
|
|
+ // the two instructions above should be folded together by
|
|
|
+ // the peepholeoptimizer
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ if right.location.loc = LOC_CONSTANT then
|
|
|
+ begin
|
|
|
+ cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
|
|
|
+ right.location.value,tmpreg);
|
|
|
+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
|
|
|
+ tmpreg,left.location.register));
|
|
|
+ end
|
|
|
+ else
|
|
|
+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
|
|
|
+ right.location.register,left.location.register));
|
|
|
+ end;
|
|
|
+ location.resflags.cr := RS_CR0;
|
|
|
+ location.resflags.flag := F_EQ;
|
|
|
+ opdone := true;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ internalerror(2002072701);
|
|
|
+ end;
|
|
|
+
|
|
|
+ if not opdone then
|
|
|
+ begin
|
|
|
+ // these are all commutative operations
|
|
|
+ if (left.location.loc = LOC_CONSTANT) then
|
|
|
+ swapleftright;
|
|
|
+ if (right.location.loc = LOC_CONSTANT) then
|
|
|
+ cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
|
|
|
+ right.location.value,left.location.register,
|
|
|
+ location.register)
|
|
|
+ else
|
|
|
+ cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
|
|
|
+ right.location.register,left.location.register,
|
|
|
+ location.register);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+
|
|
|
+end.
|
Jonas Maebe