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- removed partial Alpha, IA64 and vis backends since they were never nor
will likely ever be finished

git-svn-id: trunk@30836 -

Jonas Maebe 10 ani în urmă
părinte
comite
a04cae2c4b

+ 0 - 30
.gitattributes

@@ -53,24 +53,6 @@ compiler/aasmsym.pas svneol=native#text/plain
 compiler/aasmtai.pas svneol=native#text/plain
 compiler/aggas.pas svneol=native#text/plain
 compiler/agjasmin.pas svneol=native#text/plain
-compiler/alpha/aasmcpu.pas svneol=native#text/plain
-compiler/alpha/agaxpgas.pas svneol=native#text/plain
-compiler/alpha/aoptcpu.pas svneol=native#text/plain
-compiler/alpha/aoptcpub.pas svneol=native#text/plain
-compiler/alpha/aoptcpuc.pas svneol=native#text/plain
-compiler/alpha/aoptcpud.pas svneol=native#text/plain
-compiler/alpha/cgcpu.pas svneol=native#text/plain
-compiler/alpha/cpubase.pas svneol=native#text/plain
-compiler/alpha/cpuinfo.pas svneol=native#text/plain
-compiler/alpha/cpunode.pas svneol=native#text/plain
-compiler/alpha/cpupara.pas svneol=native#text/plain
-compiler/alpha/cpupi.pas svneol=native#text/plain
-compiler/alpha/cputarg.pas svneol=native#text/plain
-compiler/alpha/radirect.pas svneol=native#text/plain
-compiler/alpha/rasm.pas svneol=native#text/plain
-compiler/alpha/rgcpu.pas svneol=native#text/plain
-compiler/alpha/symcpu.pas svneol=native#text/plain
-compiler/alpha/tgcpu.pas svneol=native#text/plain
 compiler/aopt.pas svneol=native#text/plain
 compiler/aoptbase.pas svneol=native#text/plain
 compiler/aoptcs.pas svneol=native#text/plain
@@ -213,7 +195,6 @@ compiler/i386/cpunode.pas svneol=native#text/plain
 compiler/i386/cpupara.pas svneol=native#text/plain
 compiler/i386/cpupi.pas svneol=native#text/plain
 compiler/i386/cputarg.pas svneol=native#text/plain
-compiler/i386/csopt386.pas svneol=native#text/plain
 compiler/i386/daopt386.pas svneol=native#text/plain
 compiler/i386/hlcgcpu.pas svneol=native#text/plain
 compiler/i386/i386att.inc svneol=native#text/plain
@@ -250,7 +231,6 @@ compiler/i386/r386std.inc svneol=native#text/plain
 compiler/i386/ra386att.pas svneol=native#text/plain
 compiler/i386/ra386int.pas svneol=native#text/plain
 compiler/i386/rgcpu.pas svneol=native#text/plain
-compiler/i386/rropt386.pas svneol=native#text/plain
 compiler/i386/symcpu.pas svneol=native#text/plain
 compiler/i8086/aoptcpu.pas svneol=native#text/plain
 compiler/i8086/aoptcpub.pas svneol=native#text/plain
@@ -300,11 +280,6 @@ compiler/i8086/ra8086int.pas svneol=native#text/plain
 compiler/i8086/rgcpu.pas svneol=native#text/plain
 compiler/i8086/symcpu.pas svneol=native#text/plain
 compiler/i8086/tgcpu.pas svneol=native#text/plain
-compiler/ia64/aasmcpu.pas svneol=native#text/plain
-compiler/ia64/cpubase.pas svneol=native#text/plain
-compiler/ia64/cpuinfo.pas svneol=native#text/plain
-compiler/ia64/ia64reg.dat svneol=native#text/plain
-compiler/ia64/symcpu.pas svneol=native#text/plain
 compiler/impdef.pas svneol=native#text/plain
 compiler/import.pas svneol=native#text/plain
 compiler/jvm/aasmcpu.pas svneol=native#text/plain
@@ -815,11 +790,6 @@ compiler/utils/ppuutils/ppuxml.pp svneol=native#text/plain
 compiler/utils/samplecfg svneol=native#text/plain
 compiler/verbose.pas svneol=native#text/plain
 compiler/version.pas svneol=native#text/plain
-compiler/vis/aasmcpu.pas svneol=native#text/plain
-compiler/vis/cpubase.pas svneol=native#text/plain
-compiler/vis/cpuinfo.pas svneol=native#text/plain
-compiler/vis/cpunode.pas svneol=native#text/plain
-compiler/vis/cpupara.pas svneol=native#text/plain
 compiler/widestr.pas svneol=native#text/plain
 compiler/wpo.pas svneol=native#text/plain
 compiler/wpobase.pas svneol=native#text/plain

+ 1 - 10
compiler/Makefile

@@ -330,9 +330,6 @@ override PACKAGE_VERSION=3.1.1
 unexport FPC_VERSION FPC_COMPILERINFO
 CYCLETARGETS=i386 powerpc sparc arm x86_64 powerpc64 m68k armeb mipsel mips avr jvm i8086 aarch64
 ALLTARGETS=$(CYCLETARGETS)
-ifdef ALPHA
-PPC_TARGET=alpha
-endif
 ifdef POWERPC
 PPC_TARGET=powerpc
 endif
@@ -436,9 +433,6 @@ MSGFILES=$(wildcard msg/error*.msg)
 ifeq ($(CPC_TARGET),i386)
 CPUSUF=386
 endif
-ifeq ($(CPC_TARGET),alpha)
-CPUSUF=axp
-endif
 ifeq ($(CPC_TARGET),m68k)
 CPUSUF=68k
 endif
@@ -3861,7 +3855,7 @@ INSTALLEXEFILE=$(PPCROSSNAME)
 else
 INSTALLEXEFILE=$(EXENAME)
 endif
-PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 alpha vis ia64 mips mipsel avr jvm i8086 aarch64
+PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 mips mipsel avr jvm i8086 aarch64
 INSTALL_TARGETS=$(addsuffix _exe_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS)))
 .PHONY: $(PPC_TARGETS) $(INSTALL_TARGETS)
 $(PPC_TARGETS):
@@ -3936,9 +3930,6 @@ insdat: insdatx86 insdatarm insdataarch64
 regdatarm : arm/armreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkarmreg.pp
 	cd arm && ..$(PATHSEP)utils$(PATHSEP)mkarmreg$(SRCEXEEXT)
-regdatia64 : ia64/ia64reg.dat
-	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkia64reg.pp
-	cd ia64 && ..$(PATHSEP)utils$(PATHSEP)mkia64reg$(SRCEXEEXT)
 regdatsp : sparc/spreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkspreg.pp
 	cd sparc && ..$(PATHSEP)utils$(PATHSEP)mkspreg$(SRCEXEEXT)

+ 1 - 11
compiler/Makefile.fpc

@@ -38,9 +38,6 @@ CYCLETARGETS=i386 powerpc sparc arm x86_64 powerpc64 m68k armeb mipsel mips avr
 ALLTARGETS=$(CYCLETARGETS)
 
 # Allow ALPHA, POWERPC, POWERPC64, M68K, I386, jvm defines for target cpu
-ifdef ALPHA
-PPC_TARGET=alpha
-endif
 ifdef POWERPC
 PPC_TARGET=powerpc
 endif
@@ -172,9 +169,6 @@ MSGFILES=$(wildcard msg/error*.msg)
 ifeq ($(CPC_TARGET),i386)
 CPUSUF=386
 endif
-ifeq ($(CPC_TARGET),alpha)
-CPUSUF=axp
-endif
 ifeq ($(CPC_TARGET),m68k)
 CPUSUF=68k
 endif
@@ -406,7 +400,7 @@ endif
 # CPU targets
 #####################################################################
 
-PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 alpha vis ia64 mips mipsel avr jvm i8086 aarch64
+PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 mips mipsel avr jvm i8086 aarch64
 INSTALL_TARGETS=$(addsuffix _exe_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS)))
 
 .PHONY: $(PPC_TARGETS) $(INSTALL_TARGETS)
@@ -521,10 +515,6 @@ regdatarm : arm/armreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkarmreg.pp
         cd arm && ..$(PATHSEP)utils$(PATHSEP)mkarmreg$(SRCEXEEXT)
 
-regdatia64 : ia64/ia64reg.dat
-            $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkia64reg.pp
-        cd ia64 && ..$(PATHSEP)utils$(PATHSEP)mkia64reg$(SRCEXEEXT)
-
 regdatsp : sparc/spreg.dat
             $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkspreg.pp
         cd sparc && ..$(PATHSEP)utils$(PATHSEP)mkspreg$(SRCEXEEXT)

+ 0 - 268
compiler/alpha/aasmcpu.pas

@@ -1,268 +0,0 @@
-{
-    Copyright (c) 1998-2000 by Florian Klaempfl
-
-    Implements the assembler classes specific for the Alpha
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  Implements the assembler classes specific for the Alpha.
-}
-unit aasmcpu;
-
-{$i fpcdefs.inc}
-
-  interface
-
-    uses
-       aasmbase,globals,verbose,
-       cpubase,aasmtai,aasmdata,aasmsym;
-
-    type
-      tai_frame = class(tai)
-         G,R : TRegister;
-         LS,LU : longint;
-        Constructor Create (GP : Tregister; Localsize : Longint; RA : TRegister; L : longint);
-        end;
-
-
-      taicpu = class(tai_cpu_abstract_sym)
-         constructor op_none(op : tasmop);
-
-         constructor op_reg(op : tasmop;_op1 : tregister);
-         constructor op_const(op : tasmop;_op1 : longint);
-         constructor op_ref(op : tasmop;_op1 : preference);
-
-         constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
-         constructor op_reg_ref(op : tasmop;_op1 : tregister;_op2 : preference);
-         constructor op_reg_const(op:tasmop; _op1: tregister; _op2: longint);
-
-         constructor op_const_reg(op : tasmop;_op1 : longint;_op2 : tregister);
-         constructor op_const_const(op : tasmop;_op1,_op2 : longint);
-         constructor op_const_ref(op : tasmop;_op1 : longint;_op2 : preference);
-
-         constructor op_ref_reg(op : tasmop;_op1 : preference;_op2 : tregister);
-         { this is only allowed if _op1 is an int value (_op1^.isintvalue=true) }
-         constructor op_ref_ref(op : tasmop;_op1,_op2 : preference);
-
-         constructor op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
-         constructor op_reg_const_reg(op : tasmop;_op1 : tregister;_op2 : longint;_op3 : tregister);
-         constructor op_const_ref_reg(op : tasmop;_op1 : longint;_op2 : preference;_op3 : tregister);
-         constructor op_reg_reg_ref(op : tasmop;_op1,_op2 : tregister; _op3 : preference);
-         constructor op_const_reg_ref(op : tasmop;_op1 : longint;_op2 : tregister;_op3 : preference);
-         constructor op_reg_ref_const(op : tasmop;_op1 : tregister;_op2 : preference;_op3 : longint);
-
-         { this is for Jmp instructions }
-         constructor op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
-
-         constructor op_sym(op : tasmop;_op1 : tasmsymbol);
-         constructor op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
-         constructor op_sym_ofs_reg(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint;_op2 : tregister);
-         constructor op_sym_ofs_ref(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint;_op2 : preference);
-      end;
-
-      tai_align = class(tai_align_abstract)
-        { nothing to add }
-      end;
-
-    procedure InitAsm;
-    procedure DoneAsm;
-
-implementation
-
-
-{*****************************************************************************
-                                 taicpu Constructors
-*****************************************************************************}
-
-
-    constructor taicpu.op_none(op : tasmop);
-      begin
-         inherited create(op);
-      end;
-
-
-    constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
-      begin
-         inherited create(op);
-         ops:=1;
-      end;
-
-
-    constructor taicpu.op_const(op : tasmop;_op1 : longint);
-      begin
-         inherited create(op);
-         ops:=1;
-      end;
-
-
-    constructor taicpu.op_ref(op : tasmop;_op1 : preference);
-      begin
-         inherited create(op);
-         ops:=1;
-      end;
-
-
-    constructor taicpu.op_reg_reg(op : tasmop;_op1,_op2 : tregister);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_reg_const(op:tasmop; _op1: tregister; _op2: longint);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_reg_ref(op : tasmop;_op1 : tregister;_op2 : preference);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_const_reg(op : tasmop;_op1 : longint;_op2 : tregister);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_const_const(op : tasmop;_op1,_op2 : longint);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_const_ref(op : tasmop;_op1 : longint;_op2 : preference);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-    constructor taicpu.op_ref_reg(op : tasmop;_op1 : preference;_op2 : tregister);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_ref_ref(op : tasmop;_op1,_op2 : preference);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
-      begin
-         inherited create(op);
-         ops:=3;
-      end;
-
-    constructor taicpu.op_reg_const_reg(op : tasmop;_op1 : tregister;_op2 : longint;_op3 : tregister);
-      begin
-         inherited create(op);
-         ops:=3;
-      end;
-
-     constructor taicpu.op_reg_reg_ref(op : tasmop;_op1,_op2 : tregister;_op3 : preference);
-      begin
-         inherited create(op);
-         ops:=3;
-      end;
-
-     constructor taicpu.op_const_ref_reg(op : tasmop;_op1 : longint;_op2 : preference;_op3 : tregister);
-      begin
-         inherited create(op);
-         ops:=3;
-      end;
-
-     constructor taicpu.op_const_reg_ref(op : tasmop;_op1 : longint;_op2 : tregister;_op3 : preference);
-      begin
-         inherited create(op);
-         ops:=3;
-      end;
-
-     constructor taicpu.op_reg_ref_const(op : tasmop;_op1 : tregister;_op2 : preference;_op3 : longint);
-      begin
-         inherited create(op);
-         ops:=3;
-      end;
-
-
-    constructor taicpu.op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
-      begin
-         inherited create(op);
-         condition:=cond;
-         ops:=1;
-      end;
-
-
-    constructor taicpu.op_sym(op : tasmop;_op1 : tasmsymbol);
-      begin
-         inherited create(op);
-         ops:=1;
-      end;
-
-
-    constructor taicpu.op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
-      begin
-         inherited create(op);
-         ops:=1;
-      end;
-
-
-    constructor taicpu.op_sym_ofs_reg(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint;_op2 : tregister);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-
-    constructor taicpu.op_sym_ofs_ref(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint;_op2 : preference);
-      begin
-         inherited create(op);
-         ops:=2;
-      end;
-
-    Constructor tai_frame.create (GP : Tregister; Localsize : Longint; RA : TRegister; L : longint);
-
-    begin
-      Inherited Create;
-      typ:=ait_frame;
-      G:=GP;
-      R:=RA;
-      LS:=LocalSize;
-      LU:=L;
-    end;
-
-    procedure InitAsm;
-      begin
-      end;
-
-
-    procedure DoneAsm;
-      begin
-      end;
-
-
-    end.

+ 0 - 126
compiler/alpha/agaxpgas.pas

@@ -1,126 +0,0 @@
-{
-    Copyright (c) 1998-2000 by Florian Klaempfl
-
-    This unit implements an asm for the DEC Alpha
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit agaxpgas;
-
-  {$i fpcdefs.inc}
-
-  interface
-
-    uses
-       globals,systems,aasmbase,aasmtai,aasmdata,
-       aggas,cpubase;
-
-    type
-      TAXPGNUAssembler=class(TGNUAssembler)
-        procedure WriteInstruction(hp : tai);override;
-      end;
-
-    const
-       gas_reg2str : array[tregister] of string[4] = (
-         '',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '','',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '',''
-       );
-
-  implementation
-
-    const
-       op2str : array[tasmop] of string[14] = (
-          'addf','addg','addl','addq',
-          'adds','addt','amask','and','beq','bge',
-          'bgt','bic','bis','blbc','blbs','ble',
-          'blt','bne','br','bsr','call_pal','cmoveq',
-          'cmovge','cmovgt','cmovlbc','cmovlbs','cmovle','cmovlt',
-          'cmovne','cmpbge','cmpeq','cmpgeq','cmpgle','cmpglt',
-          'cmple','cmplt','cmpteq','cmptle','cmptlt','cmptun',
-          'cmpule','cmpult','cpys','cpyse','cpysn','ctlz',
-          'ctpop','cttz','cvtdg','cvtgd','cvtgf','cvtgq',
-          'cvtlq','cvtqf','cvtqg','cvtql','cvtqs','cvtqt',
-          'cvtst','cvttq','cvtts','divf','divg','divs',
-          'divt','ecb','eqv','excb','extbl','extlh',
-          'extll','extqh','extql','extwh','extwl','fbeq',
-          'fbge','fbgt','fble','fblt','fbne','fcmoveq',
-          'fcmovge','fcmovgt','fcmovle','fcmovlt','fcmovne','fetch',
-          'fetch_m','ftois','ftoit','implver','insbl','inslh',
-          'insll','insqh','insql','inswh','inswl','itoff',
-          'itofs','itoft','jmp','jsr','jsr_coroutine','lda',
-          'ldah','ldbu','ldwu','ldf','ldg','ldl',
-          'ldl_l','ldq','ldq_l','ldq_u','lds','ldt',
-          'maxsb8','maxsw4','maxub8','maxuw4','mb','mf_fpcr',
-          'minsb8','minsw4','minub8','minuw4','mskbl','msklh',
-          'mskll','mskqh','mskql','mskwh','mskwl','mt_fpcr',
-          'mulf','mulg','mull','mulq',
-          'muls','mult','ornot','perr','pklb','pkwb',
-          'rc','ret','rpcc','rs','s4addl','s4addq',
-          's4subl','s4subq','s8addl','s8addq','s8subl','s8subq',
-          'sextb','sextw','sll','sqrtf','sqrtg','sqrts',
-          'sqrtt','sra','srl','stb','stf','stg',
-          'sts','stl','stl_c','stq','stq_c','stq_u',
-          'stt','stw','subf','subg','subl',
-          'subq','subs','subt','trapb','umulh','unpkbl',
-          'unpkbw','wh64','wmb','xor','zap','zapnot',
-          'ldgp');
-
-      procedure TAXPGNUAssembler.WriteInstruction (hp : tai);
-        begin
-(*
-               op:=paicpu(hp)^.opcode;
-               calljmp:=is_calljmp(op);
-             { call maybe not translated to calll }
-               s:=#9+att_op2str[op]+cond2str[paicpu(hp)^.condition];
-               if (not calljmp) and
-                  (not att_nosuffix[op]) and
-                  not(
-                   (paicpu(hp)^.oper[0].typ=top_reg) and
-                   (paicpu(hp)^.oper[0].reg in [R_ST..R_ST7])
-                  ) then
-                s:=s+att_opsize2str[paicpu(hp)^.opsize];
-             { process operands }
-               if paicpu(hp)^.ops<>0 then
-                begin
-                { call and jmp need an extra handling                          }
-                { this code is only called if jmp isn't a labeled instruction }
-                  if calljmp then
-                   s:=s+#9+getopstr_jmp(paicpu(hp)^.oper[0])
-                  else
-                   begin
-                     for i:=0to paicpu(hp)^.ops-1 do
-                      begin
-                        if i=0 then
-                         sep:=#9
-                        else
-                         sep:=',';
-                        s:=s+sep+getopstr(paicpu(hp)^.oper[i])
-                      end;
-                   end;
-                end;
-               AsmWriteLn(s);
-*)
-             end;
-
-end.

+ 0 - 38
compiler/alpha/aoptcpu.pas

@@ -1,38 +0,0 @@
-{
-    Copyright (c) 1998-2000 by Jonas Maebe, member of the Free Pascal
-    Development Team
-
-    This unit implements the Alpha optimizer object
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-
-
-Unit aoptcpu;
-
-Interface
-
-uses cpubase, aoptobj, aoptcpub;
-
-Type
-  TAOptCpu = Object(TAoptObj)
-    { uses the same constructor as TAopObj }
-  End;
-
-Implementation
-
-End.

+ 0 - 112
compiler/alpha/aoptcpub.pas

@@ -1,112 +0,0 @@
- {
-    Copyright (c) 1998-2000 by Jonas Maebe, member of the Free Pascal
-    Development Team
-
-    This unit contains several types and constants necessary for the
-    optimizer to work on the 80x86 architecture
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
-
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{ enable the following define if memory references can have a scaled index }
-{$define RefsHaveScale}
-
-{ enable the following define if memory references can have a segment }
-{ override                                                            }
-
-{ define RefsHaveSegment}
-
-Interface
-
-Uses
-  CPUAsm,AOptBase;
-
-Type
-
-{ type of a normal instruction }
-  TInstr = Taicpu;
-  PInstr = ^TInstr;
-
-{ ************************************************************************* }
-{ **************************** TCondRegs ********************************** }
-{ ************************************************************************* }
-{ Info about the conditional registers                                      }
-  TCondRegs = Object
-    Constructor Init;
-    Destructor Done;
-  End;
-
-{ ************************************************************************* }
-{ **************************** TAoptBaseCpu ******************************* }
-{ ************************************************************************* }
-
-  TAoptBaseCpu = Object(TAoptBase)
-  End;
-
-
-{ ************************************************************************* }
-{ ******************************* Constants ******************************* }
-{ ************************************************************************* }
-Const
-
-{ the maximum number of things (registers, memory, ...) a single instruction }
-{ changes                                                                    }
-
-  MaxCh = 3;
-
-{ the maximum number of operands an instruction has }
-
-  MaxOps = 3;
-
-{Oper index of operand that contains the source (reference) with a load }
-{instruction                                                            }
-
-  LoadSrc = 0;
-
-{Oper index of operand that contains the destination (register) with a load }
-{instruction                                                                }
-
-  LoadDst = 1;
-
-{Oper index of operand that contains the source (register) with a store }
-{instruction                                                            }
-
-  StoreSrc = 0;
-
-{Oper index of operand that contains the destination (reference) with a load }
-{instruction                                                                 }
-
-  StoreDst = 1;
-
-Implementation
-
-{ ************************************************************************* }
-{ **************************** TCondRegs ********************************** }
-{ ************************************************************************* }
-Constructor TCondRegs.init;
-Begin
-End;
-
-Destructor TCondRegs.Done; {$ifdef inl} inline; {$endif inl}
-Begin
-End;
-
-End.

+ 0 - 38
compiler/alpha/aoptcpuc.pas

@@ -1,38 +0,0 @@
- {
-    Copyright (c) 1998-2000 by Jonas Maebe, member of the Free Pascal
-    Development Team
-
-    This unit contains the processor specific implementation of the
-    assembler optimizer common subexpression elimination object.
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit aoptcpuc;
-
-Interface
-
-Uses
-  AOptCs;
-
-Type
-  TRegInfoCpu = Object(TRegInfo)
-  End;
-
-
-Implementation
-
-End.

+ 0 - 39
compiler/alpha/aoptcpud.pas

@@ -1,39 +0,0 @@
-{
-    Copyright (c) 1998-2000 by Jonas Maebe, member of the Free Pascal
-    Development Team
-
-    This unit contains the processor specific implementation of the
-    assembler optimizer data flow analyzer.
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-Unit aoptcpud;
-
-Interface
-
-uses
-  AOptDA;
-
-Type
-  PAOptDFACpu = ^TAOptDFACpu;
-  TAOptDFACpu = Object(TAOptDFA)
-  End;
-
-Implementation
-
-
-End.

+ 0 - 168
compiler/alpha/cgcpu.pas

@@ -1,168 +0,0 @@
-{
-    Copyright (c) 1998-2000 by Florian Klaempfl
-
-    This unit implements the code generator for the Alpha
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  This unit implements the code generator for the Alpha.
-}
-unit cgcpu;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses
-   cgbase,cgobj,aasmbase,aasmtai,aasmdata,aasmcpu,cginfo,cpubase,cpuinfo;
-
-type
-pcgalpha = ^tcgalpha;
-tcgalpha = class(tcg)
-  procedure a_call_name(list : TAsmList;const s : string);override;
-  procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aword;register : tregister);override;
-  procedure a_load_reg_ref(list : TAsmList;size : tcgsize;register : tregister;const ref : treference);override;
-  procedure a_load_ref_reg(list : TAsmList;size : tcgsize;const ref : treference;register : tregister);override;
-  procedure a_load_reg_reg(list : TAsmList;fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
-  procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aword;
-    reg : tregister;  l : tasmlabel);override;
-  procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
-  procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister;l : tasmlabel);
-  procedure a_cmp_ref_const_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aword;
-    reg : tregister; l : tasmlabel);
-  procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
-  procedure g_stackframe_entry(list : TAsmList;localsize : longint);override;
-  procedure g_maybe_loadself(list : TAsmList);override;
-  procedure g_restore_frame_pointer(list : TAsmList);override;
-end;
-
-procedure create_codegen;
-
-implementation
-
-uses
-   globtype,globals;
-
-procedure tcgalpha.g_stackframe_entry(list : TAsmList;localsize : longint);
-
-begin
-   list.concat(taicpu.op_reg_ref(A_LDGP,Global_pointer,new_reference(R_27,0)));
-   list.concat(taicpu.op_reg_ref(A_LDA,stack_pointer_reg,new_reference(stack_pointer_reg,-LocalSize)));
-   If LocalSize<>0 then
-     list.concat(tai_frame.create(Global_pointer,LocalSize,R_27,0));
-   { Always generate a frame pointer. }
-   list.concat(taicpu.op_reg_reg_reg(A_BIS,stack_pointer_reg,stack_pointer_reg,frame_pointer_reg));
-end;
-
-procedure g_exitcode(list : TAsmList;parasize : longint; nostackframe,inlined : boolean);
-
-begin
-   { Restore stack pointer from frame pointer }
-   list.Concat (taicpu.op_reg_reg_reg(A_BIS,frame_pointer_reg,frame_pointer_reg,stack_pointer_reg));
-   { Restore previous stack position}
-   list.Concat (taicpu.op_reg_const_reg(A_ADDQ,stack_pointer_reg,Parasize,stack_pointer_reg));
-   { return... }
-   list.Concat(taicpu.op_reg_ref_const(A_RET,stack_pointer_reg,new_reference(Return_pointer,0),1));
-    { end directive
-    Concat (paiend,init(''));
-    }
-end;
-
-procedure tcgalpha.a_call_name(list : TAsmList;const s : string);
-
-  begin
-     { list^.concat(taicpu,op_sym(A_CALL,S_NO,newasmsymbol(s,AB_EXTERNAL,AT_FUNCTION)))); }
-     {!!!!!!!!!1 offset is ignored }
-     abstract;
-  end;
-
-procedure tcgalpha.a_load_const_reg(list : TAsmList;size : tcgsize;a : aword;register : tregister);
-
-begin
-end;
-
-
-procedure tcgalpha.a_load_reg_ref(list : TAsmList;size : tcgsize;register : tregister;const ref : treference);
-
-begin
-end;
-
-
-procedure tcgalpha.a_load_ref_reg(list : TAsmList;size : tcgsize;const ref : treference;register : tregister);
-
-begin
-end;
-
-
-procedure tcgalpha.a_load_reg_reg(list : TAsmList;fromsize, tosize : tcgsize;reg1,reg2 : tregister);
-
-begin
-end;
-
-
-procedure tcgalpha.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
-  l : tasmlabel);
-
-begin
-end;
-
-
-procedure tcgalpha.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
-
-begin
-end;
-
-
-procedure tcgalpha.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister;l : tasmlabel);
-
-begin
-end;
-
-
-procedure tcgalpha.a_cmp_ref_const_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aword;
-  reg : tregister; l : tasmlabel);
-
-begin
-end;
-
-
-procedure tcgalpha.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
-
-begin
-end;
-
-
-procedure tcgalpha.g_maybe_loadself(list : TAsmList);
-
-begin
-end;
-
-
-procedure tcgalpha.g_restore_frame_pointer(list : TAsmList);
-
-begin
-end;
-
-
-procedure create_codegen;
-  begin
-    cg:=tcgalpha.create;
-    cg128:=tcg128.create;
-  end;
-
-end.

+ 0 - 431
compiler/alpha/cpubase.pas

@@ -1,431 +0,0 @@
-{
-    Copyright (C) 1998-2000 by Florian Klaempfl
-
-    This unit implements an asmlistitem class for the Alpha architecture.
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  This unit implements an asmlistitem class for the Alpha architecture.
-}
-unit cpubase;
-
-{$i fpcdefs.inc}
-
-  interface
-
-    uses
-       cutils,cclasses,globals,aasmbase,cpuinfo,cginfo;
-
-    type
-       { all registers }
-       TRegister = (R_NO,  { R_NO is Mandatory, signifies no register }
-                    R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,
-                    R_10,R_11,R_12,R_13,R_14,R_15,R_16,R_17,R_18,R_19,
-                    R_20,R_21,R_22,R_23,R_24,R_25,R_26,R_27,R_28,R_29,
-                    R_30,R_31,
-                    R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,
-                    R_F10,R_F11,R_F12,R_F13,R_F14,R_F15,R_F16,R_F17,R_F18,R_F19,
-                    R_F20,R_F21,R_F22,R_F23,R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,
-                    R_F30,R_F31);
-
-       tasmop = (A_ADDF,A_ADDG,A_ADDL,A_ADDQ,
-                 A_ADDS,A_ADDT,A_AMASK,A_AND,A_BEQ,A_BGE,
-                 A_BGT,A_BIC,A_BIS,A_BLBC,A_BLBS,A_BLE,
-                 A_BLT,A_BNE,A_BR,A_BSR,A_CALL_PAL,A_CMOVEQ,
-                 A_CMOVGE,A_CMOVGT,A_CMOVLBC,A_CMOVLBS,A_CMOVLE,A_CMOVLT,
-                 A_CMOVNE,A_CMPBGE,A_CMPEQ,A_CMPGEQ,A_CMPGLE,A_CMPGLT,
-                 A_CMPLE,A_CMPLT,A_CMPTEQ,A_CMPTLE,A_CMPTLT,A_CMPTUN,
-                 A_CMPULE,A_CMPULT,A_CPYS,A_CPYSE,A_CPYSN,A_CTLZ,
-                 A_CTPOP,A_CTTZ,A_CVTDG,A_CVTGD,A_CVTGF,A_CVTGQ,
-                 A_CVTLQ,A_CVTQF,A_CVTQG,A_CVTQL,A_CVTQS,A_CVTQT,
-                 A_CVTST,A_CVTTQ,A_CVTTS,A_DIVF,A_DIVG,A_DIVS,
-                 A_DIVT,A_ECB,A_EQV,A_EXCB,A_EXTBL,A_EXTLH,
-                 A_EXTLL,A_EXTQH,A_EXTQL,A_EXTWH,A_EXTWL,A_FBEQ,
-                 A_FBGE,A_FBGT,A_FBLE,A_FBLT,A_FBNE,A_FCMOVEQ,
-                 A_FCMOVGE,A_FCMOVGT,A_FCMOVLE,A_FCMOVLT,A_FCMOVNE,A_FETCH,
-                 A_FETCH_M,A_FTOIS,A_FTOIT,A_IMPLVER,A_INSBL,A_INSLH,
-                 A_INSLL,A_INSQH,A_INSQL,A_INSWH,A_INSWL,A_ITOFF,
-                 A_ITOFS,A_ITOFT,A_JMP,A_JSR,A_JSR_COROUTINE,A_LDA,
-                 A_LDAH,A_LDBU,A_LDWU,A_LDF,A_LDG,A_LDL,
-                 A_LDL_L,A_LDQ,A_LDQ_L,A_LDQ_U,A_LDS,A_LDT,
-                 A_MAXSB8,A_MAXSW4,A_MAXUB8,A_MAXUW4,A_MB,A_MF_FPCR,
-                 A_MINSB8,A_MINSW4,A_MINUB8,A_MINUW4,A_MSKBL,A_MSKLH,
-                 A_MSKLL,A_MSKQH,A_MSKQL,A_MSKWH,A_MSKWL,A_MT_FPCR,
-                 A_MULF,A_MULG,A_MULL,A_MULQ,
-                 A_MULS,A_MULT,A_ORNOT,A_PERR,A_PKLB,A_PKWB,
-                 A_RC,A_RET,A_RPCC,A_RS,A_S4ADDL,A_S4ADDQ,
-                 A_S4SUBL,A_S4SUBQ,A_S8ADDL,A_S8ADDQ,A_S8SUBL,A_S8SUBQ,
-                 A_SEXTB,A_SEXTW,A_SLL,A_SQRTF,A_SQRTG,A_SQRTS,
-                 A_SQRTT,A_SRA,A_SRL,A_STB,A_STF,A_STG,
-                 A_STS,A_STL,A_STL_C,A_STQ,A_STQ_C,A_STQ_U,
-                 A_STT,A_STW,A_SUBF,A_SUBG,A_SUBL,
-                 A_SUBQ,A_SUBS,A_SUBT,A_TRAPB,A_UMULH,
-                 A_UNPKBL,A_UNPKBW,A_WH64,A_WMB,A_XOR,A_ZAP,
-                 A_ZAPNOT
-                 { Psuedo code understood by the gnu assembler }
-                 ,A_LDGP);
-
-    const
-       firstop = low(tasmop);
-       lastop  = high(tasmop);
-
-       std_reg2str : array[tregister] of string[4] = (
-         '',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '','',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '','','','','','','','','','',
-         '',''
-       );
-
-
-    type
-       TAsmCond =
-        (
-         C_None,C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
-         C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,C_NS,C_NZ,C_O,C_P,
-         C_PE,C_PO,C_S,C_Z
-        );
-
-        TRegisterset = Set of TRegister;
-
-        tregister64 = tregister;
-
-    Const
-       Firstreg = R_0;
-       LastReg = R_F31;
-
-
-{*****************************************************************************
-                          Default generic sizes
-*****************************************************************************}
-
-       { Defines the default address size for a processor, }
-       OS_ADDR = OS_64;
-       { the natural int size for a processor,
-         has to match osuinttype/ossinttype as initialized in psystem }
-       OS_INT = OS_64;
-       { the maximum float size for a processor,           }
-       OS_FLOAT = OS_F80;
-       { the size of a vector register for a processor     }
-       OS_VECTOR = OS_M64;
-
-       stack_pointer_reg = R_30;
-       frame_pointer_reg = R_15;
-       self_pointer_reg = R_16;
-       accumulator   = R_0;
-  {the return_result_reg, is used inside the called function to store its return
-  value when that is a scalar value otherwise a pointer to the address of the
-  result is placed inside it}
-        return_result_reg               =       accumulator;
-
-  {the function_result_reg contains the function result after a call to a scalar
-  function othewise it contains a pointer to the returned result}
-        function_result_reg     =       accumulator;
-       fpu_result_reg = R_F0;
-       global_pointer = R_29;
-       return_pointer = R_26;
-       { it is used to pass the offset to the destructor helper routine }
-       vmt_offset_reg = R_1;
-
-     { low and high of the available maximum width integer general purpose }
-     { registers                                                           }
-       LoGPReg = R_0;
-       HiGPReg = R_31;
-
-       { low and high of every possible width general purpose register (same as
-         above on most architctures apart from the 80x86)                       }
-       LoReg = R_0;
-       HiReg = R_31;
-
-       maxfpuregs = 32;
-
-       max_operands = 4;
-
-       registers_saved_on_cdecl = [R_9..R_14,R_F2..R_F9];
-
-       maxvarregs = 6;
-       varregs : Array [1..maxvarregs] of Tregister =
-                 (R_9,R_10,R_11,R_12,R_13,R_14);
-
-       maxfpuvarregs = 8;
-
-       { Registers which are defined as scratch and no need to save across
-         routine calls or in assembler blocks.
-       }
-       max_scratch_regs = 2;
-       scratch_regs : array[1..max_scratch_regs] of tregister = (R_1,R_2);
-
-{*****************************************************************************
-                               GDB Information
-*****************************************************************************}
-
-       {  Register indexes for stabs information, when some
-         parameters or variables are stored in registers.
-       }
-       stab_regindex : array[tregister] of shortint =
-          (0,
-           0,0,0,0,0,0,0,0,0,0,
-           0,0,0,0,0,0,0,0,0,0,
-           0,0,0,0,0,0,0,0,0,0,
-           0,0,
-           0,0,0,0,0,0,0,0,0,0,
-           0,0,0,0,0,0,0,0,0,0,
-           0,0,0,0,0,0,0,0,0,0,
-           0,0
-          );
-
-{*****************************************************************************
-                                   Flags
-*****************************************************************************}
-       type
-       { The Alpha doesn't have flags but some generic code depends on this type. }
-       TResFlags = (F_NO);
-
-
-       { reference record }
-       pparareference = ^tparareference;
-       tparareference = packed record
-          index       : tregister;
-          offset      : longint;
-       end;
-
-       trefoptions=(ref_none,ref_parafixup,ref_localfixup,ref_selffixup);
-
-       TReference = record
-         offset : aword;
-         symbol : tasmsymbol;
-         base : tregister;
-         { The index isn't used by the alpha port, but some generic code depends on it }
-         index : tregister;
-         is_immediate : boolean;
-         offsetfixup : word; {needed for inline}
-         options     : trefoptions;
-         { the boundary to which the reference is surely aligned }
-         alignment : byte;
-       end;
-       PReference = ^TReference;
-
-       TLoc=(
-              LOC_INVALID,      { added for tracking problems}
-              LOC_CONSTANT,     { constant value }
-              LOC_JUMP,         { boolean results only, jump to false or true label }
-              LOC_FLAGS,        { boolean results only, flags are set }
-              LOC_CREFERENCE,   { in memory constant value reference (cannot change) }
-              LOC_REFERENCE,    { in memory value }
-              LOC_REGISTER,     { in a processor register }
-              LOC_CREGISTER,    { Constant register which shouldn't be modified }
-              LOC_FPUREGISTER,  { FPU stack }
-              LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
-              LOC_SSEREGISTER,
-              LOC_CSSEREGISTER,
-              LOC_CMMREGISTER,
-              LOC_MMREGISTER
-            );
-
-      { tparamlocation describes where a parameter for a procedure is stored.
-        References are given from the caller's point of view. The usual
-        TLocation isn't used, because contains a lot of unnessary fields.
-      }
-      tparalocation = packed record
-         size : TCGSize;
-         loc  : TLoc;
-         sp_fixup : longint;
-         case TLoc of
-            LOC_REFERENCE : (reference : tparareference);
-            { segment in reference at the same place as in loc_register }
-            LOC_REGISTER,LOC_CREGISTER : (
-              case longint of
-                1 : (register,register64.reghi : tregister);
-                { overlay a register64.reglo }
-                2 : (register64.reglo : tregister);
-                { overlay a 64 Bit register type }
-                3 : (reg64 : tregister64);
-                4 : (register64 : tregister64);
-              );
-      end;
-
-      tlocation = packed record
-         loc  : TLoc;
-         size : TCGSize;
-         case TLoc of
-            LOC_CONSTANT : (
-              case longint of
-                1 : (value : AWord);
-                { can't do this, this layout depends on the host cpu. Use }
-                { lo(valueqword)/hi(valueqword) instead (JM)              }
-                { 2 : (valuelow, valuehigh:AWord);                        }
-                { overlay a complete 64 Bit value }
-                3 : (valueqword : qword);
-              );
-            LOC_CREFERENCE,
-            LOC_REFERENCE : (reference : treference);
-            { segment in reference at the same place as in loc_register }
-            LOC_REGISTER,LOC_CREGISTER : (
-              case longint of
-                1 : (register,register64.reghi,segment : tregister);
-                { overlay a register64.reglo }
-                2 : (register64.reglo : tregister);
-                { overlay a 64 Bit register type }
-                3 : (reg64 : tregister64);
-                4 : (register64 : tregister64);
-              );
-      end;
-
-{*****************************************************************************
-                                Operands
-*****************************************************************************}
-
-
-        { Types of operand }
-        toptype=(top_none,top_reg,top_ref,top_const,top_symbol);
-
-        toper=record
-          ot  : longint;
-          case typ : toptype of
-           top_none   : ();
-           top_reg    : (reg:tregister);
-           top_ref    : (ref:preference);
-           top_const  : (val:longint);
-           top_symbol : (sym:tasmsymbol;symofs:longint);
-        end;
-
-   const
-      { Registers which must be saved when calling a routine declared as
-        cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
-        saved should be the ones as defined in the target ABI and / or GCC.
-
-        This value can be deduced from the CALLED_USED_REGISTERS array in the
-        GCC source.
-      }
-      std_saved_registers = [];
-      { Required parameter alignment when calling a routine declared as
-        stdcall and cdecl. The alignment value should be the one defined
-        by GCC or the target ABI.
-
-        The value of this constant is equal to the constant
-        PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
-      }
-      std_param_align = 8;
-
-      { offsets for the integer and floating point registers }
-      INT_REG = 0;
-      FLOAT_REG = 32;
-
-      { operator qualifiers }
-      OQ_CHOPPED_ROUNDING            = $01;  { /C }
-      OQ_ROUNDING_MODE_DYNAMIC       = $02;  { /D }
-      OQ_ROUND_TOWARD_MINUS_INFINITY = $04;  { /M }
-      OQ_INEXACT_RESULT_ENABLE        = $08; { /I }
-      OQ_SOFTWARE_COMPLETION_ENABLE  = $10;  { /S }
-      OQ_FLOATING_UNDERFLOW_ENABLE   = $20;  { /U }
-      OQ_INTEGER_OVERFLOW_ENABLE     = $40;  { /V }
-
-
-{*****************************************************************************
-                   Opcode propeties (needed for optimizer)
-*****************************************************************************}
-
-{$ifndef NOOPT}
-Type
-{What an instruction can change}
-  TInsChange = (Ch_None);
-{$endif}
-
-
-{ resets all values of ref to defaults }
-procedure reset_reference(var ref : treference);
-{ set mostly used values of a new reference }
-function new_reference(base : tregister;offset : longint) : preference;
-function newreference(const r : treference) : preference;
-procedure disposereference(var r : preference);
-
-function reg2str(r : tregister) : string;
-
-{*****************************************************************************
-                                  Init/Done
-*****************************************************************************}
-
-  procedure InitCpu;
-  procedure DoneCpu;
-
-implementation
-
-uses
-   verbose;
-
-function reg2str(r : tregister) : string;
-
-  begin
-     if r in [R_0..R_31] then
-       reg2str:='R'+tostr(longint(r)-longint(R_0))
-     else if r in [R_F0..R_F31] then
-       reg2str:='F'+tostr(longint(r)-longint(R_F0))
-     else internalerror(38991);
-  end;
-
-procedure reset_reference(var ref : treference);
-begin
-  FillChar(ref,sizeof(treference),0);
-end;
-
-
-function new_reference(base : tregister;offset : longint) : preference;
-var
-  r : preference;
-begin
-  new(r);
-  FillChar(r^,sizeof(treference),0);
-  r^.offset:=offset;
-  r^.alignment:=8;
-  new_reference:=r;
-end;
-
-function newreference(const r : treference) : preference;
-
-var
-   p : preference;
-begin
-   new(p);
-   p^:=r;
-   newreference:=p;
-end;
-
-procedure disposereference(var r : preference);
-
-begin
-  dispose(r);
-  r:=Nil;
-end;
-
-{*****************************************************************************
-                                  Init/Done
-*****************************************************************************}
-
-  procedure InitCpu;
-    begin
-    end;
-
-  procedure DoneCpu;
-    begin
-    end;
-
-end.

+ 0 - 91
compiler/alpha/cpuinfo.pas

@@ -1,91 +0,0 @@
-{
-    This file is part of the Free Pascal run time library.
-    Copyright (c) 1998-2000 by the Free Pascal development team
-
-    Basic Processor information about the Alpha
-
-    See the file COPYING.FPC, included in this distribution,
-    for details about the copyright.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-
- **********************************************************************}
-{
-  Basic Processor information about the Alpha
-}
-Unit CPUInfo;
-
-{$i fpcdefs.inc}
-
-Interface
-
-uses
- globtype;
-
-Type
-   { Natural integer register type and size for the target machine }
-{$ifdef FPC}
-   AWord = Qword;
-{$else FPC}
-   AWord = Longint;
-{$endif FPC}
-   PAWord = ^AWord;
-
-   { This must be an ordinal type with the same size as a pointer
-     Note: Must be unsigned! Otherwise, ugly code like
-     pointer(-1) will result in a pointer with the value
-     $fffffffffffffff on a 32bit machine if the compiler uses
-     int64 constants internally (JM)                              }
-   TConstPtrUInt = qword;
-
-   bestreal = extended;
-{$if FPC_FULLVERSION>20700}
-   bestrealrec = TExtended80Rec;
-{$endif FPC_FULLVERSION>20700}
-   ts32real = single;
-   ts64real = double;
-   ts80real = extended;
-   ts64comp = extended;
-
-   pbestreal=^bestreal;
-
-   { possible supported processors for this target }
-   tcputype =
-      (cpu_none,
-       ClassEV7,
-       ClassEV8
-      );
-
-   tcontrollertype =
-     (ct_none
-     );
-
-
-Const
-   { Is there support for dealing with multiple microcontrollers available }
-   { for this platform? }
-   ControllerSupport = false;
-   { Size of native extended type }
-   extended_size = 16;
-   {# Size of a pointer                           }
-   aint_size  = 8;
-   {# Size of a multimedia register               }
-   mmreg_size = 8;
-
-   { We know that there are fields after sramsize
-     but we don't care about this warning }
-   {$PUSH}
-    {$WARN 3177 OFF}
-   embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
-   (
-      (controllertypestr:''; controllerunitstr:''; flashbase:0; flashsize:0; srambase:0; sramsize:0));
-   {$POP}
-
-   { target cpu string (used by compiler options) }
-   target_cpu_string = 'alpha';
-
-Implementation
-
-end.

+ 0 - 56
compiler/alpha/cpunode.pas

@@ -1,56 +0,0 @@
-{
-    Copyright (c) 2000-2002 by Florian Klaempfl
-
-    Imports the Alpha code generator
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  This unit imports the Alpha code generator.
-}
-unit cpunode;
-
-{$i fpcdefs.inc}
-
-  interface
-
-  implementation
-
-    uses
-       { generic nodes }
-       ncgbas,ncgld,ncgflw,ncgcnv,ncgmem,ncgcon,ncgcal,ncgset,ncginl,
-       { to be able to only parts of the generic code,
-         the processor specific nodes must be included
-         after the generic one (FK)
-       }
-//       naxpadd,
-//       naxpcal,
-//       naxpcon,
-//       naxpflw,
-//       naxpmem,
-//       naxpset,
-//       naxpinl,
-//       nppcopt,
-       { this not really a node }
-//       naxpobj,
-//       naxpmat,
-//       naxpcnv,
-         { symtable }
-         symcpu
-       ;
-
-end.

+ 0 - 270
compiler/alpha/cpupara.pas

@@ -1,270 +0,0 @@
-{
-    Copyright (c) 2002 by Florian Klaempfl
-
-    Alpha specific calling conventions
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- ****************************************************************************
-}
-{ Alpha specific calling conventions are handled by this unit
-}
-unit cpupara;
-
-{$i fpcdefs.inc}
-
-  interface
-
-    uses
-       cpubase,
-       symconst,symbase,symtype,symdef,paramgr;
-
-    type
-       tcpuparamanager = class(tparamanager)
-          procedure create_param_loc_info(p : tabstractprocdef);override;
-          function getfuncretparaloc(p : tabstractprocdef) : tparalocation;override;
-       end;
-
-  implementation
-
-    uses
-       verbose,
-       globtype,
-       cpuinfo,cginfo,cgbase,
-       defbase;
-
-    function getparaloc(p : tdef) : tloc;
-
-      begin
-         { Later, the LOC_REFERENCE is in most cases changed into LOC_REGISTER
-           if push_addr_param for the def is true
-         }
-         case p.typ of
-            orddef:
-              getparaloc:=LOC_REGISTER;
-            floatdef:
-              getparaloc:=LOC_FPUREGISTER;
-            enumdef:
-              getparaloc:=LOC_REGISTER;
-            pointerdef:
-              getparaloc:=LOC_REGISTER;
-            formaldef:
-              getparaloc:=LOC_REGISTER;
-            classrefdef:
-              getparaloc:=LOC_REGISTER;
-            recorddef:
-              getparaloc:=LOC_REFERENCE;
-            objectdef:
-              if is_object(p) then
-                getparaloc:=LOC_REFERENCE
-              else
-                getparaloc:=LOC_REGISTER;
-            stringdef:
-              if is_shortstring(p) or is_longstring(p) then
-                getparaloc:=LOC_REFERENCE
-              else
-                getparaloc:=LOC_REGISTER;
-            procvardef:
-              if (po_methodpointer in tprocvardef(p).procoptions) then
-                getparaloc:=LOC_REFERENCE
-              else
-                getparaloc:=LOC_REGISTER;
-            filedef:
-              getparaloc:=LOC_REGISTER;
-            arraydef:
-              getparaloc:=LOC_REFERENCE;
-            setdef:
-              if is_smallset(p) then
-                getparaloc:=LOC_REGISTER
-              else
-                getparaloc:=LOC_REFERENCE;
-            variantdef:
-              getparaloc:=LOC_REFERENCE;
-            { avoid problems with errornous definitions }
-            errordef:
-              getparaloc:=LOC_REGISTER;
-            else
-              internalerror(2002071001);
-         end;
-      end;
-
-    procedure tcpuparamanager.create_param_loc_info(p : tabstractprocdef);
-
-      var
-         nextintreg,nextfloatreg,nextmmreg : tregister;
-         stack_offset : aword;
-         hp : tparaitem;
-         loc : tloc;
-         is_64bit: boolean;
-
-      begin
-         nextintreg:=R_3;
-         nextfloatreg:=R_F1;
-         // nextmmreg:=R_M1;
-         stack_offset:=0;
-         { pointer for structured results ? }
-         if not is_void(p.returndef) then
-           begin
-              if not(ret_in_reg(p.returndef)) then
-                inc(nextintreg);
-           end;
-
-         { frame pointer for nested procedures? }
-         { inc(nextintreg);                     }
-         { constructor? }
-         { destructor? }
-         hp:=tparaitem(p.para.last);
-         while assigned(hp) do
-           begin
-              loc:=getparaloc(hp.paratype.def);
-              hp.paraloc.sp_fixup:=0;
-              case loc of
-                 LOC_REGISTER:
-                   begin
-                      hp.paraloc.size := def_cgsize(hp.paratype.def);
-                      { for things like formaldef }
-                      if hp.paraloc.size = OS_NO then
-                        hp.paraloc.size := OS_ADDR;
-                      is_64bit := hp.paraloc.size in [OS_64,OS_S64];
-                      if nextintreg<=tregister(ord(R_10)-ord(is_64bit))  then
-                        begin
-                           hp.paraloc.loc:=LOC_REGISTER;
-                           hp.paraloc.register64.reglo:=nextintreg;
-                           inc(nextintreg);
-                           if is_64bit then
-                             begin
-                               hp.paraloc.register64.reghi:=nextintreg;
-                               inc(nextintreg);
-                             end;
-                        end
-                      else
-                         begin
-                            nextintreg := R_11;
-                            hp.paraloc.loc:=LOC_REFERENCE;
-                            hp.paraloc.reference.index:=stack_pointer_reg;
-                            hp.paraloc.reference.offset:=stack_offset;
-                            if not is_64bit then
-                              inc(stack_offset,4)
-                            else
-                              inc(stack_offset,8);
-                        end;
-                   end;
-                 LOC_FPUREGISTER:
-                   begin
-                      if hp.paratyp in [vs_var,vs_out] then
-                        begin
-                            if nextintreg<=R_10 then
-                             begin
-                                hp.paraloc.size:=OS_ADDR;
-                                hp.paraloc.loc:=LOC_REGISTER;
-                                hp.paraloc.register:=nextintreg;
-                                inc(nextintreg);
-                             end
-                           else
-                              begin
-                                 {!!!!!!!}
-                                 hp.paraloc.size:=def_cgsize(hp.paratype.def);
-                                 internalerror(2002071006);
-                             end;
-                        end
-                      else if nextfloatreg<=R_F10 then
-                        begin
-                           hp.paraloc.size:=def_cgsize(hp.paratype.def);
-                           hp.paraloc.loc:=LOC_FPUREGISTER;
-                           hp.paraloc.register:=nextfloatreg;
-                           inc(nextfloatreg);
-                        end
-                      else
-                         begin
-                            {!!!!!!!}
-                             hp.paraloc.size:=def_cgsize(hp.paratype.def);
-                            internalerror(2002071004);
-                        end;
-                   end;
-                 LOC_REFERENCE:
-                   begin
-                      hp.paraloc.size:=OS_ADDR;
-                      if push_addr_param(hp.paratype.def,p.proccalloption in [pocall_cdecl,pocall_cppdecl]) or (hp.paratyp in [vs_var,vs_out]) then
-                        begin
-                           if nextintreg<=R_10 then
-                             begin
-                                hp.paraloc.loc:=LOC_REGISTER;
-                                hp.paraloc.register:=nextintreg;
-                                inc(nextintreg);
-                             end
-                           else
-                              begin
-                                 hp.paraloc.loc:=LOC_REFERENCE;
-                                 hp.paraloc.reference.index:=stack_pointer_reg;
-                                 hp.paraloc.reference.offset:=stack_offset;
-                                 inc(stack_offset,4);
-                             end;
-                        end
-                      else
-                        begin
-                           hp.paraloc.loc:=LOC_REFERENCE;
-                           hp.paraloc.reference.index:=stack_pointer_reg;
-                           hp.paraloc.reference.offset:=stack_offset;
-                           inc(stack_offset,hp.paratype.def.size);
-                        end;
-                   end;
-                 else
-                   internalerror(2002071002);
-              end;
-              hp:=tparaitem(hp.previous);
-           end;
-      end;
-
-    function tcpuparamanager.getfuncretparaloc(p : tabstractprocdef) : tparalocation;
-      begin
-         case p.returndef.typ of
-            orddef,
-            enumdef:
-              begin
-                getfuncretparaloc.loc:=LOC_REGISTER;
-                getfuncretparaloc.register:=R_3;
-                getfuncretparaloc.size:=def_cgsize(p.returndef);
-                if getfuncretparaloc.size in [OS_S64,OS_64] then
-                  getfuncretparaloc.register64.reghi:=R_4;
-              end;
-            floatdef:
-              begin
-                getfuncretparaloc.loc:=LOC_FPUREGISTER;
-                getfuncretparaloc.register:=R_F1;
-                getfuncretparaloc.size:=def_cgsize(p.returndef);
-              end;
-            pointerdef,
-            formaldef,
-            classrefdef,
-            recorddef,
-            objectdef,
-            stringdef,
-            procvardef,
-            filedef,
-            arraydef,
-            errordef:
-              begin
-                getfuncretparaloc.loc:=LOC_REGISTER;
-                getfuncretparaloc.register:=R_3;
-                getfuncretparaloc.size:=OS_ADDR;
-              end;
-            else
-              internalerror(2002090903);
-        end;
-      end;
-
-
-begin
-   paramanager:=tcpuparamanager.create;
-end.

+ 0 - 43
compiler/alpha/cpupi.pas

@@ -1,43 +0,0 @@
-{
-    Copyright (c) 2002 by Florian Klaempfl
-
-    This unit contains the CPU specific part of tprocinfo
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  This unit contains the CPU specific part of tprocinfo.
-}
-unit cpupi;
-
-{$i fpcdefs.inc}
-
-  interface
-
-    uses
-       cgbase;
-
-    type
-       talphaprocinfo = class(tprocinfo)
-       end;
-
-
-  implementation
-
-begin
-   cprocinfo:=talphaprocinfo;
-end.

+ 0 - 51
compiler/alpha/cputarg.pas

@@ -1,51 +0,0 @@
-{
-    Copyright (c) 2001-2002 by Peter Vreman
-
-    Includes the powerpc dependent target units
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit cputarg;
-
-{$i fpcdefs.inc}
-
-interface
-
-
-implementation
-
-    uses
-      systems { prevent a syntax error when nothing is included }
-
-{**************************************
-             Targets
-**************************************}
-
-    {$ifndef NOTARGETLINUX}
-      ,t_linux
-    {$endif}
-
-{**************************************
-             Assemblers
-**************************************}
-
-    {$ifndef NOAGAXPGAS}
-      ,agaxpgas
-    {$endif}
-      ;
-
-end.

+ 0 - 0
compiler/alpha/radirect.pas


+ 0 - 65
compiler/alpha/rasm.pas

@@ -1,65 +0,0 @@
-{
-    Copyright (c) 1998-2002 by The Free Pascal Team
-
-    This unit does the parsing process for the inline assembler
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  This unit does the parsing process for the inline assembler.
-}
-Unit Rasm;
-
-{$i fpcdefs.inc}
-
-Interface
-
-uses
-  node;
-
-   {
-     This routine is called to parse the instructions in assembler
-     blocks. It returns a complete list of directive and instructions
-   }
-   function assemble: tnode;
-
-
-Implementation
-
-    uses
-       { common }
-       cutils,cclasses,
-       { global }
-       globtype,globals,verbose,
-       systems,
-       { aasm }
-       cpubase,aasmbase,aasmtai,aasmdata,aasmcpu,
-       { symtable }
-       symconst,symbase,symtype,symsym,symtable,
-       { pass 1 }
-       nbas,
-       { parser }
-       scanner
-       // ,rautils
-       ;
-
-    function assemble : tnode;
-     begin
-     end;
-
-Begin
-end.

+ 0 - 69
compiler/alpha/rgcpu.pas

@@ -1,69 +0,0 @@
-{
-    Copyright (c) 1998-2002 by Florian Klaempfl
-
-    This unit implements the powerpc specific class for the register
-    allocator
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-
-unit rgcpu;
-
-{$i fpcdefs.inc}
-
-  interface
-
-     uses
-       aasmbase,aasmtai,aasmdata,
-       cpubase,
-       rgobj;
-
-     type
-       trgcpu = class(trgobj)
-         function getcpuregisterint(list: TAsmList; reg: tregister): tregister; override;
-         procedure ungetregisterint(list: TAsmList; reg: tregister); override;
-       end;
-
-  implementation
-
-    uses
-      cgobj;
-
-    function trgcpu.getcpuregisterint(list: TAsmList; reg: tregister): tregister;
-
-      begin
-        if reg = R_0 then
-          begin
-            cg.a_reg_alloc(list,reg);
-            result := reg;
-          end
-        else result := inherited getcpuregisterint(list,reg);
-      end;
-
-
-    procedure trgcpu.ungetregisterint(list: TAsmList; reg: tregister);
-
-      begin
-        if reg = R_0 then
-          cg.a_reg_dealloc(list,reg)
-        else
-          inherited ungetregisterint(list,reg);
-      end;
-
-initialization
-  rg := trgcpu.create;
-end.

+ 0 - 216
compiler/alpha/symcpu.pas

@@ -1,216 +0,0 @@
-{
-    Copyright (c) 2014 by Florian Klaempfl
-
-    Symbol table overrides for Alpha
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit symcpu;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses
-  symtype,symdef,symsym;
-
-type
-  { defs }
-  tcpufiledef = class(tfiledef)
-  end;
-  tcpufiledefclass = class of tcpufiledef;
-
-  tcpuvariantdef = class(tvariantdef)
-  end;
-  tcpuvariantdefclass = class of tcpuvariantdef;
-
-  tcpuformaldef = class(tformaldef)
-  end;
-  tcpuformaldefclass = class of tcpuformaldef;
-
-  tcpuforwarddef = class(tforwarddef)
-  end;
-  tcpuforwarddefclass = class of tcpuforwarddef;
-
-  tcpuundefineddef = class(tundefineddef)
-  end;
-  tcpuundefineddefclass = class of tcpuundefineddef;
-
-  tcpuerrordef = class(terrordef)
-  end;
-  tcpuerrordefclass = class of tcpuerrordef;
-
-  tcpupointerdef = class(tpointerdef)
-  end;
-  tcpupointerdefclass = class of tcpupointerdef;
-
-  tcpurecorddef = class(trecorddef)
-  end;
-  tcpurecorddefclass = class of tcpurecorddef;
-
-  tcpuimplementedinterface = class(timplementedinterface)
-  end;
-  tcpuimplementedinterfaceclass = class of tcpuimplementedinterface;
-
-  tcpuobjectdef = class(tobjectdef)
-  end;
-  tcpuobjectdefclass = class of tcpuobjectdef;
-
-  tcpuclassrefdef = class(tclassrefdef)
-  end;
-  tcpuclassrefdefclass = class of tcpuclassrefdef;
-
-  tcpuarraydef = class(tarraydef)
-  end;
-  tcpuarraydefclass = class of tcpuarraydef;
-
-  tcpuorddef = class(torddef)
-  end;
-  tcpuorddefclass = class of tcpuorddef;
-
-  tcpufloatdef = class(tfloatdef)
-  end;
-  tcpufloatdefclass = class of tcpufloatdef;
-
-  tcpuprocvardef = class(tprocvardef)
-  end;
-  tcpuprocvardefclass = class of tcpuprocvardef;
-
-  tcpuprocdef = class(tprocdef)
-  end;
-  tcpuprocdefclass = class of tcpuprocdef;
-
-  tcpustringdef = class(tstringdef)
-  end;
-  tcpustringdefclass = class of tcpustringdef;
-
-  tcpuenumdef = class(tenumdef)
-  end;
-  tcpuenumdefclass = class of tcpuenumdef;
-
-  tcpusetdef = class(tsetdef)
-  end;
-  tcpusetdefclass = class of tcpusetdef;
-
-  { syms }
-  tcpulabelsym = class(tlabelsym)
-  end;
-  tcpulabelsymclass = class of tcpulabelsym;
-
-  tcpuunitsym = class(tunitsym)
-  end;
-  tcpuunitsymclass = class of tcpuunitsym;
-
-  tcpuprogramparasym = class(tprogramparasym)
-  end;
-  tcpuprogramparasymclass = class(tprogramparasym);
-
-  tcpunamespacesym = class(tnamespacesym)
-  end;
-  tcpunamespacesymclass = class of tcpunamespacesym;
-
-  tcpuprocsym = class(tprocsym)
-  end;
-  tcpuprocsymclass = class of tcpuprocsym;
-
-  tcputypesym = class(ttypesym)
-  end;
-  tcpuypesymclass = class of tcputypesym;
-
-  tcpufieldvarsym = class(tfieldvarsym)
-  end;
-  tcpufieldvarsymclass = class of tcpufieldvarsym;
-
-  tcpulocalvarsym = class(tlocalvarsym)
-  end;
-  tcpulocalvarsymclass = class of tcpulocalvarsym;
-
-  tcpuparavarsym = class(tparavarsym)
-  end;
-  tcpuparavarsymclass = class of tcpuparavarsym;
-
-  tcpustaticvarsym = class(tstaticvarsym)
-  end;
-  tcpustaticvarsymclass = class of tcpustaticvarsym;
-
-  tcpuabsolutevarsym = class(tabsolutevarsym)
-  end;
-  tcpuabsolutevarsymclass = class of tcpuabsolutevarsym;
-
-  tcpupropertysym = class(tpropertysym)
-  end;
-  tcpupropertysymclass = class of tcpupropertysym;
-
-  tcpuconstsym = class(tconstsym)
-  end;
-  tcpuconstsymclass = class of tcpuconstsym;
-
-  tcpuenumsym = class(tenumsym)
-  end;
-  tcpuenumsymclass = class of tcpuenumsym;
-
-  tcpusyssym = class(tsyssym)
-  end;
-  tcpusyssymclass = class of tcpusyssym;
-
-
-const
-  pbestrealtype : ^tdef = @s64floattype;
-
-
-implementation
-
-begin
-  { used tdef classes }
-  cfiledef:=tcpufiledef;
-  cvariantdef:=tcpuvariantdef;
-  cformaldef:=tcpuformaldef;
-  cforwarddef:=tcpuforwarddef;
-  cundefineddef:=tcpuundefineddef;
-  cerrordef:=tcpuerrordef;
-  cpointerdef:=tcpupointerdef;
-  crecorddef:=tcpurecorddef;
-  cimplementedinterface:=tcpuimplementedinterface;
-  cobjectdef:=tcpuobjectdef;
-  cclassrefdef:=tcpuclassrefdef;
-  carraydef:=tcpuarraydef;
-  corddef:=tcpuorddef;
-  cfloatdef:=tcpufloatdef;
-  cprocvardef:=tcpuprocvardef;
-  cprocdef:=tcpuprocdef;
-  cstringdef:=tcpustringdef;
-  cenumdef:=tcpuenumdef;
-  csetdef:=tcpusetdef;
-
-  { used tsym classes }
-  clabelsym:=tcpulabelsym;
-  cunitsym:=tcpuunitsym;
-  cprogramparasym:=tcpuprogramparasym;
-  cnamespacesym:=tcpunamespacesym;
-  cprocsym:=tcpuprocsym;
-  ctypesym:=tcputypesym;
-  cfieldvarsym:=tcpufieldvarsym;
-  clocalvarsym:=tcpulocalvarsym;
-  cparavarsym:=tcpuparavarsym;
-  cstaticvarsym:=tcpustaticvarsym;
-  cabsolutevarsym:=tcpuabsolutevarsym;
-  cpropertysym:=tcpupropertysym;
-  cconstsym:=tcpuconstsym;
-  cenumsym:=tcpuenumsym;
-  csyssym:=tcpusyssym;
-end.
-

+ 0 - 42
compiler/alpha/tgcpu.pas

@@ -1,42 +0,0 @@
-{
-    Copyright (C) 1998-2000 by Florian Klaempfl
-
-    This unit handles the temporary variables stuff for Alpha
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{
-  This unit handles the temporary variables stuff for Alpha.
-}
-unit tgcpu;
-
-{$i fpcdefs.inc}
-
-  interface
-
-    uses
-       tgobj;
-
-    type
-       ttgalpha = class(ttgobj)
-       end;
-
-implementation
-
-begin
-  tg:=ttgalpha.create;
-end.

+ 0 - 2265
compiler/i386/csopt386.pas

@@ -1,2265 +0,0 @@
-{
-    Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
-      development team
-
-    This unit contains the common subexpression elimination procedure.
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit CSOpt386;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses aasmbase,aasmtai,aasmdata,aasmcpu, cpuinfo, cpubase, cgbase;
-
-function CSE(asml: TAsmList; first, last: tai; pass: longint): boolean;
-
-function doReplaceReg(hp: taicpu; newReg, orgReg: tsuperregister): boolean;
-function changeOp(var o: toper; newReg, orgReg: tsuperregister): boolean;
-function storeBack(start, current: tai; orgReg, newReg: tsuperregister): boolean;
-function NoHardCodedRegs(p: taicpu; orgReg, newReg: tsuperregister): boolean;
-function RegSizesOK(oldReg,newReg: tsuperregister; p: taicpu): boolean;
-
-implementation
-
-uses
-{$ifdef csdebug}
-  cutils,
-{$else}
-  {$ifdef replaceregdebug}cutils,{$endif}
-{$endif}
-  globtype, verbose, procinfo, globals, daopt386, rgobj, rropt386,cgutils;
-
-{
-function TaiInSequence(P: tai; Const Seq: TContent): Boolean;
-var P1: tai;
-    Counter: Byte;
-    TmpResult: Boolean;
-begin
-  TmpResult := False;
-  P1 := Seq.StartMod;
-  Counter := 1;
-  while not(TmpResult) and
-        (Counter <= Seq.NrofMods) do
-    begin
-      if (P = P1) then TmpResult := True;
-      inc(Counter);
-      p1 := tai(p1.Next);
-    end;
-  TaiInSequence := TmpResult;
-end;
-}
-
-function modifiesConflictingMemLocation(p1: tai; supreg: tsuperregister; c: tregContent;
-   var regsStillValid: tregset; onlymem: boolean; var invalsmemwrite: boolean): boolean;
-var
-  p: taicpu;
-  tmpRef: treference;
-  regCounter: tsuperregister;
-  opCount: longint;
-  dummy: boolean;
-begin
-  modifiesConflictingMemLocation := false;
-  invalsmemwrite := false;
-  if p1.typ <> ait_instruction then
-    exit;
-  p := taicpu(p1);
-  case p.opcode of
-    A_MOV,A_MOVSX,A_MOVZX:
-      if p.oper[1]^.typ = top_ref then
-        for regCounter := RS_EAX to RS_EDI do
-          begin
-            if (p.oper[0]^.typ<>top_reg) or
-               (getregtype(p.oper[0]^.reg) <> R_INTREGISTER) then
-               break;
-            if writeToMemDestroysContents(getsupreg(p.oper[0]^.reg),p.oper[1]^.ref^,
-                 regCounter,topsize2tcgsize[p.opsize],c[regCounter],dummy) then
-              begin
-                exclude(regsStillValid,regCounter);
-                modifiesConflictingMemLocation := not(supreg in regsStillValid);
-              end;
-            if (regcounter = supreg) then
-              invalsmemwrite := invalsmemwrite or dummy;
-          end
-      else
-{         if is_reg_var[getsupreg(p.oper[1]^.reg)] then }
-        if not onlymem  then
-          for regCounter := RS_EAX to RS_EDI do
-            begin
-              if writeDestroysContents(p.oper[1]^,regCounter,topsize2tcgsize[p.opsize],c[regCounter],dummy) then
-                begin
-                  exclude(regsStillValid,regCounter);
-                  modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                end
-            end;
-    A_DIV, A_IDIV, A_MUL, A_IMUL:
-      begin
-        if not onlymem then
-          if (p.ops = 1) then
-            begin
-              for regCounter := RS_EAX to RS_EDI do
-                begin
-                  if writeToRegDestroysContents(RS_EDX,regCounter,c[regCounter]) then
-                    begin
-                      exclude(regsStillValid,RS_EDX);
-                      modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                    end;
-                  if writeToRegDestroysContents(RS_EAX,regCounter,c[regCounter]) then
-                    begin
-                      exclude(regsStillValid,RS_EAX);
-                      modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                    end;
-                end
-            end
-          else
-            { only possible for imul }
-            { last operand is always destination }
-            for regCounter := RS_EAX to RS_EDI do
-              begin
-                if writeDestroysContents(p.oper[p.ops-1]^,regCounter,topsize2tcgsize[p.opsize],c[regCounter],dummy) then
-                  begin
-                    exclude(regsStillValid,regCounter);
-                    modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                  end
-              end
-      end;
-    else
-      for opCount := 1 to maxinschanges do
-        case InsProp[p.opcode].Ch[opCount] of
-          Ch_MOp1,CH_WOp1,CH_RWOp1:
-              if not(onlymem) or
-                 (p.oper[0]^.typ = top_ref) then
-{                or ((p.oper[0]^.typ = top_reg) and }
-{                 is_reg_var[getsupreg(p.oper[0]^.reg)]) then }
-                for regCounter := RS_EAX to RS_EDI do
-                  begin
-                    if writeDestroysContents(p.oper[0]^,regCounter,topsize2tcgsize[p.opsize],c[regCounter],dummy) then
-                      begin
-                        exclude(regsStillValid,regCounter);
-                        modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                      end;
-                    if (regcounter = supreg) then
-                      invalsmemwrite := invalsmemwrite or dummy;
-                  end;
-          Ch_MOp2,CH_WOp2,CH_RWOp2:
-              if not(onlymem) or
-                 (p.oper[1]^.typ = top_ref) then
-{                or ((p.oper[1]^.typ = top_reg) and }
-{                 is_reg_var[getsupreg(p.oper[1]^.reg)]) then }
-                for regCounter := RS_EAX to RS_EDI do
-                  begin
-                    if writeDestroysContents(p.oper[1]^,regCounter,topsize2tcgsize[p.opsize],c[regCounter],dummy) then
-                      begin
-                        exclude(regsStillValid,regCounter);
-                        modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                      end;
-                    if (regcounter = supreg) then
-                      invalsmemwrite := invalsmemwrite or dummy;
-                  end;
-          Ch_MOp3,CH_WOp3,CH_RWOp3:
-              if not(onlymem) or
-                 (p.oper[2]^.typ = top_ref) then
-{                or ((p.oper[2]^.typ = top_reg) and }
-{                 is_reg_var[getsupreg(p.oper[2]^.reg)]) then }
-                for regCounter := RS_EAX to RS_EDI do
-                  begin
-                    if writeDestroysContents(p.oper[2]^,regCounter,topsize2tcgsize[p.opsize],c[regCounter],dummy) then
-                      begin
-                        exclude(regsStillValid,regCounter);
-                        modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                      end;
-                    if (regcounter = supreg) then
-                      invalsmemwrite := invalsmemwrite or dummy;
-                  end;
-          Ch_WMemEDI:
-            begin
-              fillchar(tmpref,sizeof(tmpref),0);
-              tmpRef.base := NR_EDI;
-              tmpRef.index := NR_EDI;
-              for regCounter := RS_EAX to RS_EDI do
-                begin
-                  if writeToMemDestroysContents(RS_INVALID,tmpRef,regCounter,OS_32,c[regCounter],dummy) then
-                    begin
-                      exclude(regsStillValid,regCounter);
-                      modifiesConflictingMemLocation := not(supreg in regsStillValid);
-                   end;
-                  if (regcounter = supreg) then
-                    invalsmemwrite := invalsmemwrite or dummy;
-                end;
-            end;
-        end;
-  end;
-end;
-
-
-function isSimpleMemLoc(const ref: treference): boolean;
-begin
-{  isSimpleMemLoc :=
-    (ref.index = RS_NO) and
-    not(ref.base in (rg.usableregsint+[RS_EDI]));}
-  isSimpleMemLoc :=
-    (ref.index = NR_NO) and
-    ((ref.base = NR_NO) or
-     not(getsupreg(ref.base) in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI,RS_EDI]));
-end;
-
-
-{checks whether the current instruction sequence (starting with p) and the
- one between StartMod and EndMod of Reg are the same. if so, the number of
- instructions that match is stored in Found and true is returned, otherwise
- Found holds the number of instructions between StartMod and EndMod and false
- is returned}
-function CheckSequence(p: tai; var prev: tai; supreg: tsuperregister; var Found: Longint;
-           var reginfo: toptreginfo; findPrevSeqs: boolean): Boolean;
-
-var
-  regsNotRead, regsStillValid : tregset;
-  checkingPrevSequences,
-  passedFlagsModifyingInstr   : boolean;
-
-  function getPrevSequence(p: tai; supreg: tsuperregister; currentPrev: tai; var newPrev: tai): tsuperregister;
-
-  const
-    current_reg: tsuperregister = RS_INVALID;
-
-    function stillValid(p: tai): boolean;
-      var
-        hp: tai;
-      begin
-        { only regvars are still used at jump instructions }
-        if (cs_opt_regvar in current_settings.optimizerswitches) and
-           (p.typ = ait_instruction) and
-           taicpu(p).is_jmp then
-         regsstillvalid := regsstillvalid - ptaiprop(p.optinfo)^.usedregs;
-
-        stillValid :=
-          (p.typ = ait_instruction) and
-          (taicpu(p).opcode <> a_jmp) and
-          (ptaiprop(p.optinfo)^.regs[supreg].wstate =
-            ptaiprop(currentPrev.optinfo)^.regs[supreg].wstate) and
-        { in case destroyreg is called with doIncState = false }
-          (ptaiprop(p.optinfo)^.regs[supreg].typ =
-            ptaiprop(currentPrev.optinfo)^.regs[supreg].typ) and
-          (supreg in (regsNotRead * regsStillValid));
-        { stop if the register was still used right before a (conditional) }
-        { jump, since in that case its current contents could still be     }
-        { used in the other path of the jump)                              }
-        if (p.typ = ait_instruction) and
-           (taicpu(p).is_jmp) and
-           getlastinstruction(p,hp) then
-          stillValid := stillValid and
-           not(supreg in ptaiprop(hp.optinfo)^.usedregs);
-        passedFlagsModifyingInstr := passedFlagsModifyingInstr or
-          instrWritesFlags(currentPrev);
-      end;
-
-
-    function findChangedRegister(p: tai): tsuperregister;
-    var
-      regCounter, loopstart: tsuperregister;
-    begin
-      if (current_reg <> RS_INVALID) then
-        loopstart := succ(current_reg)
-      else
-        loopstart := RS_EAX;
-      for regCounter := loopstart to RS_EDI do
-        with ptaiprop(p.optinfo)^.regs[regCounter] do
-        if ((startmod <>
-             ptaiprop(currentPrev.optinfo)^.regs[regCounter].startmod)  or
-            (nrofMods <>
-             ptaiprop(currentPrev.optinfo)^.regs[regCounter].nrofMods)) and
-           (ptaiprop(p.optinfo)^.regs[regCounter].typ in [con_ref,con_noRemoveRef]) then
-          begin
-            findChangedRegister := regCounter;
-            current_reg := regCounter;
-            exit;
-          end;
-      current_reg := RS_INVALID;
-      findChangedRegister := RS_INVALID;
-    end;
-
-
-  var
-    hp, prevFound: tai;
-    tmpResult, regCounter: tsuperregister;
-    invalsmemwrite: boolean;
-  begin
-    if (current_reg <> RS_EDI) and
-       (current_reg <> RS_INVALID) then
-      begin
-        tmpResult := findChangedRegister(currentPrev);
-        if tmpResult <> RS_INVALID then
-          begin
-            getPrevSequence := tmpResult;
-            exit;
-          end;
-      end;
-
-    getPrevSequence := RS_INVALID;
-    passedFlagsModifyingInstr := passedFlagsModifyingInstr or
-      instrWritesFlags(currentPrev);
-    if (cs_opt_regvar in current_settings.optimizerswitches) and
-       (currentprev.typ = ait_instruction) and
-       taicpu(currentprev).is_jmp then
-      regsstillvalid := regsstillvalid - ptaiprop(currentprev.optinfo)^.usedregs;
-
-    if not getLastInstruction(currentPrev,hp) then
-      exit;
-
-    prevFound := currentPrev;
-    tmpResult := RS_INVALID;
-
-    while (tmpResult = RS_INVALID) and
-          stillValid(hp) and
-          (ptaiprop(prevFound.optinfo)^.canBeRemoved or
-           not(modifiesConflictingMemLocation(prevFound,supreg,
-             ptaiprop(p.optinfo)^.regs,regsStillValid,false, invalsmemwrite))) do
-      begin
-        { only update the regsread for the instructions we already passed }
-        if not(ptaiprop(prevFound.optinfo)^.canBeRemoved) then
-          for regCounter := RS_EAX to RS_EDI do
-            if regReadByInstruction(regCounter,prevFound) then
-              exclude(regsNotRead,regCounter);
-
-        { in case getPreviousInstruction fails and sets hp to nil in the }
-        { next iteration                                                 }
-        prevFound := hp;
-        if not(ptaiprop(hp.optinfo)^.canBeRemoved) then
-          tmpResult := findChangedRegister(hp);
-        if not getLastInstruction(hp,hp) then
-          break;
-      end;
-    getPrevSequence := tmpResult;
-    if tmpResult <> RS_INVALID then
-      newPrev := prevFound;
-  end;
-
-
-  function getNextRegToTest(var prev: tai; currentReg: tsuperregister): tsuperregister;
-  begin
-    getNextRegToTest := RS_INVALID;
-    if not checkingPrevSequences then
-      begin
-        if (currentreg = RS_INVALID) then
-          currentreg := RS_EAX
-        else
-          inc(currentreg);
-        while (currentReg <= RS_EDI) and
-              not(ptaiprop(prev.optinfo)^.regs[currentReg].typ in [con_ref,con_noRemoveRef]) do
-          inc(currentReg);
-        if currentReg > RS_EDI then
-          begin
-            if (taicpu(p).oper[0]^.typ <> top_ref) or
-               isSimpleMemLoc(taicpu(p).oper[0]^.ref^) then
-              begin
-                checkingPrevSequences := true;
-              end
-            else
-              getNextRegToTest := RS_INVALID;
-          end
-        else
-          getNextRegToTest := currentReg;
-      end;
-    if checkingPrevSequences then
-      if findPrevSeqs then
-        getNextRegToTest :=
-          getPrevSequence(p,supreg,prev,prev)
-      else
-        getNextRegToTest := RS_INVALID;
-  end;
-
-
-  function changedreginvalidatedbetween(const oldreginfo: toptreginfo; var newreginfo: toptreginfo; startp,endp,current: tai): boolean;
-    var
-      orgdiffregs,diffregs: tregset;
-      runner: tai;
-      invalsmemwrite: boolean;
-    begin
-      diffregs := newreginfo.newregsencountered - oldreginfo.newregsencountered;
-      orgdiffregs := diffregs;
-      if diffregs <> [] then
-        begin
-          runner := startp;
-          repeat
-            modifiesConflictingMemLocation(runner,RS_EAX { dummy },ptaiprop(current.optinfo)^.regs,diffregs,true,invalsmemwrite);
-            if orgdiffregs <> diffregs then
-              begin
-                changedreginvalidatedbetween := true;
-                newreginfo := oldreginfo;
-                exit;
-              end;
-            getnextinstruction(runner,runner);
-          until (runner = endp);
-        end;
-      changedreginvalidatedbetween := false;
-    end;
-
-var
-  prevreginfo: toptreginfo;
-  hp2, hp3{, EndMod}, prevhp3, highPrev, orgPrev, pprev: tai;
-  {Cnt,} OldNrofMods: Longint;
-  startRegInfo, OrgRegInfo, HighRegInfo: toptreginfo;
-  regModified, lastregloadremoved: array[RS_EAX..RS_ESP] of boolean;
-  HighFound, OrgRegFound: longint;
-  regcounter, regCounter2, tmpreg, base, index: tsuperregister;
-  OrgRegResult: Boolean;
-  TmpResult, flagResultsNeeded: Boolean;
-begin {CheckSequence}
-  TmpResult := False;
-  FillChar(OrgRegInfo, Sizeof(OrgRegInfo), 0);
-  FillChar(startRegInfo, sizeof(startRegInfo), 0);
-  FillChar(HighRegInfo, sizeof(HighRegInfo), 0);
-  FillChar(prevreginfo, sizeof(prevreginfo), 0);
-  OrgRegFound := 0;
-  HighFound := 0;
-  OrgRegResult := False;
-  highPrev := nil;
-  orgPrev := nil;
-  with startRegInfo do
-    begin
-      newRegsEncountered := [RS_EBP, RS_ESP];
-      fillword(new2oldreg,sizeof(new2oldreg),RS_INVALID);
-      new2OldReg[RS_EBP] := RS_EBP;
-      new2OldReg[RS_ESP] := RS_ESP;
-      oldRegsEncountered := newRegsEncountered;
-    end;
-
-  checkingPrevSequences := false;
-  passedFlagsModifyingInstr := false;
-  flagResultsNeeded := false;
-  regsNotRead := [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESP,RS_EBP,RS_EDI,RS_ESI];
-  regsStillValid := regsNotRead;
-  GetLastInstruction(p, prev);
-  pprev := prev;
-  tmpreg:=RS_INVALID;
-  regCounter := getNextRegToTest(prev,tmpreg);
-  while (regcounter <> RS_INVALID) do
-    begin
-      fillchar(regModified,sizeof(regModified),0);
-      fillchar(lastregloadremoved,sizeof(lastregloadremoved),0);
-      reginfo := startRegInfo;
-      Found := 0;
-      hp2 := ptaiprop(prev.optinfo)^.Regs[regcounter].StartMod;
-      if (prev <> ptaiprop(prev.optinfo)^.Regs[regcounter].StartMod) then
-        OldNrofMods := ptaiprop(prev.optinfo)^.Regs[regcounter].NrofMods
-      else
-        OldNrofMods := 1;
-      hp3 := p;
-      if checkingprevsequences then
-        prevreginfo := reginfo;
-      while (Found <> OldNrofMods) and
-                                  { old  new }
-             InstructionsEquivalent(hp2, hp3, reginfo) and
-             (not(checkingprevsequences) or
-              not(changedreginvalidatedbetween(prevreginfo,reginfo,prev,p,hp3))) do
-        begin
-          if checkingprevsequences then
-            begin
-              prevreginfo := reginfo;
-            end;
-          if (hp3.typ = ait_instruction) and
-             ((taicpu(hp3).opcode = A_MOV) or
-              (taicpu(hp3).opcode = A_MOVZX) or
-              (taicpu(hp3).opcode = A_LEA) or
-             (taicpu(hp3).opcode = A_MOVSX)) and
-             (taicpu(hp3).oper[1]^.typ = top_reg) and
-             not(regInOp(getsupreg(taicpu(hp3).oper[1]^.reg),taicpu(hp3).oper[0]^)) then
-            begin
-              tmpreg := getsupreg(taicpu(hp3).oper[1]^.reg);
-              lastregloadremoved[tmpreg] := ptaiprop(hp2.optinfo)^.canberemoved;
-              reginfo.lastReload[tmpreg] := hp3;
-              case taicpu(hp3).oper[0]^.typ of
-                top_ref:
-                  begin
-                    base := getsupreg(taicpu(hp3).oper[0]^.ref^.base);
-                    index := getsupreg(taicpu(hp3).oper[0]^.ref^.index);
-                    if (found <> 0) and
-                       ((taicpu(hp3).oper[0]^.ref^.base = NR_NO) or
-                        regModified[base] or
-                        (base = getsupreg(current_procinfo.framepointer))) and
-                       ((taicpu(hp3).oper[0]^.ref^.index = NR_NO) or
-                        regModified[index]) and
-                       not(regInRef(tmpReg,taicpu(hp3).oper[0]^.ref^)) then
-                      begin
-                        with ptaiprop(hp3.optinfo)^.regs[tmpreg] do
-                          if nrofMods > (oldNrofMods - found) then
-                            oldNrofMods := found + nrofMods;
-                        { next is safe because instructions are equivalent }
-                        with ptaiprop(hp2.optinfo)^.regs[getsupreg(taicpu(hp2).oper[1]^.reg)] do
-                          if nrofMods > (oldNrofMods - found) then
-                            oldNrofMods := found + nrofMods;
-                      end;
-                  end;
-                top_reg:
-                  if regModified[getsupreg(taicpu(hp3).oper[0]^.reg)] then
-                    begin
-                      with ptaiprop(hp3.optinfo)^.regs[tmpreg] do
-                        if nrofMods > (oldNrofMods - found) then
-                          oldNrofMods := found + nrofMods;
-                      with ptaiprop(hp2.optinfo)^.regs[getsupreg(taicpu(hp2).oper[1]^.reg)] do
-                        if nrofMods > (oldNrofMods - found) then
-                          oldNrofMods := found + nrofMods;
-                    end;
-              end;
-            end;
-          for regCounter2 := RS_EAX to RS_EDI do
-            regModified[regCounter2] := regModified[regCounter2] or
-              regModifiedByInstruction(regCounter2,hp3);
-          if flagResultsNeeded then
-            flagResultsNeeded := not instrReadsFlags(hp3);
-          if not flagResultsNeeded then
-            flagResultsNeeded := ptaiprop(hp3.optinfo)^.FlagsUsed;
-          inc(Found);
-          prevhp3 := hp3;
-          if (Found <> OldNrofMods) then
-            if not GetNextInstruction(hp2, hp2) or
-               not GetNextInstruction(hp3, hp3) then
-              break;
-        end;
-
-      if assigned(hp3) then
-        begin
-          prevhp3 := hp3;
-          getnextinstruction(hp3,hp3);
-        end;
-      if not assigned(hp3) or
-         { a marker has no optinfo, which is used below }
-         (hp3.typ = ait_marker) then
-        hp3 := prevhp3;
-{
-a) movl  -4(%ebp),%edx
-   movl -12(%ebp),%ecx
-   ...
-   movl  -8(%ebp),%eax
-   movl -12(%ebp),%edx (marked as removable)
-   movl  (%eax,%edx),%eax (replaced by "movl (%eax,%ecx),%eax")
-   ...
-   movl  -8(%ebp),%eax
-   movl -12(%ebp),%edx
-   movl  (%eax,%edx),%eax
-   movl  (%edx),%edx
-
--> the "movl -12(ebp),%edx" can't be removed in the last sequence, because
-   edx has not been replaced with ecx there, and edx is still used after the
-   sequence
-
-b) tests/webtbs/tw4266.pp
-}
-
-      { hp2 = instruction after previous sequence, pprev = instruction before }
-      { current sequence, prev = instruction where the loads of the registers }
-      { will be inserted                                                      }
-      for regCounter2 := RS_EAX to RS_EDI do
-        if (reginfo.new2OldReg[regCounter2] <> RS_INVALID) and
-           { case a) above }
-           (((regCounter2 in ptaiprop(hp3.optinfo)^.usedRegs) and
-             (not regLoadedWithNewValue(regCounter2,false,hp3) and
-              lastregloadremoved[regcounter2])) or
-           { case b) above }
-            ((ptaiprop(hp2.optinfo)^.regs[regCounter2].wstate <>
-              ptaiprop(pprev.optinfo)^.regs[regcounter2].wstate)) or
-            ((ptaiprop(hp2.optinfo)^.regs[reginfo.new2OldReg[regCounter2]].wstate <>
-              ptaiprop(prev.optinfo)^.regs[reginfo.new2OldReg[regCounter2]].wstate))) then
-          begin
-            found := 0;
-            break;
-          end;
-
-      if checkingPrevSequences then
-        begin
-          for regCounter2 := RS_EAX to RS_EDI do
-            if (reginfo.new2OldReg[regCounter2] <> RS_INVALID) and
-               (reginfo.new2OldReg[regCounter2] <> regCounter2) and
-               (not(regCounter2 in (regsNotRead * regsStillValid)) or
-               not(reginfo.new2OldReg[regCounter2] in regsStillValid)) then
-              begin
-                found := 0;
-                break;
-              end;
-           if passedFlagsModifyingInstr and flagResultsNeeded then
-              found := 0;
-        end;
-
-      TmpResult := true;
-      if (found <> OldNrofMods) then
-        TmpResult := false
-      else if assigned(hp3) then
-        for regcounter2 := RS_EAX to RS_EDI do
-          if (regcounter2 in reginfo.regsLoadedforRef) and
-             regModified[regcounter2] and
-             (regcounter2 in ptaiprop(hp3.optinfo)^.usedRegs) and
-             not regLoadedWithNewValue(regcounter2,false,hp3) then
-            begin
-              TmpResult := False;
-              if (found > 0) then
-    {this is correct because we only need to turn off the CanBeRemoved flag
-    when an instruction has already been processed by CheckSequence
-    (otherwise CanBeRemoved can't be true and thus can't have to be turned off).
-    if it has already been processed by CheckSequence and flagged to be
-    removed, it means that it has been checked against a previous sequence
-    and that it was equal (otherwise CheckSequence would have returned false
-    and the instruction wouldn't have been removed). if this "if found > 0"
-    check is left out, incorrect optimizations are performed.}
-                Found := ptaiprop(tai(p).optinfo)^.Regs[supreg].NrofMods;
-              break;
-            end;
-
-      if TmpResult and
-         (Found > HighFound) then
-        begin
-          highPrev := prev;
-          HighFound := Found;
-          HighRegInfo := reginfo;
-        end;
-      if (regcounter = supreg) then
-        begin
-          orgPrev := prev;
-          OrgRegFound := Found;
-          OrgRegResult := TmpResult;
-          OrgRegInfo := reginfo
-        end;
-      regCounter := getNextRegToTest(prev,regCounter);
-    end;
-  if (HighFound > 0) and
-     (not(OrgRegResult) Or
-      (HighFound > OrgRegFound))
-    then
-      begin
-        CheckSequence := True;
-        prev := highPrev;
-        reginfo := HighRegInfo;
-        Found := HighFound
-      end
-    else
-      begin
-        CheckSequence := OrgRegResult;
-        prev := orgPrev;
-        Found := OrgRegFound;
-        reginfo := OrgRegInfo;
-      end;
-end; {CheckSequence}
-
-
-procedure SetAlignReg(p: tai);
-Const alignSearch = 12;
-var regsUsable: TRegSet;
-    prevInstrCount, nextInstrCount: Longint;
-    prevState, nextWState,nextRState: Array[RS_EAX..RS_EDI] of byte;
-    regCounter, lastRemoved: tsuperregister;
-    prev, next: tai;
-{$ifdef alignregdebug}
-    temp: tai;
-{$endif alignregdebug}
-begin
-  regsUsable := [RS_EAX,RS_ECX,RS_EDX,RS_EBX,{R_ESP,RS_EBP,}RS_ESI,RS_EDI];
-  for regCounter := RS_EAX to RS_EDI do
-    begin
-      prevState[regCounter] := ptaiprop(p.optinfo)^.Regs[regCounter].wState;
-      nextWState[regCounter] := ptaiprop(p.optinfo)^.Regs[regCounter].wState;
-      nextRState[regCounter] := ptaiprop(p.optinfo)^.Regs[regCounter].rState;
-    end;
-  getLastInstruction(p,prev);
-  getNextInstruction(p,next);
-  lastRemoved := getsupreg(tai_align(p).reg);
-  nextInstrCount := 0;
-  prevInstrCount := 0;
-  while ((assigned(prev) and
-          assigned(prev.optinfo) and
-          (prevInstrCount < alignSearch)) or
-         (assigned(next) and
-          assigned(next.optinfo) and
-          (nextInstrCount < alignSearch))) and
-        (regsUsable <> []) do
-    begin
-{$ifdef alignregdebug}
-      if assigned(prev) then
-        begin
-          temp := tai_comment.Create(strpnew('got here'));
-          temp.next := prev.next;
-          temp.previous := prev;
-          prev.next := temp;
-          if assigned(temp.next) then
-            temp.next.previous := temp;
-        end;
-{$endif alignregdebug}
-      if assigned(prev) and assigned(prev.optinfo) and
-         (prevInstrCount < alignSearch) then
-        begin
-          if (prev.typ = ait_instruction) and
-             (insProp[taicpu(prev).opcode].ch[1] <> Ch_ALL) and
-             (taicpu(prev).opcode <> A_JMP) then
-            begin
-              inc(prevInstrCount);
-              for regCounter := RS_EAX to RS_EDI do
-                begin
-                  if (regCounter in regsUsable) and
-                     (ptaiprop(prev.optinfo)^.Regs[regCounter].wState <>
-                       prevState[regCounter]) then
-                    begin
-                      lastRemoved := regCounter;
-                      exclude(regsUsable,regCounter);
-{$ifdef alignregdebug}
-                      temp := tai_comment.Create(strpnew(
-                                std_regname(newreg(R_INTREGISTER,regCounter,R_SUBWHOLE))+' removed')));
-                      temp.next := prev.next;
-                      temp.previous := prev;
-                      prev.next := temp;
-                      if assigned(temp.next) then
-                        temp.next.previous := temp;
-                      if regsUsable = [] then
-                        begin
-                          temp := tai_comment.Create(strpnew(
-                                    'regsUsable empty here')));
-                          temp.next := prev.next;
-                          temp.previous := prev;
-                          prev.next := temp;
-                          if assigned(temp.next) then
-                            temp.next.previous := temp;
-                        end;
-{$endif alignregdebug}
-                    end;
-                  prevState[regCounter] :=
-                    ptaiprop(prev.optinfo)^.Regs[regCounter].wState;
-                end;
-              getLastInstruction(prev,prev);
-            end
-          else
-            if GetLastInstruction(prev,prev) and
-               assigned(prev.optinfo) then
-              for regCounter := RS_EAX to RS_EDI do
-                prevState[regCounter] :=
-                  ptaiprop(prev.optinfo)^.Regs[regCounter].wState
-        end;
-      if assigned(next) and assigned(next.optinfo) and
-         (nextInstrCount < alignSearch) then
-        begin
-          if (next.typ = ait_instruction) and
-             (insProp[taicpu(next).opcode].ch[1] <> Ch_ALL) and
-             (taicpu(next).opcode <> A_JMP) then
-            begin
-              inc(nextInstrCount);
-              for regCounter := RS_EAX to RS_EDI do
-                begin
-                  if (regCounter in regsUsable) and
-                     ((ptaiprop(next.optinfo)^.Regs[regCounter].wState <>
-                       nextWState[regCounter]) or
-                      (ptaiprop(next.optinfo)^.Regs[regCounter].rState <>
-                       nextRState[regCounter])) then
-                    begin
-                      lastRemoved := regCounter;
-                      exclude(regsUsable,regCounter);
-{$ifdef alignregdebug}
-                      temp := tai_comment.Create(strpnew(
-                                std_regname(newreg(R_INTREGISTER,regCounter,R_SUBWHOLE))+' removed')));
-                      temp.next := next.next;
-                      temp.previous := next;
-                      next.next := temp;
-                      if assigned(temp.next) then
-                        temp.next.previous := temp;
-                      if regsUsable = [] then
-                        begin
-                          temp := tai_comment.Create(strpnew(
-                                    'regsUsable empty here')));
-                          temp.next := next.next;
-                          temp.previous := next;
-                          next.next := temp;
-                          if assigned(temp.next) then
-                            temp.next.previous := temp;
-                        end;
-{$endif alignregdebug}
-                    end;
-                  nextWState[regCounter] :=
-                    ptaiprop(next.optinfo)^.Regs[regCounter].wState;
-                  nextRState[regCounter] :=
-                    ptaiprop(next.optinfo)^.Regs[regCounter].rState;
-                end
-            end
-          else
-            for regCounter := RS_EAX to RS_EDI do
-              begin
-                nextWState[regCounter] :=
-                  ptaiprop(next.optinfo)^.Regs[regCounter].wState;
-                nextRState[regCounter] :=
-                  ptaiprop(next.optinfo)^.Regs[regCounter].rState;
-              end;
-          getNextInstruction(next,next);
-        end;
-    end;
-  if regsUsable <> [] then
-    for regCounter := RS_EAX to RS_EDI do
-      if regCounter in regsUsable then
-        begin
-          lastRemoved := regCounter;
-          break
-        end;
-{$ifdef alignregdebug}
-  next := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,lastremoved,R_SUBWHOLE))+
-               ' chosen as alignment register')));
-  next.next := p.next;
-  next.previous := p;
-  p.next := next;
-  if assigned(next.next) then
-    next.next.previous := next;
-{$endif alignregdebug}
-  tai_align(p).reg := newreg(R_INTREGISTER,lastRemoved,R_SUBWHOLE);
-end;
-
-
-procedure clearmemwrites(p: tai; supreg: tsuperregister);
-var
-  beginmemwrite: tai;
-begin
-  beginmemwrite := ptaiprop(p.optinfo)^.regs[supreg].memwrite;
-  repeat
-    ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
-  until not getnextinstruction(p,p) or
-        (ptaiprop(p.optinfo)^.regs[supreg].memwrite <> beginmemwrite);
-end;
-
-
-procedure ClearRegContentsFrom(asml: TAsmList; supreg: tsuperregister; p, endP: tai);
-{ first clears the contents of reg from p till endP. then the contents are }
-{ cleared until the first instruction that changes reg                     }
-var
-{$ifdef replaceregdebug}
-    hp: tai;
-    l: longint;
-{$endif replaceregdebug}
-    regcounter: tsuperregister;
-    oldStartmod: tai;
-    regstoclear: tregset;
-begin
-{$ifdef replaceregdebug}
-  l := random(1000);
-  hp := tai_comment.Create(strpnew(
-          'cleared '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+' from here... '+tostr(l)));
-  insertllitem(asml,p.previous,p,hp);
-{$endif replaceregdebug}
-  ptaiprop(p.optinfo)^.Regs[supreg].typ := con_unknown;
-  regstoclear := [supreg];
-  while (p <> endP) do
-    begin
-      for regcounter := RS_EAX to RS_EDI do
-        begin
-          if (regcounter <> supreg) and
-             assigned(ptaiprop(p.optinfo)^.regs[supreg].memwrite) and
-             reginref(regcounter,ptaiprop(p.optinfo)^.regs[supreg].memwrite.oper[1]^.ref^) then
-            clearmemwrites(p,regcounter);
-          { needs double loop to cheack for each dependency combination? }
-          if assigned(ptaiprop(p.optinfo)^.regs[regcounter].startmod) and
-             sequencedependsonreg(ptaiprop(p.optinfo)^.regs[regcounter],regcounter,supreg) then
-            include(regstoclear,regcounter);
-
-          if regcounter in regstoclear then
-            with ptaiprop(p.optinfo)^.Regs[regcounter] do
-              begin
-                typ := con_unknown;
-                memwrite := nil;
-                startmod := nil;
-                nrofmods := 0;
-              end;
-        end;
-      getNextInstruction(p,p);
-    end;
-  oldStartmod := ptaiprop(p.optinfo)^.Regs[supreg].startmod;
-  repeat
-    for regcounter := RS_EAX to RS_EDI do
-      begin
-        { needs double loop to cheack for each dependency combination? }
-        if assigned(ptaiprop(p.optinfo)^.regs[regcounter].startmod) and
-           sequencedependsonreg(ptaiprop(p.optinfo)^.regs[regcounter],regcounter,supreg) then
-          include(regstoclear,regcounter);
-        with ptaiprop(p.optinfo)^.Regs[supreg] do
-          if regcounter in regstoclear then
-            begin
-              typ := con_unknown;
-              memwrite := nil;
-            end;
-      end;
-  until not getNextInstruction(p,p) or
-        (ptaiprop(p.optinfo)^.Regs[supreg].startmod <> oldStartmod);
-{$ifdef replaceregdebug}
-  if assigned(p) then
-    begin
-      hp := tai_comment.Create(strpnew(
-        'cleared '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+' till here... '+tostr(l)));
-      insertllitem(asml,p.previous,p,hp);
-    end;
-{$endif replaceregdebug}
-end;
-
-procedure RestoreRegContentsTo(asml: TAsmList; supreg: tsuperregister; const c: TContent; p, endP: tai);
-var
-{$ifdef replaceregdebug}
-  l: longint;
-{$endif replaceregdebug}
-  hp: tai;
-  validregs, prevvalidregs: tregset;
-  regcounter: tsuperregister;
-  tmpState, newrstate: byte;
-  prevcontenttyp: byte;
-  memconflict: boolean;
-  invalsmemwrite: boolean;
-begin
-{$ifdef replaceregdebug}
-  l := random(1000);
-  hp := tai_comment.Create(strpnew(
-          'restored '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+' with data from here... '+tostr(l)));
-  insertllitem(asml,p.previous,p,hp);
-{$endif replaceregdebug}
-{  ptaiprop(p.optinfo)^.Regs[reg] := c;}
-  newrstate := c.rstate;
-  incstate(newrstate,$7f);
-  memconflict := false;
-  invalsmemwrite := false;
-  validregs := [RS_EAX..RS_EDI];
-  prevvalidregs := validregs;
-  while (p <> endP) and
-        not(memconflict) and
-        not(invalsmemwrite) do
-    begin
-      if not(ptaiprop(p.optinfo)^.canberemoved) and
-         regreadbyinstruction(supreg,p) then
-        incstate(newrstate,1);
-      // is this a write to memory that destroys the contents we are restoring?
-      memconflict := modifiesConflictingMemLocation(p,supreg,ptaiprop(p.optinfo)^.regs,validregs,false,invalsmemwrite);
-      if (validregs <> prevvalidregs) then
-        begin
-          prevvalidregs := validregs >< prevvalidregs;
-          for regcounter := RS_EAX to RS_EDI do
-            if regcounter in prevvalidregs then
-              clearRegContentsFrom(asml,regcounter,p,endP);
-        end;
-      prevvalidregs := validregs;
-      if (not memconflict and not invalsmemwrite) then
-        begin
-          ptaiprop(p.optinfo)^.Regs[supreg] := c;
-          ptaiprop(p.optinfo)^.Regs[supreg].rstate := newrstate;
-        end
-      else
-        begin
-          clearRegContentsFrom(asml,supreg,p,endP);
-{$ifdef replaceregdebug}
-           if assigned(p) then
-             begin
-               hp := tai_comment.Create(strpnew(
-                 'stopping restoring of '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+'because memory conflict... '+tostr(l)));
-               insertllitem(asml,p,p.next,hp);
-             end;
-{$endif replaceregdebug}
-          exit
-        end;
-
-      getNextInstruction(p,p);
-    end;
-
-  tmpState := ptaiprop(p.optinfo)^.Regs[supreg].wState;
-  if (newrstate = ptaiprop(p.optinfo)^.Regs[supreg].rState) then
-    begin
-      incstate(ptaiprop(p.optinfo)^.regs[supreg].rstate,63);
-      if not getnextinstruction(p,hp) then
-        exit;
-      if (ptaiprop(hp.optinfo)^.regs[supreg].rstate = ptaiprop(p.optinfo)^.regs[supreg].rstate) then
-        internalerror(2004122710);
-     end;
-  repeat
-    newrstate := ptaiprop(p.optinfo)^.Regs[supreg].rState;
-    prevcontenttyp := ptaiprop(p.optinfo)^.Regs[supreg].typ;
-    // is this a write to memory that destroys the contents we are restoring?
-    memconflict := modifiesConflictingMemLocation(p,supreg,ptaiprop(p.optinfo)^.regs,validregs,false,invalsmemwrite);
-    if (validregs <> prevvalidregs) then
-      begin
-        prevvalidregs := validregs >< prevvalidregs;
-        for regcounter := RS_EAX to RS_EDI do
-          if regcounter in prevvalidregs then
-            clearRegContentsFrom(asml,regcounter,p,p);
-      end;
-    prevvalidregs := validregs;
-    if (not memconflict and not invalsmemwrite) then
-      begin
-        ptaiprop(p.optinfo)^.Regs[supreg] := c;
-        ptaiprop(p.optinfo)^.Regs[supreg].rstate := newrstate;
-      end;
-  until invalsmemwrite or
-        memconflict or
-        not getNextInstruction(p,p) or
-        (ptaiprop(p.optinfo)^.Regs[supreg].wState <> tmpState) or
-        (p.typ = ait_label) or
-        ((prevcontenttyp <> con_invalid) and
-         (ptaiprop(p.optinfo)^.Regs[supreg].typ = con_invalid));
-  if assigned(p) and
-     (p.typ <> ait_marker) then
-    if ((p.typ = ait_label) or
-       memconflict or
-       invalsmemwrite) then
-      clearRegContentsFrom(asml,supreg,p,p)
-    else if (ptaiprop(p.optinfo)^.Regs[supreg].rstate = newrstate) then
-      incstate(ptaiprop(p.optinfo)^.Regs[supreg].rstate,20);
-{$ifdef replaceregdebug}
-  if assigned(p) then
-    begin
-      hp := tai_comment.Create(strpnew(
-        'restored '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+' till here... '+tostr(l)));
-     insertllitem(asml,p,p.next,hp);
-    end;
-{$endif replaceregdebug}
-end;
-
-function NoHardCodedRegs(p: taicpu; orgReg, newReg: tsuperregister): boolean;
-var
-  chCount: byte;
-begin
-  case p.opcode of
-    A_IMUL: noHardCodedRegs := p.ops <> 1;
-    A_SHL,A_SHR,A_ROR,A_ROL,A_SAR,A_SHLD,A_SHRD: noHardCodedRegs :=
-      (p.oper[0]^.typ <> top_reg) or
-      ((orgReg <> RS_ECX) and (newReg <> RS_ECX));
-    else
-      begin
-        NoHardCodedRegs := true;
-        with InsProp[p.opcode] do
-          for chCount := 1 to maxinschanges do
-            if Ch[chCount] in ([Ch_REAX..Ch_MEDI,Ch_WMemEDI,Ch_All]-[Ch_RESP,Ch_WESP,Ch_RWESP]) then
-              begin
-                NoHardCodedRegs := false;
-                break
-              end;
-      end;
-  end;
-end;
-
-
-function ChangeReg(var Reg: TRegister; newReg, orgReg: tsuperregister): boolean;
-begin
-  changereg := false;
-  if (reg <> NR_NO) and
-     (getregtype(reg) = R_INTREGISTER) and
-     (getsupreg(reg) = newreg) then
-    begin
-      changereg := true;
-      setsupreg(reg,orgreg);
-    end;
-end;
-
-
-function changeOp(var o: toper; newReg, orgReg: tsuperregister): boolean;
-var
-  tmpresult: boolean;
-begin
-  changeOp := false;
-  case o.typ of
-    top_reg: changeOp := changeReg(o.reg,newReg,orgReg);
-    top_ref:
-      begin
-        tmpresult := changeReg(o.ref^.base,newReg,orgReg);
-        changeop := changeReg(o.ref^.index,newReg,orgReg) or tmpresult;
-      end;
-  end;
-end;
-
-
-procedure updateStates(orgReg,newReg: tsuperregister; hp: tai; writeStateToo: boolean);
-var
-  prev: tai;
-  newOrgRegRState, newOrgRegWState: byte;
-begin
-  newOrgRegwState := 0;
-  if getLastInstruction(hp,prev) then
-    with ptaiprop(prev.optinfo)^ do
-      begin
-        newOrgRegRState := byte(longint(regs[orgReg].rState) +
-          longint(ptaiprop(hp.optinfo)^.regs[newReg].rState) - regs[newReg].rstate);
-        if writeStateToo then
-          newOrgRegWState := byte(longint(regs[orgReg].wState) +
-            longint(ptaiprop(hp.optinfo)^.regs[newReg].wState) - regs[newReg].wstate);
-      end
-  else
-    with ptaiprop(hp.optinfo)^.regs[newReg] do
-      begin
-        newOrgRegRState := rState;
-        if writeStateToo then
-          newOrgRegWState := wState;
-      end;
-  with ptaiprop(hp.optinfo)^.regs[orgReg] do
-    begin
-      rState := newOrgRegRState;
-      if writeStateToo then
-        wState := newOrgRegwState;
-    end;
-end;
-
-
-function doReplaceReg(hp: taicpu; newReg, orgReg: tsuperregister): boolean;
-var
-  opCount: longint;
-  tmpResult: boolean;
-begin
-  tmpresult := false;
-  for opCount := 0 to hp.ops-1 do
-    tmpResult :=
-      changeOp(hp.oper[opCount]^,newReg,orgReg) or tmpResult;
-  doReplaceReg := tmpResult;
-end;
-
-
-function RegSizesOK(oldReg,newReg: tsuperregister; p: taicpu): boolean;
-{ oldreg and newreg must be 32bit components }
-var
-  opCount: longint;
-  tmpreg: tsuperregister;
-begin
-  RegSizesOK := true;
-  { if only one of them is a general purpose register ... }
-  if (IsGP32reg(oldReg) xor IsGP32Reg(newReg)) then
-    begin
-      for opCount := 0 to p.ops-1 do
-        if (p.oper[opCount]^.typ = top_reg) and
-           (getsubreg(p.oper[opCount]^.reg) in [R_SUBL,R_SUBH]) then
-          begin
-            tmpreg := getsupreg(p.oper[opCount]^.reg);
-            if (tmpreg = oldreg) or
-               (tmpreg = newreg) then
-              begin
-                RegSizesOK := false;
-                break
-              end
-          end;
-    end;
-end;
-
-
-function doReplaceReadReg(p: taicpu; newReg,orgReg: tsuperregister): boolean;
-var
-  opCount: longint;
-begin
-  doReplaceReadReg := false;
-  { handle special case }
-  case p.opcode of
-    A_IMUL:
-      begin
-        case p.ops of
-          1: internalerror(1301001);
-          2,3:
-            begin
-              if changeOp(p.oper[0]^,newReg,orgReg) then
-                begin
-{                  updateStates(orgReg,newReg,p,false);}
-                  doReplaceReadReg := true;
-                end;
-             if p.ops = 3 then
-                if changeOp(p.oper[1]^,newReg,orgReg) then
-                  begin
-{                    updateStates(orgReg,newReg,p,false);}
-                    doReplaceReadReg := true;
-                  end;
-            end;
-        end;
-      end;
-    A_DIV,A_IDIV,A_MUL: internalerror(1301002);
-    else
-      begin
-        for opCount := 0 to p.ops-1 do
-          if p.oper[opCount]^.typ = top_ref then
-            if changeOp(p.oper[opCount]^,newReg,orgReg) then
-              begin
-{                updateStates(orgReg,newReg,p,false);}
-                doReplaceReadReg := true;
-              end;
-        for opCount := 1 to maxinschanges do
-          case InsProp[p.opcode].Ch[opCount] of
-            Ch_ROp1:
-              if p.oper[0]^.typ = top_reg then
-                if changeReg(p.oper[0]^.reg,newReg,orgReg) then
-                  begin
-{                    updateStates(orgReg,newReg,p,false);}
-                    doReplaceReadReg := true;
-                  end;
-            Ch_ROp2:
-              if p.oper[1]^.typ = top_reg then
-                if changeReg(p.oper[1]^.reg,newReg,orgReg) then
-                  begin
-{                    updateStates(orgReg,newReg,p,false);}
-                    doReplaceReadReg := true;
-                  end;
-            Ch_ROp3:
-              if p.oper[2]^.typ = top_reg then
-                if changeReg(p.oper[2]^.reg,newReg,orgReg) then
-                  begin
-{                    updateStates(orgReg,newReg,p,false);}
-                    doReplaceReadReg := true;
-                  end;
-          end;
-      end;
-  end;
-end;
-
-
-procedure updateState(supreg: tsuperregister; p: tai);
-{ this procedure updates the read and write states of the instructions }
-{ coming after p. It's called when the read/write state of p has been  }
-{ changed and this change has to be propagated to the following        }
-{ instructions as well                                                 }
-var
-  newRState, newWState: byte;
-  prevRState, prevWState: byte;
-  doRState, doWState: boolean;
-begin
-  { get the new read/write states from p }
-  with ptaiprop(p.optinfo)^.regs[supreg] do
-    begin
-      newRState := rState;
-      newWState := wState;
-    end;
-  if not GetNextInstruction(p,p) then
-    exit;
-  { get the old read/write states from the next instruction, to know }
-  { when we can stop updating                                        }
-  with ptaiprop(p.optinfo)^.regs[supreg] do
-    begin
-      prevRState := rState;
-      prevWState := wState;
-    end;
-  { adjust the states if this next instruction reads/writes the register }
-  if regReadByInstruction(supreg,p) then
-    incState(newRState,1);
-  if regModifiedByInstruction(supreg,p) then
-    incState(newWState,1);
-  { do we still have to update the read and/or write states? }
-  doRState := true;
-  doWState := true;
-  repeat
-    { update the states }
-    with ptaiprop(p.optinfo)^.regs[supreg] do
-      begin
-        if doRState then
-          rState := newRState;
-        if doWState then
-          wState := newWState;
-      end;
-    if not getNextInstruction(p,p) then
-      break;
-    with ptaiprop(p.optinfo)^.regs[supreg] do
-      begin
-        { stop updating the read state if it changes }
-        doRState :=
-          doRState and (rState = prevRState);
-        { if, by accident, this changed state is the same as the one }
-        { we've been using, change it to a value that's definitely   }
-        { different from the previous and next state                 }
-        if not doRState and
-           (rState = newRState) then
-          begin
-            incState(newRState,1);
-            prevRState := rState;
-            doRState := true;
-          end;
-        { ditto for the write state }
-        doWState :=
-          doWState and (WState = prevWState);
-        if not doWState and
-           (wState = newWState) then
-          begin
-            incState(newWState,1);
-            prevWState := wState;
-            doWState := true;
-          end;
-      end;
-  { stop when we don't have to update either state anymore }
-  until not(doRState or doWState);
-end;
-
-
-function storeBack(start, current: tai; orgReg, newReg: tsuperregister): boolean;
-{ returns true if p1 contains an instruction that stores the contents }
-{ of newReg back to orgReg                                            }
-begin
-  storeback := false;
-  if (current.typ = ait_instruction) and
-     (taicpu(current).opcode = A_MOV) and
-     (taicpu(current).oper[0]^.typ = top_reg) and
-     (getsupreg(taicpu(current).oper[0]^.reg) = newReg) and
-     (taicpu(current).oper[1]^.typ = top_reg) and
-     (getsupreg(taicpu(current).oper[1]^.reg) = orgReg) then
-    case taicpu(current).opsize of
-      S_B:
-        storeback := true;
-      S_W:
-        storeback := taicpu(start).opsize <> S_B;
-      S_L:
-        storeback := taicpu(start).opsize = S_L;
-      else
-        internalerror(2003121501);
-    end;
-end;
-
-
-function canreplacereg(orgsupreg, newsupreg: tsuperregister; p: tai;
-  orgRegCanBeModified: boolean; var resnewregmodified, resorgregread, resremovelast: boolean; var returnendp: tai): boolean;
-var
-  endP, hp: tai;
-  removeLast, sequenceEnd, tmpResult, newRegModified, orgRegRead: boolean;
-begin
-  canreplacereg := false;
-  tmpResult := true;
-  sequenceEnd := false;
-  newRegModified := false;
-  orgRegRead := false;
-  removeLast := false;
-  endP := p;
-  while tmpResult and not sequenceEnd do
-    begin
-      tmpResult :=
-        getNextInstruction(endP,endP) and
-        (endp.typ = ait_instruction) and
-        not(taicpu(endp).is_jmp);
-      if tmpresult and not assigned(endp.optinfo) then
-        begin
-{          hp := tai_comment.Create(strpnew('next no optinfo'));
-          hp.next := endp;
-          hp.previous := endp.previous;
-          endp.previous := hp;
-          if assigned(hp.previous) then
-            hp.previous.next := hp;}
-          exit;
-        end;
-      if tmpResult and
-         { don't take into account instructions that will be removed }
-         not (ptaiprop(endp.optinfo)^.canBeRemoved) then
-        begin
-          { if the newsupreg gets stored back to the oldReg, we can change }
-          { "mov %oldReg,%newReg; <operations on %newReg>; mov %newReg, }
-          { %oldReg" to "<operations on %oldReg>"                       }
-          removeLast := storeBack(p,endP, orgsupreg, newsupreg);
-          sequenceEnd :=
-            { no support for (i)div, mul and imul with hardcoded operands }
-            noHardCodedRegs(taicpu(endP),orgsupreg,newsupreg) and
-            { if newsupreg gets loaded with a new value, we can stop   }
-            { replacing newsupreg with oldReg here (possibly keeping   }
-            { the original contents of oldReg so we still know them }
-            { afterwards)                                           }
-             (RegLoadedWithNewValue(newsupreg,true,taicpu(endP)) or
-            { we can also stop if we reached the end of the use of }
-            { newReg's current contents                            }
-              (GetNextInstruction(endp,hp) and
-               FindRegDealloc(newsupreg,hp)));
-          { to be able to remove the first and last instruction of  }
-          {   movl %reg1, %reg2                                     }
-          {   <operations on %reg2> (replacing reg2 with reg1 here) }
-          {   movl %reg2, %reg1                                     }
-          { %reg2 must not be use afterwards (it can be as the      }
-          { result of a peepholeoptimization)                       }
-          removeLast := removeLast and sequenceEnd;
-          newRegModified :=
-            newRegModified or
-            (not(regLoadedWithNewValue(newsupreg,true,taicpu(endP))) and
-             RegModifiedByInstruction(newsupreg,endP));
-          orgRegRead := newRegModified and RegReadByInstruction(orgsupreg,endP);
-          sequenceEnd := SequenceEnd and
-                         (removeLast or
-    { since newsupreg will be replaced by orgsupreg, we can't allow that newsupreg }
-    { gets modified if orgsupreg is still read afterwards (since after       }
-    { replacing, this would mean that orgsupreg first gets modified and then }
-    { gets read in the assumption it still contains the unmodified value) }
-                         not(newRegModified and orgRegRead)) (* and
-    { since newsupreg will be replaced by orgsupreg, we can't allow that newsupreg }
-    { gets modified if orgRegCanBeModified = false                        }
-
-    { this now gets checked after the loop (JM) }
-                         (orgRegCanBeModified or not(newRegModified)) *);
-          tmpResult :=
-            not(removeLast) and
-            not(newRegModified and orgRegRead) and
-(*            (orgRegCanBeModified or not(newRegModified)) and *)
-(*          already checked at the top
-            (endp.typ = ait_instruction) and  *)
-            NoHardCodedRegs(taicpu(endP),orgsupreg,newsupreg) and
-            RegSizesOk(orgsupreg,newsupreg,taicpu(endP)) and
-            not RegModifiedByInstruction(orgsupreg,endP);
-        end;
-    end;
-  canreplacereg := sequenceEnd and
-     (removeLast  or
-      (orgRegCanBeModified or not(newRegModified))) and
-     (not(assigned(endp)) or
-      not(endp.typ = ait_instruction) or
-      (noHardCodedRegs(taicpu(endP),orgsupreg,newsupreg) and
-       RegSizesOk(orgsupreg,newsupreg,taicpu(endP)) and
-       not(newRegModified and
-           (orgsupreg in ptaiprop(endp.optinfo)^.usedRegs) and
-           not(RegLoadedWithNewValue(orgsupreg,true,taicpu(endP))))));
-  if canreplacereg then
-    begin
-      resnewregmodified := newregmodified;
-      resorgregread := orgregread;
-      resremovelast := removelast;
-    end;
-  { needed for replaceregdebug code }
-  returnendp := endp;
-end;
-
-
-
-function ReplaceReg(asml: TAsmList; orgsupreg, newsupreg: tsuperregister; p,
-          seqstart: tai; const c: TContent; orgRegCanBeModified: Boolean;
-          var returnEndP: tai): Boolean;
-{ Tries to replace orgsupreg with newsupreg in all instructions coming after p }
-{ until orgsupreg gets loaded with a new value. Returns true if successful, }
-{ false otherwise. if successful, the contents of newsupreg are set to c,   }
-{ which should hold the contents of newsupreg before the current sequence   }
-{ started                                                                }
-{ if the function returns true, returnEndP holds the last instruction    }
-{ where newsupreg was replaced by orgsupreg                                    }
-var
-  endP, hp: tai;
-  removeLast, newRegModified, orgRegRead,
-    stateChanged, readStateChanged: Boolean;
-{$ifdef replaceregdebug}
-  l: longint;
-{$endif replaceregdebug}
-
-begin
-  replacereg := false;
-  readStateChanged := false;
-  if canreplacereg(orgsupreg,newsupreg,p,orgregcanbemodified,newregmodified, orgregread, removelast,endp) then
-    begin
-{$ifdef replaceregdebug}
-      l := random(1000);
-      hp := tai_comment.Create(strpnew(
-        'replacing '+std_regname(newreg(R_INTREGISTER,newsupreg,R_SUBWHOLE))+' with '+std_regname(newreg(R_INTREGISTER,orgsupreg,R_SUBWHOLE))+
-        ' from here... '+tostr(l)));
-      insertllitem(asml,p.previous,p,hp);
-      hp := tai_comment.Create(strpnew(
-        'replaced '+std_regname(newreg(R_INTREGISTER,newsupreg,R_SUBWHOLE))+' with '+std_regname(newreg(R_INTREGISTER,orgsupreg,R_SUBWHOLE))+
-        ' till here ' + tostr(l)));
-      insertllitem(asml,endp,endp.next,hp);
-{$endif replaceregdebug}
-      replaceReg := true;
-      returnEndP := endP;
-
-      if not getNextInstruction(p,hp) then
-        exit;
-      stateChanged := false;
-      while hp <> endP do
-        begin
-          if {not(ptaiprop(hp.optinfo)^.canBeRemoved) and }
-             (hp.typ = ait_instruction) then
-            stateChanged :=
-              doReplaceReg(taicpu(hp),newsupreg,orgsupreg) or stateChanged;
-            if stateChanged then
-              updateStates(orgsupreg,newsupreg,hp,true);
-          getNextInstruction(hp,hp)
-        end;
-      if assigned(endp) and (endp.typ = ait_instruction) then
-        readStateChanged :=
-          doReplaceReadReg(taicpu(endP),newsupreg,orgsupreg);
-      if stateChanged or readStateChanged then
-        updateStates(orgsupreg,newsupreg,endP,stateChanged);
-
-      if stateChanged or readStateChanged then
-        updateState(orgsupreg,endP);
-
-{ We replaced newreg with oldreg between p and endp, so restore the contents }
-{ of newreg there with its contents from before the sequence.                }
-      if removeLast or
-         RegLoadedWithNewValue(newsupreg,true,endP) then
-        GetLastInstruction(endP,hp)
-      else hp := endP;
-      RestoreRegContentsTo(asml,newsupreg,c,seqstart,hp);
-
-{ Ot is possible that the new register was modified (e.g. an add/sub), so if  }
-{ it was replaced by oldreg in that instruction, oldreg's contents have been  }
-{ changed. To take this into account, we simply set the contents of orgsupreg }
-{ to "unknown" after this sequence                                            }
-      if newRegModified then
-        ClearRegContentsFrom(asml,orgsupreg,p,hp);
-      if removeLast then
-        ptaiprop(endp.optinfo)^.canBeRemoved := true;
-      allocRegBetween(asml,newreg(R_INTREGISTER,orgsupreg,R_SUBWHOLE),p,endP,ptaiprop(p.optinfo)^.usedregs);
-
-    end
-{$ifdef replaceregdebug}
-     else
-       begin
-         l := random(1000);
-         hp := tai_comment.Create(strpnew(
-           'replacing '+std_regname(newreg(R_INTREGISTER,newsupreg,R_SUBWHOLE))+' with '+std_regname(newreg(R_INTREGISTER,orgsupreg,R_SUBWHOLE))+
-           ' from here... '+ tostr(l)));
-         insertllitem(asml,p.previous,p,hp);
-        hp := tai_comment.Create(strpnew(
-          'replacing '+std_regname(newreg(R_INTREGISTER,newsupreg,R_SUBWHOLE))+' with '+std_regname(newreg(R_INTREGISTER,orgsupreg,R_SUBWHOLE))+
-          ' failed here ' + tostr(l)));
-        insertllitem(asml,endp,endp.next,hp);
-      end;
-{$endif replaceregdebug}
-end;
-
-
-function FindRegWithConst(p: tai; size: topsize; l: aint; var Res: TRegister): Boolean;
-{Finds a register which contains the constant l}
-var
-  Counter: tsuperregister;
-{$ifdef testing}
-    hp: tai;
-{$endif testing}
-begin
-  Result:=false;
-  Counter := RS_EAX;
-  repeat
-{$ifdef testing}
-     if (ptaiprop(p.optinfo)^.regs[counter].typ in [con_const,con_noRemoveConst]) then
-       begin
-         hp := tai_comment.Create(strpnew(
-           'checking const load of '+tostr(l)+' here...'));
-         hp.next := ptaiprop(p.optinfo)^.Regs[Counter].StartMod;
-         hp.previous := ptaiprop(p.optinfo)^.Regs[Counter].StartMod^.previous;
-         ptaiprop(p.optinfo)^.Regs[Counter].StartMod^.previous := hp;
-         if assigned(hp.previous) then
-           hp.previous.next := hp;
-       end;
-{$endif testing}
-     if (ptaiprop(p.optinfo)^.regs[counter].typ in [con_const,con_noRemoveConst]) and
-        (taicpu(ptaiprop(p.optinfo)^.Regs[Counter].StartMod).opsize = size) and
-        (taicpu(ptaiprop(p.optinfo)^.Regs[Counter].StartMod).oper[0]^.typ = top_const) and
-        (taicpu(ptaiprop(p.optinfo)^.Regs[Counter].StartMod).oper[0]^.val = l) then
-       begin
-         res:=taicpu(ptaiprop(p.optinfo)^.Regs[Counter].StartMod).oper[1]^.reg;
-         result:=true;
-         exit;
-       end;
-     inc(counter);
-  until (Counter > RS_EDI);
-end;
-
-
-procedure removePrevNotUsedLoad(asml: TAsmList; p: tai; supreg: tsuperregister; check: boolean);
-{ if check = true, it means the procedure has to check whether it isn't  }
-{ possible that the contents are still used after p (used when removing  }
-{ instructions because of a "call"), otherwise this is not necessary     }
-{ (e.g. when you have a "mov 8(%ebp),%eax", you can be sure the previous }
-{ value of %eax isn't used anymore later on)                             }
-var
-  hp1, next, beforestartmod: tai;
-begin
-  if getLastInstruction(p,hp1) then
-    with ptaiprop(hp1.optinfo)^.regs[supreg] do
-      if (typ in [con_ref,con_invalid,con_const]) and
-         (nrofMods = 1) and
-         (rState = ptaiprop(startmod.optinfo)^.regs[supreg].rState) and
-         (not(check) or
-          (not(regInInstruction(supreg,p)) and
-           (not(supreg in ptaiprop(hp1.optinfo)^.usedRegs) or
-            findRegDealloc(supreg,p)))) then
-        begin
-          ptaiprop(startMod.optinfo)^.canBeRemoved := true;
-          getnextinstruction(p,next);
-          { give the register that was modified by this instruction again }
-          { the contents it had before this instruction                   }
-          if getlastinstruction(startmod,beforestartmod) then
-            RestoreRegContentsTo(asml,supreg,ptaiprop(beforestartmod.optinfo)^.regs[supreg],
-             startmod,hp1)
-          else
-            ClearRegContentsFrom(asml,supreg,startmod,hp1);
-        end;
-end;
-
-
-{$ifdef notused}
-function is_mov_for_div(p: taicpu): boolean;
-begin
-  is_mov_for_div :=
-    (p.opcode = A_MOV) and
-    (p.oper[0]^.typ = top_const) and
-    (p.oper[1]^.typ = top_reg) and
-    (p.oper[1]^.reg = RS_EDX) and
-    getNextInstruction(p,p) and
-    (p.typ = ait_instruction) and
-    ((p.opcode = A_DIV) or
-     (p.opcode = A_IDIV));
-end;
-{$endif notused}
-
-
-function memtoreg(t: taicpu; const ref: treference; var startp: tai): tregister;
-var
-  hp: tai;
-  p: ptaiprop;
-  regcounter: tsuperregister;
-  optimizable: boolean;
-begin
-  memtoreg := NR_NO;
-
-  if not getlastinstruction(t,hp) or
-     not issimplememloc(ref) then
-    exit;
-
-  p := ptaiprop(hp.optinfo);
-  optimizable := false;
-  for regcounter := RS_EAX to RS_EDI do
-    begin
-      if (assigned(p^.regs[regcounter].memwrite) and
-         refsequal(ref,p^.regs[regcounter].memwrite.oper[1]^.ref^)) then
-        begin
-          optimizable := true;
-          hp := p^.regs[regcounter].memwrite;
-        end
-      else if ((p^.regs[regcounter].typ in [CON_REF,CON_NOREMOVEREF]) and
-             (p^.regs[regcounter].nrofmods = 1) and
-             ((taicpu(p^.regs[regcounter].startmod).opcode = A_MOV) or
-              (taicpu(p^.regs[regcounter].startmod).opcode = A_MOVZX) or
-              (taicpu(p^.regs[regcounter].startmod).opcode = A_MOVSX)) and
-             (taicpu(p^.regs[regcounter].startmod).oper[0]^.typ = top_ref) and
-             refsequal(ref,taicpu(p^.regs[regcounter].startmod).oper[0]^.ref^)) then
-        begin
-          optimizable := true;
-          hp := p^.regs[regcounter].startmod;
-        end;
-      if optimizable then
-        if ((t.opsize <> S_B) or
-            not(regcounter in [RS_ESI,RS_EDI])) and
-            sizescompatible(taicpu(hp).opsize,t.opsize) then
-          begin
-            case t.opsize of
-              S_B:
-                begin
-                  memtoreg := newreg(R_INTREGISTER,regcounter,R_SUBL)
-                end;
-              S_W,S_BW:
-                begin
-                  memtoreg := newreg(R_INTREGISTER,regcounter,R_SUBW);
-                  if (t.opsize = S_BW) then
-                      begin
-                        t.opcode := A_MOV;
-                        t.opsize := S_W;
-                      end;
-                end;
-              S_L,S_BL,S_WL:
-                begin
-                  memtoreg := newreg(R_INTREGISTER,regcounter,R_SUBWHOLE);
-                  if (t.opsize <> S_L) then
-                    begin
-                      t.opcode := A_MOV;
-                      t.opsize := S_L;
-                    end;
-                end;
-            end;
-            startp := hp;
-            exit;
-          end;
-    end;
-  memtoreg := NR_NO;
-end;
-
-
-procedure removeLocalStores(const t1: tai);
-{var
-  p: tai;
-  regcount: tregister; }
-begin
-{
-  for regcount := LoGPReg to HiGPReg do
-    if assigned(pTaiProp(t1.optinfo)^.regs[regcount].memwrite) and
-       (taicpu(pTaiProp(t1.optinfo)^.regs[regcount].memwrite).oper[1]^.ref^.base
-         = current_procinfo.framepointer) then
-      begin
-        pTaiProp(pTaiProp(t1.optinfo)^.regs[regcount].memwrite.optinfo)^.canberemoved := true;
-        clearmemwrites(pTaiProp(t1.optinfo)^.regs[regcount].memwrite,regcount);
-      end;
-}
-end;
-
-
-procedure loadcseregs(asml: TAsmList; const reginfo: toptreginfo; curseqend, prevseqstart, curseqstart, curprev: tai; cnt: longint);
-var
-  regsloaded: tregset;
-  regloads, reguses: array[RS_EAX..RS_EDI] of tai;
-  regcounter: tsuperregister;
-  hp, hp2: tai;
-  insertpos, insertoptinfo, prevseq_next: tai;
-  i: longint;
-  opc: tasmop;
-begin
-  regsloaded := [];
-  fillchar(regloads,sizeof(regloads),0);
-  fillchar(reguses,sizeof(reguses),0);
-  getnextinstruction(prevseqstart,prevseq_next);
-  for regcounter := RS_EAX To RS_EDI do
-    if (reginfo.new2oldreg[regcounter] <> RS_INVALID) Then
-      begin
-        include(regsloaded,regcounter);
-        if assigned(ptaiprop(prevseqstart.optinfo)^.Regs[reginfo.new2oldreg[regcounter]].StartMod) then
-          AllocRegBetween(asml,newreg(R_INTREGISTER,reginfo.new2oldreg[regcounter],R_SUBWHOLE),
-            ptaiprop(prevseqstart.optinfo)^.Regs[reginfo.new2oldreg[regcounter]].StartMod,curseqstart,
-            ptaiprop(ptaiprop(prevseqstart.optinfo)^.Regs[reginfo.new2oldreg[regcounter]].StartMod.optinfo)^.usedregs)
-        else
-          AllocRegBetween(asml,newreg(R_INTREGISTER,reginfo.new2oldreg[regcounter],R_SUBWHOLE),
-            prevseqstart,curseqstart,ptaiprop(prevseqstart.optinfo)^.usedregs);
-
-        if curprev <> prevseqstart then
-          begin
-            if assigned(reginfo.lastReload[regCounter]) then
-              getLastInstruction(reginfo.lastReload[regCounter],hp)
-            else if assigned(reginfo.lastReload[reginfo.new2oldreg[regCounter]]) then
-              getLastInstruction(reginfo.lastReload[reginfo.new2OldReg[regCounter]],hp)
-            else
-              hp := curprev;
-            clearRegContentsFrom(asml,regCounter,prevSeq_next,hp);
-            getnextInstruction(hp,hp);
-            allocRegBetween(asml,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prevseqstart,hp,
-              ptaiprop(prevseqstart.optinfo)^.usedregs);
-          end;
-        if not(regcounter in reginfo.RegsLoadedforRef) and
-                      {old reg                new reg}
-            (reginfo.new2oldreg[regcounter] <> regcounter) then
-          begin
-            getLastInstruction(curseqend,hp);
-            opc := A_MOV;
-            insertpos := prevseq_next;
-            insertoptinfo := prevseqstart;
-            if assigned(reguses[regcounter]) then
-              if assigned(regloads[reginfo.new2oldreg[regcounter]]) then
-                opc := A_XCHG
-              else
-                begin
-                  insertoptinfo := reguses[regcounter];
-                  insertpos := tai(insertoptinfo.next)
-                end
-            else
-              if assigned(regloads[reginfo.new2oldreg[regcounter]]) then
-                 begin
-                   insertpos := regloads[reginfo.new2oldreg[regcounter]];
-                   if not getlastinstruction(insertpos,insertoptinfo) then
-                     internalerror(2006060701);
-                 end;
-            hp := Tai_Marker.Create(mark_NoPropInfoStart);
-            InsertLLItem(asml, insertpos.previous,insertpos, hp);
-            hp2 := taicpu.Op_Reg_Reg(opc, S_L,
-                                            {old reg                                        new reg}
-                     newreg(R_INTREGISTER,reginfo.new2oldreg[regcounter],R_SUBWHOLE), newreg(R_INTREGISTER,regcounter,R_SUBWHOLE));
-            if (opc = A_XCHG) and
-               (taicpu(regloads[reginfo.new2oldreg[regcounter]]).opcode <> A_XCHG) then
-              begin
-                asml.remove(regloads[reginfo.new2oldreg[regcounter]]);
-                regloads[reginfo.new2oldreg[regcounter]].free;
-                regloads[reginfo.new2oldreg[regcounter]] := hp2;
-                reguses[regcounter] := hp2;
-              end;
-            regloads[regcounter] := hp2;
-            reguses[reginfo.new2oldreg[regcounter]] := hp2;
-            new(ptaiprop(hp2.optinfo));
-            ptaiprop(hp2.optinfo)^ := ptaiprop(insertoptinfo.optinfo)^;
-            ptaiprop(hp2.optinfo)^.canBeRemoved := false;
-            InsertLLItem(asml, insertpos.previous, insertpos, hp2);
-            hp := Tai_Marker.Create(mark_NoPropInfoEnd);
-            InsertLLItem(asml, insertpos.previous, insertpos, hp);
-            { adjusts states in previous instruction so that it will  }
-            { definitely be different from the previous or next state }
-            incstate(ptaiprop(hp2.optinfo)^.
-              regs[reginfo.new2oldreg[regcounter]].rstate,20);
-            incstate(ptaiprop(hp2.optinfo)^.
-              regs[regCounter].wstate,20);
-            updateState(reginfo.new2oldreg[regcounter],hp2);
-            updateState(regcounter,hp2);
-          end
-        else
-  {   imagine the following code:                                            }
-  {        normal                    wrong optimized                         }
-  {    movl 8(%ebp), %eax           movl 8(%ebp), %eax                       }
-  {    movl (%eax), %eax            movl (%eax), %eax                        }
-  {    cmpl 8(%ebp), %eax           cmpl 8(%ebp), %eax                       }
-  {    jne l1                       jne l1                                   }
-  {    movl 8(%ebp), %eax                                                    }
-  {    movl (%eax), %edi            movl %eax, %edi                          }
-  {    movl %edi, -4(%ebp)          movl %edi, -4(%ebp)                      }
-  {    movl 8(%ebp), %eax                                                    }
-  {    pushl 70(%eax)               pushl 70(%eax)                           }
-  {                                                                          }
-  {   The error is that at the moment that the last instruction is executed, }
-  {   %eax doesn't contain 8(%ebp) anymore. Solution: the contents of        }
-  {   registers that are completely removed from a sequence (= registers in  }
-  {   RegLoadedforRef), have to be changed to their contents from before the }
-  {   sequence.                                                              }
-        { if regcounter in reginfo.RegsLoadedforRef then }
-          begin
-            hp := curseqstart;
-            { cnt still holds the number of instructions }
-            { of the sequence, so go to the end of it    }
-            for i := 1 to pred(cnt) do
-              getNextInstruction(hp,hp);
-            { curprev = instruction prior to start of sequence }
-            restoreRegContentsTo(asml,regCounter,
-              ptaiprop(curprev.optinfo)^.Regs[regcounter],
-              curseqstart,hp);
-          end;
-      end;
-end;
-
-
-procedure replaceoperandwithreg(asml: TAsmList; p: tai; opnr: byte; reg: tregister);
-var
-  hp: tai;
-begin
-  { new instruction -> it's info block is not in the big one allocated at the start }
-  hp := Tai_Marker.Create(mark_NoPropInfoStart);
-  InsertLLItem(asml, p.previous,p, hp);
-  { duplicate the original instruction and replace it's designated operant with the register }
-  hp := tai(p.getcopy);
-  taicpu(hp).loadreg(opnr,reg);
-  { add optimizer state info }
-  new(ptaiprop(hp.optinfo));
-  ptaiprop(hp.optinfo)^ := ptaiprop(p.optinfo)^;
-  { new instruction can not be removed }
-  ptaiprop(hp.optinfo)^.canBeRemoved := false;
-  { but the old one can }
-  ptaiprop(p.optinfo)^.canBeRemoved := true;
-  { insert end marker }
-  InsertLLItem(asml, p.previous, p, hp);
-  hp := Tai_Marker.Create(mark_NoPropInfoEnd);
-  InsertLLItem(asml, p.previous, p, hp);
-end;
-
-
-procedure doCSE(asml: TAsmList; First, Last: tai; findPrevSeqs, doSubOpts: boolean);
-{marks the instructions that can be removed by RemoveInstructs. They're not
- removed immediately because sometimes an instruction needs to be checked in
- two different sequences}
-var cnt, cnt2, {cnt3,} orgNrofMods: longint;
-    p, hp1, hp2, hp4, hp5, prevSeq: tai;
-    reginfo: toptreginfo;
-    memreg: tregister;
-    regcounter: tsuperregister;
-begin
-  p := First;
-  SkipHead(p);
-  hp1 := nil;
-  hp2 := nil;
-  hp4 := nil;
-  hp5 := nil;
-  cnt := 0;
-  while (p <> Last) do
-    begin
-      case p.typ of
-        ait_align:
-          if not(tai_align(p).use_op) then
-            SetAlignReg(p);
-        ait_instruction:
-          begin
-            case taicpu(p).opcode of
-{
-     Does not work anymore with register calling because the registers are
-     released before the call
-              A_CALL:
-                for regCounter := RS_EAX to RS_EBX do
-                  removePrevNotUsedLoad(asml,p,regCounter,true);
-}
-              A_CLD: if GetLastInstruction(p, hp1) and
-                        (ptaiprop(hp1.optinfo)^.DirFlag = F_NotSet) then
-                       ptaiprop(tai(p).optinfo)^.CanBeRemoved := True;
-              A_LEA, A_MOV, A_MOVZX, A_MOVSX:
-                begin
-                  hp2 := p;
-                  case taicpu(p).oper[0]^.typ of
-                    top_ref, top_reg:
-                     if (taicpu(p).oper[1]^.typ = top_reg) then
-                       begin
-                        With ptaiprop(p.optinfo)^.Regs[getsupreg(taicpu(p).oper[1]^.reg)] do
-                          begin
-                            if (startmod = p) then
-                              orgNrofMods := nrofMods
-                            else
-                              orgNrofMods := 0;
-                            if (p = StartMod) and
-                               GetLastInstruction (p, hp1) and
-                               not(hp1.typ in [ait_marker,ait_label]) then
-{so we don't try to check a sequence when p is the first instruction of the block}
-                              begin
-{$ifdef csdebug}
-                               hp5 := tai_comment.Create(strpnew(
-                                 'cse checking '+std_regname(taicpu(p).oper[1]^.reg)));
-                               insertLLItem(asml,p,p.next,hp5);
-{$endif csdebug}
-                               if CheckSequence(p,prevSeq,getsupreg(taicpu(p).oper[1]^.reg), Cnt, reginfo, findPrevSeqs) and
-                                  (Cnt > 0) then
-                                 begin
-(*
-                                   hp1 := nil;
-{ although it's perfectly ok to remove an instruction which doesn't contain }
-{ the register that we've just checked (CheckSequence takes care of that),  }
-{ the sequence containing this other register should also be completely     }
-{ checked and removed, otherwise we may get situations like this:           }
-{                                                                           }
-{   movl 12(%ebp), %edx                       movl 12(%ebp), %edx           }
-{   movl 16(%ebp), %eax                       movl 16(%ebp), %eax           }
-{   movl 8(%edx), %edx                        movl 8(%edx), %edx            }
-{   movl (%eax), eax                          movl (%eax), eax              }
-{   cmpl %eax, %edx                           cmpl %eax, %edx               }
-{   jnz  l123           getting converted to  jnz  l123                     }
-{   movl 12(%ebp), %edx                       movl 4(%eax), eax             }
-{   movl 16(%ebp), %eax                                                     }
-{   movl 8(%edx), %edx                                                      }
-{   movl 4(%eax), eax                                                       }
-*)
-
-{ not anymore: if the start of a new sequence is found while checking (e.g. }
-{ above that of eax while checking edx, this new sequence is automatically  }
-{ also checked                                                              }
-                                   Cnt2 := 1;
-                                   while Cnt2 <= Cnt do
-                                     begin
-{$ifndef noremove}
-                                         ptaiprop(p.optinfo)^.CanBeRemoved := True
-{$endif noremove}
-                                       ; inc(Cnt2);
-                                       GetNextInstruction(p, p);
-                                     end;
- {hp4 is used to get the contents of the registers before the sequence}
-                                   GetLastInstruction(hp2, hp4);
-
-{$IfDef CSDebug}
-                                   for regcounter := RS_EAX To RS_EDI do
-                                     if (regcounter in reginfo.RegsLoadedforRef) then
-                                       begin
-                                         hp5 := tai_comment.Create(strpnew('New: '+std_regname(newreg(R_INTREGISTER,regcounter,R_SUBNONE))+', Old: '+
-                                           std_regname(newreg(R_INTREGISTER,reginfo.new2oldreg[regcounter],R_SUBNONE))));
-                                         InsertLLItem(asml, tai(hp2.previous), hp2, hp5);
-                                       end;
-{$EndIf CSDebug}
- { if some registers were different in the old and the new sequence, move }
- { the contents of those old registers to the new ones                    }
-                                   loadcseregs(asml,reginfo,p,prevseq,hp2,hp4,cnt);
-                                   continue;
-                                 end
-                              end;
-                          end;
-                      { try to replace the new reg with the old reg }
-                      if not(ptaiprop(p.optinfo)^.canBeRemoved) then
-                        if (taicpu(p).oper[0]^.typ = top_reg) and
-                           (taicpu(p).oper[1]^.typ = top_reg) and
-                           { only remove if we're not storing something in a regvar }
-                           (getsupreg(taicpu(p).oper[1]^.reg) in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI,RS_EDI]) and
-{                           (taicpu(p).oper[1]^.reg in (rg.usableregsint+[RS_EDI])) and}
-                           (taicpu(p).opcode = A_MOV) and
-                           getLastInstruction(p,hp4) and
-                          { we only have to start replacing from the instruction after the mov, }
-                          { but replacereg only starts with getnextinstruction(p,p)             }
-                            replaceReg(asml,getsupreg(taicpu(p).oper[0]^.reg),
-                              getsupreg(taicpu(p).oper[1]^.reg),p,p,
-                              ptaiprop(hp4.optinfo)^.regs[getsupreg(taicpu(p).oper[1]^.reg)],false,hp1) then
-                          begin
-                            ptaiprop(p.optinfo)^.canBeRemoved := true;
-                            { this is just a regular move that was here, so the source register should be }
-                            { allocated already at this point -> only allocate from here onwards          }
-                            if not(getsupreg(taicpu(p).oper[0]^.reg) in pTaiProp(p.optinfo)^.usedregs) then
-                              internalerror(2004101011);
-                            allocRegBetween(asml,taicpu(p).oper[0]^.reg,
-                              p,hp1,pTaiProp(p.optinfo)^.usedregs)
-                          end
-                        else
-                          begin
-                             if (taicpu(p).oper[1]^.typ = top_reg) and
-                                not regInOp(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^) then
-                               removePrevNotUsedLoad(asml,p,getsupreg(taicpu(p).oper[1]^.reg),false);
-                             if doSubOpts and
-                                (taicpu(p).opcode <> A_LEA) and
-                                (taicpu(p).oper[0]^.typ = top_ref) then
-                              begin
-                                memreg :=
-                                  memtoreg(taicpu(p),
-                                  taicpu(p).oper[0]^.ref^,hp5);
-                                if memreg <> NR_NO then
-                                  if (taicpu(p).opcode = A_MOV) and
-                                     (taicpu(p).oper[1]^.typ = top_reg) and
-                                     (taicpu(p).oper[1]^.reg = memreg) then
-                                    begin
-                                      pTaiProp(p.optinfo)^.canberemoved := true;
-                                      allocregbetween(asml,memreg,hp5,p,ptaiprop(hp5.optinfo)^.usedregs);
-                                    end
-                                  else
-                                    begin
-                                      replaceoperandwithreg(asml,p,0,memreg);
-                                      allocregbetween(asml,memreg,hp5,p,ptaiprop(hp5.optinfo)^.usedregs);
-                                      regcounter := getsupreg(memreg);
-                                      incstate(pTaiProp(p.optinfo)^.regs[regcounter].rstate,1);
-                                      updatestate(regcounter,p);
-                                    end;
-                              end;
-                          end;
-                        { at first, only try optimizations of large blocks, because doing }
-                        { doing smaller ones may prevent bigger ones from completing in   }
-                        { in the next pass                                                }
-                        if not doSubOpts and (orgNrofMods <> 0) then
-                          begin
-                            p := hp2;
-                            for cnt := 1 to pred(orgNrofMods) do
-                              getNextInstruction(p,p);
-                          end;
-                      end;
-                    top_Const:
-                      begin
-                        case taicpu(p).oper[1]^.typ of
-                          Top_Reg:
-                            begin
-                              regCounter := getsupreg(taicpu(p).oper[1]^.reg);
-                              if GetLastInstruction(p, hp1) then
-                                With ptaiprop(hp1.optinfo)^.Regs[regCounter] do
-                                  if (typ in [con_const,con_noRemoveConst]) and
-                                     (taicpu(startMod).opsize >= taicpu(p).opsize) and
-                                     opsequal(taicpu(StartMod).oper[0]^,taicpu(p).oper[0]^) then
-                                    begin
-                                      ptaiprop(p.optinfo)^.CanBeRemoved := True;
-                                      allocRegBetween(asml,taicpu(p).oper[1]^.reg,startmod,p,
-                                        ptaiprop(startmod.optinfo)^.usedregs);
-                                    end
-                                  else
-                                    removePrevNotUsedLoad(asml,p,getsupreg(taicpu(p).oper[1]^.reg),false);
-
-                            end;
-                          Top_Ref:
-                            if (taicpu(p).oper[0]^.typ = top_const) and
-                               getLastInstruction(p,hp1) and
-                               findRegWithConst(hp1,taicpu(p).opsize,taicpu(p).oper[0]^.val,memreg) then
-                              begin
-                                taicpu(p).loadreg(0,memreg);
-                                { mark the used register as read }
-                                incstate(ptaiprop(p.optinfo)^.
-                                   regs[getsupreg(memreg)].rstate,20);
-                                updateState(getsupreg(memreg),p);
-                                allocRegBetween(asml,memreg,
-                                  ptaiprop(hp1.optinfo)^.regs[getsupreg(memreg)].startMod,p,
-                                  ptaiprop(ptaiprop(hp1.optinfo)^.regs[getsupreg(memreg)].startMod.optinfo)^.usedregs);
-                              end;
-                        end;
-                      end;
-                  end;
-
-                end;
-              A_LEAVE:
-                begin
-                  if getlastinstruction(p,hp1) then
-                    removeLocalStores(hp1);
-                end;
-              A_STD: if GetLastInstruction(p, hp1) and
-                        (ptaiprop(hp1.optinfo)^.DirFlag = F_Set) then
-                        ptaiprop(tai(p).optinfo)^.CanBeRemoved := True;
-              else
-                begin
-                  for cnt := 1 to maxinschanges do
-                    begin
-                      case InsProp[taicpu(p).opcode].Ch[cnt] of
-                        Ch_ROp1:
-                          if (taicpu(p).oper[0]^.typ = top_ref) and
-                             ((taicpu(p).opcode < A_F2XM1) or
-                              ((taicpu(p).opcode > A_IN) and
-                               (taicpu(p).opcode < A_OUT)) or
-                              (taicpu(p).opcode = A_PUSH) or
-                              ((taicpu(p).opcode >= A_RCL) and
-                               (taicpu(p).opcode <= A_XOR))) then
-                            begin
-                              memreg :=
-                                memtoreg(taicpu(p),
-                                taicpu(p).oper[0]^.ref^,hp5);
-                              if memreg <> NR_NO then
-                                begin
-                                  replaceoperandwithreg(asml,p,0,memreg);
-                                  allocregbetween(asml,memreg,hp5,p,ptaiprop(hp5.optinfo)^.usedregs);
-                                  regcounter := getsupreg(memreg);
-                                  incstate(pTaiProp(p.optinfo)^.regs[regcounter].rstate,1);
-                                  updatestate(regcounter,p);
-                                end;
-                            end;
-                        Ch_MOp1:
-                          if not(cs_opt_size in current_settings.optimizerswitches) and
-                             (taicpu(p).oper[0]^.typ = top_ref) then
-                            begin
-                              memreg :=
-                                memtoreg(taicpu(p),
-                                taicpu(p).oper[0]^.ref^,hp5);
-                              if (memreg <> NR_NO) and
-                                 (not getNextInstruction(p,hp1) or
-                                  (RegLoadedWithNewValue(getsupreg(memreg),false,hp1) or
-                                   FindRegDealloc(getsupreg(memreg),hp1))) then
-                                begin
-                                  hp1 := Tai_Marker.Create(mark_NoPropInfoEnd);
-                                  insertllitem(asml,p,p.next,hp1);
-                                  hp1 := taicpu.op_reg_ref(A_MOV,reg2opsize(memreg),
-                                     memreg,taicpu(p).oper[0]^.ref^);
-                                  new(ptaiprop(hp1.optinfo));
-                                  pTaiProp(hp1.optinfo)^ := pTaiProp(p.optinfo)^;
-                                  insertllitem(asml,p,p.next,hp1);
-                                  regcounter := getsupreg(memreg);
-                                  incstate(pTaiProp(hp1.optinfo)^.regs[regcounter].rstate,1);
-                                  updatestate(regcounter,hp1);
-                                  hp1 := Tai_Marker.Create(mark_NoPropInfoStart);
-                                  insertllitem(asml,p,p.next,hp1);
-                                  replaceoperandwithreg(asml,p,0,memreg);
-                                  allocregbetween(asml,memreg,hp5,
-                                    tai(p.next.next),ptaiprop(hp5.optinfo)^.usedregs);
-                                  ClearRegContentsFrom(asml,regcounter,hp5,p);
-                                end;
-                            end;
-                        Ch_ROp2:
-                          if ((taicpu(p).opcode = A_CMP) or
-                              (taicpu(p).opcode = A_TEST)) and
-                             (taicpu(p).oper[1]^.typ = top_ref) then
-                            begin
-                              memreg :=
-                                memtoreg(taicpu(p),
-                                taicpu(p).oper[1]^.ref^,hp5);
-                              if memreg <> NR_NO then
-                                begin
-                                  replaceoperandwithreg(asml,p,1,memreg);
-                                  allocregbetween(asml,memreg,hp5,p,ptaiprop(hp5.optinfo)^.usedregs);
-                                  regcounter := getsupreg(memreg);
-                                  incstate(pTaiProp(p.optinfo)^.regs[regcounter].rstate,1);
-                                  updatestate(regcounter,p);
-                                end;
-                            end;
-                        Ch_MOp2:
-                          if not(cs_opt_size in current_settings.optimizerswitches) and
-                             (taicpu(p).oper[1]^.typ = top_ref) and
-                             ((taicpu(p).opcode < A_BT) or
-                              ((taicpu(p).opcode > A_IN) and
-                               (taicpu(p).opcode < A_OUT)) or
-                              (taicpu(p).opcode = A_PUSH) or
-                              ((taicpu(p).opcode >= A_RCL) and
-                               (taicpu(p).opcode <= A_XOR))) then
-                            begin
-                              memreg :=
-                                memtoreg(taicpu(p),
-                                taicpu(p).oper[1]^.ref^,hp5);
-                              if (memreg <> NR_NO) and
-                                 (not getNextInstruction(p,hp1) or
-                                  (RegLoadedWithNewValue(getsupreg(memreg),false,hp1) or
-                                   FindRegDealloc(getsupreg(memreg),hp1))) then
-                                begin
-                                  hp1 := Tai_Marker.Create(mark_NoPropInfoEnd);
-                                  insertllitem(asml,p,p.next,hp1);
-                                  hp1 := taicpu.op_reg_ref(A_MOV,reg2opsize(memreg),
-                                    memreg,taicpu(p).oper[1]^.ref^);
-                                  new(ptaiprop(hp1.optinfo));
-                                  pTaiProp(hp1.optinfo)^ := pTaiProp(p.optinfo)^;
-                                  insertllitem(asml,p,p.next,hp1);
-                                  regcounter := getsupreg(memreg);
-                                  incstate(pTaiProp(hp1.optinfo)^.regs[regcounter].rstate,1);
-                                  updatestate(regcounter,hp1);
-                                  hp1 := Tai_Marker.Create(mark_NoPropInfoStart);
-                                  insertllitem(asml,p,p.next,hp1);
-                                  replaceoperandwithreg(asml,p,1,memreg);
-                                  allocregbetween(asml,memreg,hp5,
-                                    tai(p.next.next),ptaiprop(hp5.optinfo)^.usedregs);
-                                  ClearRegContentsFrom(asml,regcounter,hp5,p);
-                                end;
-                            end;
-                      end;
-                    end;
-                end;
-            end
-          end;
-      end;
-      GetNextInstruction(p, p);
-    end;
-end;
-
-function removeInstructs(asml: TAsmList; first, last: tai): boolean;
-{ Removes the marked instructions and disposes the PTaiProps of the other }
-{ instructions                                                            }
-var
-  p, hp1: tai;
-  nopropinfolevel: longint;
-begin
-  removeInstructs := false;
-  p := First;
-  nopropinfolevel := 0;
-  while (p <> Last) do
-    begin
-      if (p.typ = ait_marker) and
-         (Tai_marker(p).kind = mark_NoPropInfoStart) then
-        begin
-          hp1 := tai(p.next);
-          asml.remove(p);
-          p.free;
-          nopropinfolevel := 1;
-          while (nopropinfolevel <> 0) do
-            begin
-              p := tai(hp1.next);
-{$ifndef noinstremove}
-              { allocregbetween can insert new ait_regalloc objects }
-              { without optinfo                                     }
-              if (hp1.typ = ait_marker) then
-                begin
-                  case Tai_marker(hp1).kind of
-                    { they can be nested! }
-                    mark_NoPropInfoStart: inc(nopropinfolevel);
-                    mark_NoPropInfoEnd: dec(nopropinfolevel);
-                    else
-                      begin
-                        hp1 := p;
-                        continue;
-                      end;
-                  end;
-                  asml.remove(hp1);
-                  hp1.free;
-                end
-              else if assigned(hp1.optinfo) then
-                if ptaiprop(hp1.optinfo)^.canBeRemoved then
-                  begin
-                    dispose(ptaiprop(hp1.optinfo));
-                    hp1.optinfo := nil;
-                    asml.remove(hp1);
-                    hp1.free;
-                  end
-                else
-{$endif noinstremove}
-                  begin
-                    dispose(ptaiprop(hp1.optinfo));
-                    hp1.optinfo := nil;
-                  end;
-              hp1 := p;
-            end;
-        end
-      else
-{$ifndef noinstremove}
-        if assigned(p.optinfo) and
-              ptaiprop(p.optinfo)^.canBeRemoved then
-          begin
-            hp1 := tai(p.next);
-            asml.Remove(p);
-            p.free;
-            p := hp1;
-            removeInstructs := true;
-          end
-        else
-{$endif noinstremove}
-          begin
-            p.optinfo := nil;
-            p := tai(p.next);
-          end;
-    end;
-end;
-
-function CSE(asml: TAsmList; First, Last: tai; pass: longint): boolean;
-begin
-  doCSE(asml, First, Last, not(cs_opt_level3 in current_settings.optimizerswitches) or (pass >= 2),
-        not(cs_opt_level3 in current_settings.optimizerswitches) or (pass >= 1));
- { register renaming }
-  if not(cs_opt_level3 in current_settings.optimizerswitches) or (pass > 0) then
-    doRenaming(asml, first, last);
-  cse := removeInstructs(asml, first, last);
-end;
-
-end.

+ 0 - 372
compiler/i386/rropt386.pas

@@ -1,372 +0,0 @@
-{
-    Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
-      development team
-
-    This unit contains register renaming functionality
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit rropt386;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses aasmbase,aasmtai,aasmdata,aasmcpu;
-
-procedure doRenaming(asml: TAsmList; first, last: tai);
-
-implementation
-
-uses
-  {$ifdef replaceregdebug}cutils,{$endif}
-  verbose,globals,cpubase,daopt386,csopt386,rgobj,
-  cgbase,cgutils,cgobj;
-
-function canBeFirstSwitch(p: taicpu; supreg: tsuperregister): boolean;
-{ checks whether an operation on reg can be switched to another reg without an }
-{ additional mov, e.g. "addl $4,%reg1" can be changed to "leal 4(%reg1),%reg2" }
-begin
-  canBeFirstSwitch := false;
-  case p.opcode of
-    A_MOV,A_MOVZX,A_MOVSX,A_LEA:
-      canBeFirstSwitch :=
-        (p.oper[1]^.typ = top_reg) and
-        (getsupreg(p.oper[1]^.reg) = supreg);
-    A_IMUL:
-      canBeFirstSwitch :=
-        (p.ops >= 2) and
-        (p.oper[0]^.typ = top_const) and
-        (getsupreg(p.oper[p.ops-1]^.reg) = supreg) and
-        (not pTaiprop(p.optinfo)^.FlagsUsed);
-    A_INC,A_DEC:
-      canBeFirstSwitch :=
-        (p.oper[0]^.typ = top_reg) and
-        (p.opsize = S_L) and
-        (not pTaiprop(p.optinfo)^.FlagsUsed);
-    A_SUB,A_ADD:
-      canBeFirstSwitch :=
-        (p.oper[1]^.typ = top_reg) and
-        (p.opsize = S_L) and
-        (getsupreg(p.oper[1]^.reg) = supreg) and
-        (p.oper[0]^.typ <> top_ref) and
-        ((p.opcode <> A_SUB) or
-         (p.oper[0]^.typ = top_const)) and
-        (not pTaiprop(p.optinfo)^.FlagsUsed);
-    A_SHL:
-      canBeFirstSwitch :=
-        (p.opsize = S_L) and
-        (p.oper[1]^.typ = top_reg) and
-        (getsupreg(p.oper[1]^.reg) = supreg) and
-        (p.oper[0]^.typ = top_const) and
-        (p.oper[0]^.val in [1,2,3]) and
-        (not pTaiprop(p.optinfo)^.FlagsUsed);
-  end;
-end;
-
-
-procedure switchReg(var reg: tregister; reg1, reg2: tsuperregister);
-var
-  supreg: tsuperregister;
-begin
-  if (reg = NR_NO) or
-     (getregtype(reg) <> R_INTREGISTER) then
-    exit;
-  supreg := getsupreg(reg);
-  if (supreg = reg1) then
-    setsupreg(reg,reg2)
-  else if (supreg = reg2) then
-    setsupreg(reg,reg1);
-end;
-
-
-procedure switchOp(var op: toper; reg1, reg2: tsuperregister);
-begin
-  case op.typ of
-    top_reg:
-      switchReg(op.reg,reg1,reg2);
-    top_ref:
-      begin
-        switchReg(op.ref^.base,reg1,reg2);
-        switchReg(op.ref^.index,reg1,reg2);
-      end;
-  end;
-end;
-
-
-procedure doSwitchReg(hp: taicpu; reg1,reg2: tsuperregister);
-var
-  opCount: longint;
-begin
-  for opCount := 0 to hp.ops-1 do
-    switchOp(hp.oper[opCount]^,reg1,reg2);
-end;
-
-
-procedure doFirstSwitch(p: taicpu; reg1, reg2: tsuperregister);
-var
-  tmpRef: treference;
-begin
-  case p.opcode of
-    A_MOV,A_MOVZX,A_MOVSX,A_LEA:
-       begin
-         changeOp(p.oper[1]^,reg1,reg2);
-         changeOp(p.oper[0]^,reg2,reg1);
-       end;
-    A_IMUL:
-      begin
-        p.ops := 3;
-        p.loadreg(2,newreg(R_INTREGISTER,reg2,R_SUBWHOLE));
-        changeOp(p.oper[1]^,reg2,reg1);
-      end;
-    A_INC,A_DEC:
-      begin
-        reference_reset(tmpref,1);
-        tmpref.base := newreg(R_INTREGISTER,reg1,R_SUBWHOLE);
-        case p.opcode of
-          A_INC:
-            tmpref.offset := 1;
-          A_DEC:
-            tmpref.offset := -1;
-        end;
-        p.ops := 2;
-        p.opcode := A_LEA;
-        p.loadreg(1,newreg(R_INTREGISTER,reg2,R_SUBWHOLE));
-        p.loadref(0,tmpref);
-      end;
-    A_SUB,A_ADD:
-      begin
-        reference_reset(tmpref,1);
-        tmpref.base := newreg(R_INTREGISTER,reg1,R_SUBWHOLE);
-        case p.oper[0]^.typ of
-          top_const:
-            begin
-              tmpref.offset := longint(p.oper[0]^.val);
-              if p.opcode = A_SUB then
-                tmpref.offset := - tmpRef.offset;
-            end;
-          top_ref:
-            if (p.oper[0]^.ref^.refaddr=addr_full) then
-              tmpref.symbol := p.oper[0]^.ref^.symbol
-            else
-              internalerror(200402263);
-          top_reg:
-            begin
-              { "addl %reg2,%reg1" must become "leal (%reg1,%reg1),%reg2" }
-              { since at this point reg1 holds the value that reg2 would  }
-              { otherwise contain                                         }
-              tmpref.index := p.oper[0]^.reg;
-              if (getsupreg(tmpref.index)=reg2) then
-                setsupreg(tmpref.index,reg1);
-              tmpref.scalefactor := 1;
-            end;
-          else internalerror(200010031);
-        end;
-        p.opcode := A_LEA;
-        p.loadref(0,tmpref);
-        p.loadreg(1,newreg(R_INTREGISTER,reg2,R_SUBWHOLE));
-      end;
-    A_SHL:
-      begin
-        reference_reset(tmpref,2);
-        tmpref.index := newreg(R_INTREGISTER,reg1,R_SUBWHOLE);
-        tmpref.scalefactor := 1 shl p.oper[0]^.val;
-        p.opcode := A_LEA;
-        p.loadref(0,tmpref);
-        p.loadreg(1,newreg(R_INTREGISTER,reg2,R_SUBWHOLE));
-      end;
-    else internalerror(200010032);
-  end;
-end;
-
-
-function switchRegs(asml: TAsmList; reg1, reg2: tsuperregister; start: tai): Boolean;
-{ change movl  %reg1,%reg2 ... bla ... to ... bla with reg1 and reg2 switched }
-var
-  endP, hp, lastreg1,lastreg2: tai;
-  switchDone, switchLast, tmpResult, sequenceEnd, reg1Modified, reg2Modified: boolean;
-  reg1StillUsed, reg2StillUsed, isInstruction: boolean;
-begin
-  switchRegs := false;
-  tmpResult := true;
-  sequenceEnd := false;
-  reg1Modified := false;
-  reg2Modified := false;
-  switchLast := false;
-  endP := start;
-  while tmpResult and not sequenceEnd do
-    begin
-      tmpResult :=
-        getNextInstruction(endP,endP);
-      If tmpResult and
-         not pTaiprop(endp.optinfo)^.canBeRemoved then
-        begin
-          { if the newReg gets stored back to the oldReg, we can change }
-          { "mov %oldReg,%newReg; <operations on %newReg>; mov %newReg, }
-          { %oldReg" to "<operations on %oldReg>"                       }
-          switchLast := storeBack(start,endP,reg1,reg2);
-          reg1StillUsed := reg1 in pTaiprop(endp.optinfo)^.usedregs;
-          reg2StillUsed := reg2 in pTaiprop(endp.optinfo)^.usedregs;
-          isInstruction := endp.typ = ait_instruction;
-          sequenceEnd :=
-            switchLast or
-            { if both registers are released right before an instruction }
-            { that contains hardcoded regs, it's ok too                  }
-            (not reg1StillUsed and not reg2StillUsed) or
-            { no support for (i)div, mul and imul with hardcoded operands }
-            (((not isInstruction) or
-              noHardCodedRegs(taicpu(endP),reg1,reg2)) and
-             (not reg1StillUsed or
-              (isInstruction and findRegDealloc(reg1,endP) and
-               regLoadedWithNewValue(reg1,false,taicpu(endP)))) and
-             (not reg2StillUsed or
-              (isInstruction and findRegDealloc(reg2,endP) and
-               regLoadedWithNewValue(reg2,false,taicpu(endP)))));
-
-          { we can't switch reg1 and reg2 in something like }
-          {   movl  %reg1,%reg2                             }
-          {   movl  (%reg2),%reg2                           }
-          {   movl  4(%reg1),%reg1                          }
-          if reg2Modified and not(reg1Modified) and
-             regReadByInstruction(reg1,endP) then
-            begin
-              tmpResult := false;
-              break
-            end;
-
-          if not reg1Modified then
-            begin
-              reg1Modified := regModifiedByInstruction(reg1,endP);
-              if reg1Modified and not canBeFirstSwitch(taicpu(endP),reg1) then
-                begin
-                  tmpResult := false;
-                  break;
-                end;
-            end;
-          if not reg2Modified then
-            reg2Modified := regModifiedByInstruction(reg2,endP);
-
-          tmpResult :=
-            ((not isInstruction) or
-             (NoHardCodedRegs(taicpu(endP),reg1,reg2) and
-              RegSizesOk(reg1,reg2,taicpu(endP))));
-
-          if sequenceEnd then
-            break;
-
-          tmpResult :=
-            tmpresult and
-            (endp.typ <> ait_label) and
-            ((not isInstruction) or
-             (not taicpu(endp).is_jmp));
-        end;
-    end;
-
-  if tmpResult and sequenceEnd then
-    begin
-      switchRegs := true;
-      reg1Modified := false;
-      reg2Modified := false;
-      lastreg1 := start;
-      lastreg2 := start;
-      getNextInstruction(start,hp);
-      while hp <> endP do
-        begin
-          if (not pTaiprop(hp.optinfo)^.canberemoved) and
-             (hp.typ = ait_instruction) then
-            begin
-              switchDone := false;
-              if not reg1Modified then
-                begin
-                  reg1Modified := regModifiedByInstruction(reg1,hp);
-                  if reg1Modified then
-                    begin
-                      doFirstSwitch(taicpu(hp),reg1,reg2);
-                      switchDone := true;
-                    end;
-                end;
-              if not switchDone then
-                if reg1Modified then
-                  doSwitchReg(taicpu(hp),reg1,reg2)
-                else
-                  doReplaceReg(taicpu(hp),reg2,reg1);
-            end;
-          if regininstruction(reg1,hp) then
-             lastreg1 := hp;
-          if regininstruction(reg2,hp) then
-             lastreg2 := hp;
-          getNextInstruction(hp,hp);
-        end;
-      if switchLast then
-        begin
-          lastreg1 := hp;
-          lastreg2 := hp;
-          { this is in case of a storeback, make sure the same size of register }
-          { contents as the initial move is transfered                          }
-          doSwitchReg(taicpu(hp),reg1,reg2);
-          if taicpu(hp).opsize <> taicpu(start).opsize then
-            begin
-              taicpu(hp).opsize := taicpu(start).opsize;
-              taicpu(hp).oper[0]^.reg := taicpu(start).oper[0]^.reg;
-              taicpu(hp).oper[1]^.reg := taicpu(start).oper[1]^.reg;
-            end;
-        end
-      else
-        getLastInstruction(hp,hp);
-      allocRegBetween(asmL,newreg(R_INTREGISTER,reg1,R_SUBWHOLE),start,lastreg1,
-        ptaiprop(start.optinfo)^.usedregs);
-      allocRegBetween(asmL,newreg(R_INTREGISTER,reg2,R_SUBWHOLE),start,lastreg2,
-        ptaiprop(start.optinfo)^.usedregs);
-    end;
-end;
-
-
-procedure doRenaming(asml: TAsmList; first, last: tai);
-var
-  p: tai;
-begin
-  p := First;
-  SkipHead(p);
-  while p <> last do
-    begin
-      case p.typ of
-        ait_instruction:
-          begin
-            case taicpu(p).opcode of
-              A_MOV:
-                begin
-                  if not(pTaiprop(p.optinfo)^.canBeRemoved) and
-                     (taicpu(p).oper[0]^.typ = top_reg) and
-                     (taicpu(p).oper[1]^.typ = top_reg) and
-                     (taicpu(p).opsize = S_L) and
-                     (getsupreg(taicpu(p).oper[0]^.reg) in ([RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI,RS_EDI])) and
-                     (getsupreg(taicpu(p).oper[1]^.reg) in ([RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI,RS_EDI])) then
-                    if switchRegs(asml,getsupreg(taicpu(p).oper[0]^.reg),
-                         getsupreg(taicpu(p).oper[1]^.reg),p) then
-                      begin
-                        pTaiprop(p.optinfo)^.canBeRemoved := true;
-                      end;
-                end;
-            end;
-          end;
-      end;
-      getNextInstruction(p,p);
-    end;
-end;
-
-
-End.

+ 0 - 287
compiler/ia64/aasmcpu.pas

@@ -1,287 +0,0 @@
-{
-    Copyright (c) 2000-2006 by Florian Klaempfl
-
-    Contains the assembler object for the ia64
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit aasmcpu;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses
-  globals,verbose,
-  aasmbase,aasmtai,
-  cpubase,
-  cgutils;
-
-
-type
-  pairegalloc = ^tairegalloc;
-  tairegalloc = class(tai)
-     allocation : boolean;
-     reg        : tregister;
-     constructor alloc(r : tregister);
-     constructor dealloc(r : tregister);
-  end;
-
-  { Types of operand }
-  toptype=(top_none,top_reg,top_ref,top_const,top_symbol,top_qp);
-
-  paicpu = ^taicpu;
-  taicpu = class(tai)
-     is_jmp    : boolean; { is this instruction a jump? (needed for optimizer) }
-     opcode    : tasmop;
-     ops       : array[0..4] of longint;
-     oper      : longint;
-     qp        : tqp;
-     ldsttype  : tldsttype;
-     hint      : thint;
-     { ALU instructions }
-     { A1,A9: integer ALU }
-     constructor op_reg_reg_reg(op : tasmop;const r1,r2,r3 : tregister);
-     { A2,A10: shift left and add }
-     constructor op_reg_reg_const_reg(_qp : tqp;op : tasmop;
-       const r1,r2 : tregister;i : byte;const r3 : tregister);
-     { A3,A4,A5: integer ALU - imm.,register }
-     constructor op_reg_const_reg(_qp : tqp;op : tasmop;
-       const r1 : tregister;i : longint;const r3 : tregister);
-     { A6,A7: integer compare - register,register }
-     constructor op_preg_preg_reg_reg(_qp : tqp;op : tasmop;
-       cond : tasmcond;p1,p2 : tqp;const r2,r3 : tregister);
-     { A8: integer compare - imm.,register }
-     constructor op_preg_preg_const_reg(_qp : tqp;op : tasmop;
-       cond : tasmcond;p1,p2 : tqp;i : longint;const r3 : tregister);
-(*!!!!!!!
-     { multimedia shift and multiply }
-     constructor op_reg_reg_reg_const(_qp : tqp;
-     { multimedia mux }
-     constructor op_reg_reg_mbtype(_qp : tqp;
-     { multimedia shift fixed }
-     constructor op_reg_reg_const(_qp : tqp;
-     { div. }
-     constructor op_reg_reg(_qp : tqp;
-     { mm extract }
-     constructor op_reg_reg_const_const(_qp : tqp;
-     { zero and deposit imm }
-     constructor op_reg_const_const_const(_qp : tqp;
-     { deposit imm }
-     constructor op_reg_const_reg_const_const(_qp : tqp;
-     { deposit }
-     constructor op_reg_reg_reg_const_const(_qp : tqp;
-     { test bit }
-     { !!!! here we need also to take care of the postfix }
-     constructor op_preg_preg_reg_const(_qp : tqp;
-     { test NaT }
-     { !!!! here we need also to take care of the postfix }
-     constructor op_preg_preg_reg(_qp : tqp;
-
-     { -------- here are some missed ----------- }
- *)
-
-     { M1: integer load }
-     { M4: integer store }
-     { M6: floating-point load }
-     { M9: floating-point store }
-     constructor op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1 : tregister;ref : treference);
-
-     { M2: integer load incremented by register }
-     { M7: floating-point load incremented by register }
-     constructor op_reg_ref_reg(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1 : tregister;const ref : treference;
-       const r2 : tregister);
-
-     { M3: integer load increment by imm. }
-     { M5: integer store increment by imm. }
-     { M8: floating-point load increment by imm. }
-     { M10: floating-point store increment by imm. }
-     constructor op_reg_ref_const(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1 : tregister;ref : treference;i : longint);
-
-     { M11: floating-point load pair}
-     constructor op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1,r2 : tregister;ref : treference);
-
-     { M12: floating-point load pair increment by imm. }
-     constructor op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1,r2 : tregister;ref : treference;i : longint);
-
-     { X1: break/nop }
-     constructor op_const62(_qp : tqp;op : tasmop;i : int64);
-     { X2: move imm64 }
-     constructor op_reg_const64(_qp : tqp;op : tasmop;const r1 : tregister;
-       i : int64);
-  end;
-
-  { the following objects are special for the ia64 }
-  { they decribe a stop and the bundles            }
-  paistop = ^taistop;
-  taistop = class(tai)
-    constructor init;
-  end;
-
-  { a second underscro indicates a stop }
-  tbundletemplate = (but_none,but_mii,but_mii_,
-    but_mi_i,but_mi_i_,but_mlx,but_mlx_,
-    but_mmi,but_mmi_,but_m_mi,but_m_mi_,
-    but_mfi,but_mfi_,but_mmf,but_mmf_,
-    but_mif,but_mib_,but_mbb,but_mbb_,
-    but_bbb,but_bbb_,but_mmb,but_mmb_,
-    but_mfb,but_mfb_);
-
-  paibundle = ^taibundle;
-  taibundle = class(tai)
-     template : tbundletemplate;
-     instructions : array[0..1] of paicpu;
-  end;
-
-implementation
-
-
-{*****************************************************************************
-                                 TaiStop
-*****************************************************************************}
-
-    constructor taistop.init;
-
-      begin
-         inherited create;
-         typ:=ait_stop;
-      end;
-
-
-{*****************************************************************************
-                                 TaiRegAlloc
-*****************************************************************************}
-
-    constructor tairegalloc.alloc(r : tregister);
-      begin
-        inherited create;
-        typ:=ait_regalloc;
-        allocation:=true;
-        reg:=r;
-      end;
-
-
-    constructor tairegalloc.dealloc(r : tregister);
-      begin
-        inherited create;
-        typ:=ait_regalloc;
-        allocation:=false;
-        reg:=r;
-      end;
-
-
-{*****************************************************************************
-                                 Taicpu
-*****************************************************************************}
-
-    { ALU instructions }
-    { A1,A9: integer ALU }
-    constructor taicpu.op_reg_reg_reg(op : tasmop;const r1,r2,r3 : tregister);
-
-      begin
-      end;
-
-    { A2,A10: shift left and add }
-    constructor taicpu.op_reg_reg_const_reg(_qp : tqp;op : tasmop;
-      const r1,r2 : tregister;i : byte;const r3 : tregister);
-
-      begin
-      end;
-
-    { A3,A4,A5: integer ALU - imm.,register }
-    constructor taicpu.op_reg_const_reg(_qp : tqp;op : tasmop;
-      const r1 : tregister;i : longint;const r3 : tregister);
-
-      begin
-      end;
-
-    { A6,A7: integer compare - register,register }
-    constructor taicpu.op_preg_preg_reg_reg(_qp : tqp;op : tasmop;
-      cond : tasmcond;p1,p2 : tqp;const r2,r3 : tregister);
-
-      begin
-      end;
-
-    { A8: integer compare - imm.,register }
-    constructor taicpu.op_preg_preg_const_reg(_qp : tqp;op : tasmop;
-      cond : tasmcond;p1,p2 : tqp;i : longint;const r3 : tregister);
-
-      begin
-      end;
-
-    { M1: integer load }
-    { M4: integer store }
-    { M6: floating-point load }
-    { M9: floating-point store }
-    constructor taicpu.op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1 : tregister;ref : treference);
-
-      begin
-      end;
-
-    { M2: integer load incremented by register }
-    { M7: floating-point load incremented by register }
-    constructor taicpu.op_reg_ref_reg(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1 : tregister;const ref : treference;
-      const r2 : tregister);
-
-      begin
-      end;
-
-    { M3: integer load increment by imm. }
-    { M5: integer store increment by imm. }
-    { M8: floating-point load increment by imm. }
-    { M10: floating-point store increment by imm. }
-    constructor taicpu.op_reg_ref_const(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1 : tregister;ref : treference;i : longint);
-
-      begin
-      end;
-
-    { M11: floating-point load pair}
-    constructor taicpu.op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1,r2 : tregister;ref : treference);
-
-      begin
-      end;
-
-    { M12: floating-point load pair increment by imm. }
-    constructor taicpu.op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1,r2 : tregister;ref : treference;i : longint);
-
-      begin
-      end;
-
-    { X1: break/nop }
-    constructor taicpu.op_const62(_qp : tqp;op : tasmop;i : int64);
-    { X2: move imm64 }
-
-      begin
-      end;
-
-    constructor taicpu.op_reg_const64(_qp : tqp;op : tasmop;const r1 : tregister;
-      i : int64);
-
-      begin
-      end;
-
-end.

+ 0 - 150
compiler/ia64/cpubase.pas

@@ -1,150 +0,0 @@
-{
-    Copyright (C) 2000-2006 by Florian Klaempfl
-
-    this unit implements the base types for the iA-64 architecture
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit cpubase;
-
-  interface
-
-    uses
-       cutils,
-       globals,
-       systems,
-       cpuinfo,
-       cgbase;
-
-type
-  tasmop = (A_ADD,A_SUB,A_ADDP4,A_AND,A_ANDCM,A_OR,A_XOR,A_SHLADD,
-            A_SHLADDP4,A_ADDS,A_ADDL,A_CMP,A_CMP4,A_PADD1,A_PADD2,
-            A_PADD4,A_PSUB1,A_PSUB2,A_PSUB4,A_PAVG1,A_PAVG2,A_PAVGSUB1,
-            A_PAVGSUB2,A_PCMP1,A_PCMP2,A_PCMP4,A_PSHLADD2,A_PSHRADD2,
-            A_PMPY2,A_MIX1,A_MIX2,A_MIX4,A_PACK2,A_PACK4,A_UNPACK2,
-            A_UNPACK4,A_PMIN1,A_PMAX1,A_PMIN2,A_PMAX2,A_PSAD1,A_MUX1,
-            A_MUX2,A_PSHR2,A_PSHR4,A_SHR,A_PSHL2,A_SHL4,A_SHL,
-            A_POPCNT,A_SHRP,A_EXTR,A_DEP,A_TBIT,A_TNAT,A_BREAK,
-            A_NOP,A_CHK,A_MOV,A_ZX1,A_ZX2,A_ZXT4,A_SXT1,A_SXT2,A_SXT4,
-            A_CXZ1,A_CZX2,A_LD1,A_LD2,A_LD4,A_LD8,A_ST1,A_ST2,A_ST4,
-            A_ST8,A_LDFS,A_LDFD,A_LDF8,A_LDFE,A_LDF,A_STFS,A_STFD,A_STF8,
-            A_STFE,A_STF,A_LDFPS,A_LDFPD,A_LDFP8,A_LFETCH,A_CMPXCHG1,
-            A_CMPXCHG2,A_CMPXHG4,A_CMPXCHG8,A_XCHG1,A_XCHG2,A_XCHG4,
-            A_XCHG8,A_FETCHADD4,A_FETCHADD8,A_SETF,A_GETF,
-            A_INVALA,A_MF,A_SRLZ,A_SYNC,A_FLUSHRS,A_FC,A_ALLOC,A_SUM,
-            A_RUM,A_BR,A_CLRRRB,A_FMA,A_FPMA,A_FMS,A_FPMS,A_FNMA,A_FPNMA,
-            A_XMA,A_FSELECT,A_FCLASS,A_FRCPA,A_FPRCPA,A_FRSQRTA,
-            A_FPRSQRTA,A_FMIN,A_FMAX,A_FAMIN,A_FAMAX,A_FPMIN,A_FPMAX,
-            A_FPAMIN,A_FPAMAX,A_FPCMP,A_FMERGE,A_FMIX,A_FSXT,A_FPACK,
-            A_FSWAP,A_FAND,A_FANDCM,A_FOR,A_FXOR,A_FPMERGE,A_FCVT,
-            A_FPCVT,A_FSETC,A_FCLRT,A_FCHKF,A_MOVL);
-
-Const
-  firstop = low(tasmop);
-  lastop  = high(tasmop);
-
-type
-  TAsmCond = (C_NONE,C_LT,C_LTU,C_EQ,C_LT_UNC,C_LTU_UNC,C_EQ_UNC,
-              C_EQ_AND,C_EQ_OR,C_EQ_OR_ANDCM,C_NE_AND,C_NE_OR);
-
-  THint = (H_NONE,H_NT1,H_NT2,H_NTA);
-  TLdStType = (LST_NONE,LST_S,LST_A,LSR_SA,LST_BIAS,LST_ACQ,LST_C_CLR,
-               LST_FILL,LST_C_NC,LST_C_CLR_ACQ,LST_REL,
-               LST_SPILL);
-
-{*****************************************************************************
-                                   Flags
-*****************************************************************************}
-
-    type
-      TResFlags = (F_NONE,F_LT,F_LTU,F_EQ,F_LT_UNC,F_LTU_UNC,F_EQ_UNC,
-              F_EQ_AND,F_EQ_OR,F_EQ_OR_ANDCM,F_NE_AND,F_NE_OR);
-
-Type
- TRegister = (R_NO,  { R_NO is Mandatory, signifies no register }
-              R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,
-              R_10,R_11,R_12,R_13,R_14,R_15,R_16,R_17,R_18,R_19,
-              R_20,R_21,R_22,R_23,R_24,R_25,R_26,R_27,R_28,R_29,
-              R_30,R_31,
-              R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,
-              R_F10,R_F11,R_F12,R_F13,R_F14,R_F15,R_F16,R_F17,R_F18,R_F19,
-              R_F20,R_F21,R_F22,R_F23,R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,
-              R_F30,R_F31);
-
-  TRegisterset = Set of TRegister;
-
-  { -1 indicates no qualifying prediction }
-  tqp = -1..63;
-
-const
-  qp_none : tqp = -1;
-
-{ Constants describing the registers }
-
-Const
-  intregs = [R_0..R_31];
-  fpuregs = [R_F0..R_F31];
-  mmregs = [];
-
-  maxvarregs = 128;
-  maxfpuvarregs = 128;
-
-  max_operands = 4;
-
-{*****************************************************************************
-                          Default generic sizes
-*****************************************************************************}
-
-      { Defines the default address size for a processor, }
-      OS_ADDR = OS_64;
-      { the natural int size for a processor,
-        has to match osuinttype/ossinttype as initialized in psystem }
-      OS_INT = OS_64;
-      OS_SINT = OS_S64;
-      { the maximum float size for a processor,           }
-      OS_FLOAT = OS_F80;
-      { the size of a vector register for a processor     }
-      OS_VECTOR = OS_M128;
-      
-{*****************************************************************************
-                       GCC /ABI linking information
-*****************************************************************************}
-
-  {# Registers which must be saved when calling a routine declared as
-     cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
-     saved should be the ones as defined in the target ABI and / or GCC.
-
-     This value can be deduced from CALLED_USED_REGISTERS array in the
-     GCC source.
-  }
-  std_saved_registers = [R_9..R_14,R_F2..R_F9];
-  {# Required parameter alignment when calling a routine declared as
-     stdcall and cdecl. The alignment value should be the one defined
-     by GCC or the target ABI.
-
-     The value of this constant is equal to the constant
-     PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
-  }
-  std_param_align = 8;
-
-{*****************************************************************************
-                   Opcode propeties (needed for optimizer)
-*****************************************************************************}
-
-implementation
-
-end.

+ 0 - 105
compiler/ia64/cpuinfo.pas

@@ -1,105 +0,0 @@
-{
-    Copyright (c) 1998-2006 by Florian Klaempfl
-
-    Basic Processor information
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-Unit cpuinfo;
-
-{$i fpcdefs.inc}
-
-Interface
-
-uses
-  globtype;
-
-Type
-   bestreal = extended;
-{$if FPC_FULLVERSION>20700}
-   bestrealrec = TExtended80Rec;
-{$endif FPC_FULLVERSION>20700}
-   ts32real = single;
-   ts64real = double;
-   ts80real = extended;
-   ts128real = type extended;
-   ts64comp = type extended;
-
-   pbestreal=^bestreal;
-
-   { possible supported processors for this target }
-   tcputype =
-      (cpu_none,
-       cpu_itanium
-      );
-
-   tfputype =
-     (fpu_none,
-      fpu_itanium
-     );
-     
-   tcontrollertype =
-     (ct_none
-     );
-
-
-Const
-   { Is there support for dealing with multiple microcontrollers available }
-   { for this platform? }
-   ControllerSupport = false;
-
-   { We know that there are fields after sramsize
-     but we don't care about this warning }
-   {$PUSH}
-    {$WARN 3177 OFF}
-   embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
-   (
-      (controllertypestr:''; controllerunitstr:''; flashbase:0; flashsize:0; srambase:0; sramsize:0));
-   {$POP}
-
-   { calling conventions supported by the code generator }
-   supported_calling_conventions : tproccalloptions = [
-     pocall_internproc,
-     pocall_stdcall,
-     pocall_cdecl,
-     pocall_cppdecl
-   ];
-
-
-   cputypestr : array[tcputype] of string[10] = ('',
-     'ITANIUM'
-   );
-
-   fputypestr : array[tfputype] of string[6] = ('',
-     'ITANIUM'
-   );
-
-   { Supported optimizations, only used for information }
-   supported_optimizerswitches = [cs_opt_peephole,cs_opt_regvar,cs_opt_stackframe,
-								  cs_opt_asmcse,cs_opt_loopunroll,cs_opt_uncertain,
-								  cs_opt_nodecse];
-
-   level1optimizerswitches = [cs_opt_level1,cs_opt_peephole];
-   level2optimizerswitches = level1optimizerswitches + 
-     [cs_opt_level2,cs_opt_regvar,cs_opt_stackframe,cs_opt_asmcse,cs_opt_nodecse];
-   level3optimizerswitches = level2optimizerswitches + [cs_opt_level3{,cs_opt_loopunroll}];
-   level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
-
-Implementation
-
-end.
-

+ 0 - 268
compiler/ia64/ia64reg.dat

@@ -1,268 +0,0 @@
-;
-; iA-64 registers
-; This file is generate with help of fpc/compiler/utils/gia64reg,
-; please try to use this generator before you do error prone and tedious
-; editing by hand
-;
-; layout
-; <name>,<type>,<value>,<stdname>,<gasname>
-;
-NO,$00,$00,INVALID,INVALID
-
-R0,$01,0,r0,r0
-R1,$01,1,r1,r1
-R2,$01,2,r2,r2
-R3,$01,3,r3,r3
-R4,$01,4,r4,r4
-R5,$01,5,r5,r5
-R6,$01,6,r6,r6
-R7,$01,7,r7,r7
-R8,$01,8,r8,r8
-R9,$01,9,r9,r9
-R10,$01,10,r10,r10
-R11,$01,11,r11,r11
-R12,$01,12,r12,r12
-R13,$01,13,r13,r13
-R14,$01,14,r14,r14
-R15,$01,15,r15,r15
-R16,$01,16,r16,r16
-R17,$01,17,r17,r17
-R18,$01,18,r18,r18
-R19,$01,19,r19,r19
-R20,$01,20,r20,r20
-R21,$01,21,r21,r21
-R22,$01,22,r22,r22
-R23,$01,23,r23,r23
-R24,$01,24,r24,r24
-R25,$01,25,r25,r25
-R26,$01,26,r26,r26
-R27,$01,27,r27,r27
-R28,$01,28,r28,r28
-R29,$01,29,r29,r29
-R30,$01,30,r30,r30
-R31,$01,31,r31,r31
-R32,$01,32,r32,r32
-R33,$01,33,r33,r33
-R34,$01,34,r34,r34
-R35,$01,35,r35,r35
-R36,$01,36,r36,r36
-R37,$01,37,r37,r37
-R38,$01,38,r38,r38
-R39,$01,39,r39,r39
-R40,$01,40,r40,r40
-R41,$01,41,r41,r41
-R42,$01,42,r42,r42
-R43,$01,43,r43,r43
-R44,$01,44,r44,r44
-R45,$01,45,r45,r45
-R46,$01,46,r46,r46
-R47,$01,47,r47,r47
-R48,$01,48,r48,r48
-R49,$01,49,r49,r49
-R50,$01,50,r50,r50
-R51,$01,51,r51,r51
-R52,$01,52,r52,r52
-R53,$01,53,r53,r53
-R54,$01,54,r54,r54
-R55,$01,55,r55,r55
-R56,$01,56,r56,r56
-R57,$01,57,r57,r57
-R58,$01,58,r58,r58
-R59,$01,59,r59,r59
-R60,$01,60,r60,r60
-R61,$01,61,r61,r61
-R62,$01,62,r62,r62
-R63,$01,63,r63,r63
-R64,$01,64,r64,r64
-R65,$01,65,r65,r65
-R66,$01,66,r66,r66
-R67,$01,67,r67,r67
-R68,$01,68,r68,r68
-R69,$01,69,r69,r69
-R70,$01,70,r70,r70
-R71,$01,71,r71,r71
-R72,$01,72,r72,r72
-R73,$01,73,r73,r73
-R74,$01,74,r74,r74
-R75,$01,75,r75,r75
-R76,$01,76,r76,r76
-R77,$01,77,r77,r77
-R78,$01,78,r78,r78
-R79,$01,79,r79,r79
-R80,$01,80,r80,r80
-R81,$01,81,r81,r81
-R82,$01,82,r82,r82
-R83,$01,83,r83,r83
-R84,$01,84,r84,r84
-R85,$01,85,r85,r85
-R86,$01,86,r86,r86
-R87,$01,87,r87,r87
-R88,$01,88,r88,r88
-R89,$01,89,r89,r89
-R90,$01,90,r90,r90
-R91,$01,91,r91,r91
-R92,$01,92,r92,r92
-R93,$01,93,r93,r93
-R94,$01,94,r94,r94
-R95,$01,95,r95,r95
-R96,$01,96,r96,r96
-R97,$01,97,r97,r97
-R98,$01,98,r98,r98
-R99,$01,99,r99,r99
-R100,$01,100,r100,r100
-R101,$01,101,r101,r101
-R102,$01,102,r102,r102
-R103,$01,103,r103,r103
-R104,$01,104,r104,r104
-R105,$01,105,r105,r105
-R106,$01,106,r106,r106
-R107,$01,107,r107,r107
-R108,$01,108,r108,r108
-R109,$01,109,r109,r109
-R110,$01,110,r110,r110
-R111,$01,111,r111,r111
-R112,$01,112,r112,r112
-R113,$01,113,r113,r113
-R114,$01,114,r114,r114
-R115,$01,115,r115,r115
-R116,$01,116,r116,r116
-R117,$01,117,r117,r117
-R118,$01,118,r118,r118
-R119,$01,119,r119,r119
-R120,$01,120,r120,r120
-R121,$01,121,r121,r121
-R122,$01,122,r122,r122
-R123,$01,123,r123,r123
-R124,$01,124,r124,r124
-R125,$01,125,r125,r125
-R126,$01,126,r126,r126
-R127,$01,127,r127,r127
-
-F0,$02,0,r0,r0
-F1,$02,1,r1,r1
-F2,$02,2,r2,r2
-F3,$02,3,r3,r3
-F4,$02,4,r4,r4
-F5,$02,5,r5,r5
-F6,$02,6,r6,r6
-F7,$02,7,r7,r7
-F8,$02,8,r8,r8
-F9,$02,9,r9,r9
-F10,$02,10,r10,r10
-F11,$02,11,r11,r11
-F12,$02,12,r12,r12
-F13,$02,13,r13,r13
-F14,$02,14,r14,r14
-F15,$02,15,r15,r15
-F16,$02,16,r16,r16
-F17,$02,17,r17,r17
-F18,$02,18,r18,r18
-F19,$02,19,r19,r19
-F20,$02,20,r20,r20
-F21,$02,21,r21,r21
-F22,$02,22,r22,r22
-F23,$02,23,r23,r23
-F24,$02,24,r24,r24
-F25,$02,25,r25,r25
-F26,$02,26,r26,r26
-F27,$02,27,r27,r27
-F28,$02,28,r28,r28
-F29,$02,29,r29,r29
-F30,$02,30,r30,r30
-F31,$02,31,r31,r31
-F32,$02,32,r32,r32
-F33,$02,33,r33,r33
-F34,$02,34,r34,r34
-F35,$02,35,r35,r35
-F36,$02,36,r36,r36
-F37,$02,37,r37,r37
-F38,$02,38,r38,r38
-F39,$02,39,r39,r39
-F40,$02,40,r40,r40
-F41,$02,41,r41,r41
-F42,$02,42,r42,r42
-F43,$02,43,r43,r43
-F44,$02,44,r44,r44
-F45,$02,45,r45,r45
-F46,$02,46,r46,r46
-F47,$02,47,r47,r47
-F48,$02,48,r48,r48
-F49,$02,49,r49,r49
-F50,$02,50,r50,r50
-F51,$02,51,r51,r51
-F52,$02,52,r52,r52
-F53,$02,53,r53,r53
-F54,$02,54,r54,r54
-F55,$02,55,r55,r55
-F56,$02,56,r56,r56
-F57,$02,57,r57,r57
-F58,$02,58,r58,r58
-F59,$02,59,r59,r59
-F60,$02,60,r60,r60
-F61,$02,61,r61,r61
-F62,$02,62,r62,r62
-F63,$02,63,r63,r63
-F64,$02,64,r64,r64
-F65,$02,65,r65,r65
-F66,$02,66,r66,r66
-F67,$02,67,r67,r67
-F68,$02,68,r68,r68
-F69,$02,69,r69,r69
-F70,$02,70,r70,r70
-F71,$02,71,r71,r71
-F72,$02,72,r72,r72
-F73,$02,73,r73,r73
-F74,$02,74,r74,r74
-F75,$02,75,r75,r75
-F76,$02,76,r76,r76
-F77,$02,77,r77,r77
-F78,$02,78,r78,r78
-F79,$02,79,r79,r79
-F80,$02,80,r80,r80
-F81,$02,81,r81,r81
-F82,$02,82,r82,r82
-F83,$02,83,r83,r83
-F84,$02,84,r84,r84
-F85,$02,85,r85,r85
-F86,$02,86,r86,r86
-F87,$02,87,r87,r87
-F88,$02,88,r88,r88
-F89,$02,89,r89,r89
-F90,$02,90,r90,r90
-F91,$02,91,r91,r91
-F92,$02,92,r92,r92
-F93,$02,93,r93,r93
-F94,$02,94,r94,r94
-F95,$02,95,r95,r95
-F96,$02,96,r96,r96
-F97,$02,97,r97,r97
-F98,$02,98,r98,r98
-F99,$02,99,r99,r99
-F100,$02,100,r100,r100
-F101,$02,101,r101,r101
-F102,$02,102,r102,r102
-F103,$02,103,r103,r103
-F104,$02,104,r104,r104
-F105,$02,105,r105,r105
-F106,$02,106,r106,r106
-F107,$02,107,r107,r107
-F108,$02,108,r108,r108
-F109,$02,109,r109,r109
-F110,$02,110,r110,r110
-F111,$02,111,r111,r111
-F112,$02,112,r112,r112
-F113,$02,113,r113,r113
-F114,$02,114,r114,r114
-F115,$02,115,r115,r115
-F116,$02,116,r116,r116
-F117,$02,117,r117,r117
-F118,$02,118,r118,r118
-F119,$02,119,r119,r119
-F120,$02,120,r120,r120
-F121,$02,121,r121,r121
-F122,$02,122,r122,r122
-F123,$02,123,r123,r123
-F124,$02,124,r124,r124
-F125,$02,125,r125,r125
-F126,$02,126,r126,r126
-F127,$02,127,r127,r127

+ 0 - 216
compiler/ia64/symcpu.pas

@@ -1,216 +0,0 @@
-{
-    Copyright (c) 2014 by Florian Klaempfl
-
-    Symbol table overrides for IA64
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit symcpu;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses
-  symtype,symdef,symsym;
-
-type
-  { defs }
-  tcpufiledef = class(tfiledef)
-  end;
-  tcpufiledefclass = class of tcpufiledef;
-
-  tcpuvariantdef = class(tvariantdef)
-  end;
-  tcpuvariantdefclass = class of tcpuvariantdef;
-
-  tcpuformaldef = class(tformaldef)
-  end;
-  tcpuformaldefclass = class of tcpuformaldef;
-
-  tcpuforwarddef = class(tforwarddef)
-  end;
-  tcpuforwarddefclass = class of tcpuforwarddef;
-
-  tcpuundefineddef = class(tundefineddef)
-  end;
-  tcpuundefineddefclass = class of tcpuundefineddef;
-
-  tcpuerrordef = class(terrordef)
-  end;
-  tcpuerrordefclass = class of tcpuerrordef;
-
-  tcpupointerdef = class(tpointerdef)
-  end;
-  tcpupointerdefclass = class of tcpupointerdef;
-
-  tcpurecorddef = class(trecorddef)
-  end;
-  tcpurecorddefclass = class of tcpurecorddef;
-
-  tcpuimplementedinterface = class(timplementedinterface)
-  end;
-  tcpuimplementedinterfaceclass = class of tcpuimplementedinterface;
-
-  tcpuobjectdef = class(tobjectdef)
-  end;
-  tcpuobjectdefclass = class of tcpuobjectdef;
-
-  tcpuclassrefdef = class(tclassrefdef)
-  end;
-  tcpuclassrefdefclass = class of tcpuclassrefdef;
-
-  tcpuarraydef = class(tarraydef)
-  end;
-  tcpuarraydefclass = class of tcpuarraydef;
-
-  tcpuorddef = class(torddef)
-  end;
-  tcpuorddefclass = class of tcpuorddef;
-
-  tcpufloatdef = class(tfloatdef)
-  end;
-  tcpufloatdefclass = class of tcpufloatdef;
-
-  tcpuprocvardef = class(tprocvardef)
-  end;
-  tcpuprocvardefclass = class of tcpuprocvardef;
-
-  tcpuprocdef = class(tprocdef)
-  end;
-  tcpuprocdefclass = class of tcpuprocdef;
-
-  tcpustringdef = class(tstringdef)
-  end;
-  tcpustringdefclass = class of tcpustringdef;
-
-  tcpuenumdef = class(tenumdef)
-  end;
-  tcpuenumdefclass = class of tcpuenumdef;
-
-  tcpusetdef = class(tsetdef)
-  end;
-  tcpusetdefclass = class of tcpusetdef;
-
-  { syms }
-  tcpulabelsym = class(tlabelsym)
-  end;
-  tcpulabelsymclass = class of tcpulabelsym;
-
-  tcpuunitsym = class(tunitsym)
-  end;
-  tcpuunitsymclass = class of tcpuunitsym;
-
-  tcpuprogramparasym = class(tprogramparasym)
-  end;
-  tcpuprogramparasymclass = class(tprogramparasym);
-
-  tcpunamespacesym = class(tnamespacesym)
-  end;
-  tcpunamespacesymclass = class of tcpunamespacesym;
-
-  tcpuprocsym = class(tprocsym)
-  end;
-  tcpuprocsymclass = class of tcpuprocsym;
-
-  tcputypesym = class(ttypesym)
-  end;
-  tcpuypesymclass = class of tcputypesym;
-
-  tcpufieldvarsym = class(tfieldvarsym)
-  end;
-  tcpufieldvarsymclass = class of tcpufieldvarsym;
-
-  tcpulocalvarsym = class(tlocalvarsym)
-  end;
-  tcpulocalvarsymclass = class of tcpulocalvarsym;
-
-  tcpuparavarsym = class(tparavarsym)
-  end;
-  tcpuparavarsymclass = class of tcpuparavarsym;
-
-  tcpustaticvarsym = class(tstaticvarsym)
-  end;
-  tcpustaticvarsymclass = class of tcpustaticvarsym;
-
-  tcpuabsolutevarsym = class(tabsolutevarsym)
-  end;
-  tcpuabsolutevarsymclass = class of tcpuabsolutevarsym;
-
-  tcpupropertysym = class(tpropertysym)
-  end;
-  tcpupropertysymclass = class of tcpupropertysym;
-
-  tcpuconstsym = class(tconstsym)
-  end;
-  tcpuconstsymclass = class of tcpuconstsym;
-
-  tcpuenumsym = class(tenumsym)
-  end;
-  tcpuenumsymclass = class of tcpuenumsym;
-
-  tcpusyssym = class(tsyssym)
-  end;
-  tcpusyssymclass = class of tcpusyssym;
-
-
-const
-  pbestrealtype : ^tdef = @s64floattype;
-
-
-implementation
-
-begin
-  { used tdef classes }
-  cfiledef:=tcpufiledef;
-  cvariantdef:=tcpuvariantdef;
-  cformaldef:=tcpuformaldef;
-  cforwarddef:=tcpuforwarddef;
-  cundefineddef:=tcpuundefineddef;
-  cerrordef:=tcpuerrordef;
-  cpointerdef:=tcpupointerdef;
-  crecorddef:=tcpurecorddef;
-  cimplementedinterface:=tcpuimplementedinterface;
-  cobjectdef:=tcpuobjectdef;
-  cclassrefdef:=tcpuclassrefdef;
-  carraydef:=tcpuarraydef;
-  corddef:=tcpuorddef;
-  cfloatdef:=tcpufloatdef;
-  cprocvardef:=tcpuprocvardef;
-  cprocdef:=tcpuprocdef;
-  cstringdef:=tcpustringdef;
-  cenumdef:=tcpuenumdef;
-  csetdef:=tcpusetdef;
-
-  { used tsym classes }
-  clabelsym:=tcpulabelsym;
-  cunitsym:=tcpuunitsym;
-  cprogramparasym:=tcpuprogramparasym;
-  cnamespacesym:=tcpunamespacesym;
-  cprocsym:=tcpuprocsym;
-  ctypesym:=tcputypesym;
-  cfieldvarsym:=tcpufieldvarsym;
-  clocalvarsym:=tcpulocalvarsym;
-  cparavarsym:=tcpuparavarsym;
-  cstaticvarsym:=tcpustaticvarsym;
-  cabsolutevarsym:=tcpuabsolutevarsym;
-  cpropertysym:=tcpupropertysym;
-  cconstsym:=tcpuconstsym;
-  cenumsym:=tcpuenumsym;
-  csyssym:=tcpusyssym;
-end.
-

+ 0 - 248
compiler/vis/aasmcpu.pas

@@ -1,248 +0,0 @@
-{
-    Copyright (c) 1998-2001 by Florian Klaempfl and Pierre Muller
-
-    virtual instruction set family assembler instructions
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit aasmcpu;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses
-  cclasses,aasmtai,aasmdata,
-  aasmbase,globals,verbose,
-  cpubase,cpuinfo;
-
-
-type
-
-  taicpu = class(taicpu_abstract)
-     opsize : topsize;
-     constructor op_none(op : tasmop;_size : topsize);
-
-     constructor op_reg(op : tasmop;_size : topsize;_op1 : tregister);
-     constructor op_const(op : tasmop;_size : topsize;_op1 : longint);
-     constructor op_ref(op : tasmop;_size : topsize;_op1 : treference);
-
-     constructor op_reg_reg(op : tasmop;_size : topsize;_op1,_op2 : tregister);
-     constructor op_reg_ref(op : tasmop;_size : topsize;_op1 : tregister;_op2 : treference);
-     constructor op_ref_reg(op : tasmop;_size : topsize;_op1 : treference;_op2 : tregister);
-
-     constructor op_const_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister);
-     constructor op_const_ref(op : tasmop;_size : topsize;_op1 : longint;_op2 : treference);
-
-
-     { this is for Jmp instructions }
-     constructor op_cond_sym(op : tasmop;cond:TAsmCond;_size : topsize;_op1 : tasmsymbol);
-
-     constructor op_sym(op : tasmop;_size : topsize;_op1 : tasmsymbol);
-     { for DBxx opcodes }
-     constructor op_reg_sym(op: tasmop; _size : topsize; _op1: tregister; _op2 :tasmsymbol);
-     constructor op_sym_ofs_reg(op : tasmop;_size : topsize;_op1 : tasmsymbol;_op1ofs:longint;_op2 : tregister);
-
-     constructor op_sym_ofs(op : tasmop;_size : topsize;_op1 : tasmsymbol;_op1ofs:longint);
-     constructor op_sym_ofs_ref(op : tasmop;_size : topsize;_op1 : tasmsymbol;_op1ofs:longint;const _op2 : treference);
-
-  private
-     procedure init(_size : topsize); { this need to be called by all constructor }
-  end;
-
-
-  tai_align = class(tai_align_abstract)
-        { nothing to add }
-  end;
-
-  procedure InitAsm;
-  procedure DoneAsm;
-
-
-implementation
-
-
-{*****************************************************************************
-                                 Taicpu Constructors
-*****************************************************************************}
-
-
-
-
-    procedure taicpu.init(_size : topsize);
-      begin
-         typ:=ait_instruction;
-         is_jmp:=false;
-         opsize:=_size;
-         ops:=0;
-      end;
-
-
-    constructor taicpu.op_none(op : tasmop;_size : topsize);
-      begin
-         inherited create(op);;
-         init(_size);
-      end;
-
-
-    constructor taicpu.op_reg(op : tasmop;_size : topsize;_op1 : tregister);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=1;
-         loadreg(0,_op1);
-      end;
-
-
-    constructor taicpu.op_const(op : tasmop;_size : topsize;_op1 : longint);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=1;
-         loadconst(0,aword(_op1));
-      end;
-
-
-    constructor taicpu.op_ref(op : tasmop;_size : topsize;_op1 : treference);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=1;
-         loadref(0,_op1);
-      end;
-
-
-    constructor taicpu.op_reg_reg(op : tasmop;_size : topsize;_op1,_op2 : tregister);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=2;
-         loadreg(0,_op1);
-         loadreg(1,_op2);
-      end;
-
-
-
-    constructor taicpu.op_reg_ref(op : tasmop;_size : topsize;_op1 : tregister;_op2 : treference);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=2;
-         loadreg(0,_op1);
-         loadref(1,_op2);
-      end;
-
-
-    constructor taicpu.op_const_reg(op : tasmop;_size : topsize;_op1 : longint;_op2 : tregister);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=2;
-         loadconst(0,aword(_op1));
-         loadreg(1,_op2);
-      end;
-
-
-
-    constructor taicpu.op_const_ref(op : tasmop;_size : topsize;_op1 : longint;_op2 : treference);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=2;
-         loadconst(0,aword(_op1));
-         loadref(1,_op2);
-      end;
-
-
-    constructor taicpu.op_ref_reg(op : tasmop;_size : topsize;_op1 : treference;_op2 : tregister);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=2;
-         loadref(0,_op1);
-         loadreg(1,_op2);
-      end;
-
-
-    constructor taicpu.op_sym(op : tasmop;_size : topsize;_op1 : tasmsymbol);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=1;
-         loadsymbol(0,_op1,0);
-      end;
-
-
-     constructor taicpu.op_reg_sym(op: tasmop; _size : topsize; _op1: tregister; _op2 :tasmsymbol);
-      begin
-         inherited create(op);
-         init(_size);
-         ops:=2;
-         loadreg(0,_op1);
-         loadsymbol(1,_op2,0);
-      end;
-
-
-    constructor taicpu.op_sym_ofs_ref(op : tasmop;_size : topsize;_op1 : tasmsymbol;_op1ofs:longint;const _op2 : treference);
-      begin
-         inherited create(op);
-         init(_size);
-         ops:=2;
-         loadsymbol(0,_op1,_op1ofs);
-         loadref(1,_op2);
-      end;
-
-
-    constructor taicpu.op_sym_ofs(op : tasmop;_size : topsize;_op1 : tasmsymbol;_op1ofs:longint);
-      begin
-         inherited create(op);
-         init(_size);
-         ops:=1;
-         loadsymbol(0,_op1,_op1ofs);
-      end;
-
-    constructor taicpu.op_sym_ofs_reg(op : tasmop;_size : topsize;_op1 : tasmsymbol;_op1ofs:longint;_op2 : tregister);
-      begin
-         inherited create(op);;
-         init(_size);
-         ops:=2;
-         loadreg(0,_op2);
-         loadsymbol(1,_op1,_op1ofs);
-      end;
-
-
-    constructor taicpu.op_cond_sym(op : tasmop;cond:TAsmCond;_size : topsize;_op1 : tasmsymbol);
-      begin
-         inherited create(op);
-         init(_size);
-         condition:=cond;
-         ops:=1;
-         loadsymbol(0,_op1,0);
-      end;
-
-
-
-    procedure InitAsm;
-      begin
-      end;
-
-
-    procedure DoneAsm;
-      begin
-      end;
-
-end.

+ 0 - 609
compiler/vis/cpubase.pas

@@ -1,609 +0,0 @@
-{
-    Copyright (c) 1998-2002 by the Free Pascal dev. team
-
-    Contains the base types for the virtual instruction set
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{ This Unit contains the base types for the Virtual Instruction machine
-}
-unit cpubase;
-
-{$i fpcdefs.inc}
-
-interface
-
-uses
-  strings,cutils,cclasses,aasmbase,cpuinfo,cginfo;
-
-
-{*****************************************************************************
-                                Assembler Opcodes
-*****************************************************************************}
-
-    type
-      TAsmOp=(a_none,a_beqs,a_bges,a_bgts,a_bles,a_blts,a_bnes,
-              a_bras,a_rets,a_bccs,a_bcss,a_bvcs,a_bvss,a_bbss,
-              a_bass,a_bats,a_bbts,a_beql,a_bgel,a_bgtl,a_blel,
-              a_bltl,a_bnel,a_bral,a_bsrl,a_bbsl,a_basl,a_batl,
-              a_bbtl,a_add,a_addc,a_and,a_asr,a_lsl,a_lsr,a_cmp,
-              a_sub,a_subb,a_divs,a_divu,a_mod,a_move,a_muls,a_mulu,
-              a_neg,a_not,a_or,a_xor,a_fadd,a_fcmp,a_fdiv,a_fmove,
-              a_fmul,a_fneg,a_fsub,a_fldd,a_flds,a_lbzx,a_lbsx,a_llsx,
-              a_llzx,a_lwsx,a_lwzx,a_fstd,a_fsts,a_stb,a_stl,a_stw,
-              a_syscall,a_nop,a_lims,a_orhi,a_lilo,a_call,a_popl,
-              a_pushl,
-       { these are simplified mnemonics }
-              a_lea,a_limm,a_bxx
-              );
-
-      {# This should define the array of instructions as string }
-      op2strtable=array[tasmop] of string[8];
-
-    Const
-      {# First value of opcode enumeration }
-      firstop = low(tasmop);
-      {# Last value of opcode enumeration  }
-      lastop  = high(tasmop);
-
-{*****************************************************************************
-                                  Registers
-*****************************************************************************}
-
-    type
-      toldregister = (R_NO,R_R0,R_R1,R_R2,R_R3,
-                   R_R4,R_R5,R_R6,R_R7,
-                   R_R8,R_R9,R_R10,R_R11,
-                   R_CCR,R_SP,R_FP,R_PC,
-                   R_FP0,R_FP1,R_FP2,R_FP3,
-                   R_FP4,R_FP5,R_FP6,R_FP7,
-                   R_FP8,R_FP9,R_FP10,R_FP11,
-                   R_FP12,R_FP13,R_FP14,R_FP15,
-                   R_INTREGISTER,R_FPUREGISTER
-      );
-
-      {# Set type definition for registers }
-      tregisterset = set of Toldregister;
-      Tnewregister=word;
-
-      tregister=record
-        enum:toldregister;
-        number:Tnewregister;
-      end;
-
-      { A type to store register locations for 64 Bit values. }
-      tregister64 = packed record
-        reglo,reghi : tregister;
-      end;
-
-      Tsuperregister=byte;
-      Tsubregister=byte;
-
-      Tsupregset=set of Tsuperregister;
-
-      { alias for compact code }
-      treg64 = tregister64;
-
-      {# Type definition for the array of string of register nnames }
-      treg2strtable = array[toldregister] of string[5];
-
-    Const
-
-    {Special registers:}
-      NR_NO = $0000;  {Invalid register}
-
-    {Normal registers:}
-
-    {General purpose registers:}
-      NR_R0 = $0100; NR_R1 = $0200; NR_R2 = $0300;
-      NR_R3 = $0400; NR_R4 = $0500; NR_R5 = $0600;
-      NR_R6 = $0700; NR_R7 = $0800; NR_R8 = $0900;
-      NR_R9 = $0A00; NR_R10 = $0B00; NR_R11 = $0C00;
-      NR_SP = $0D00; NR_FP = $0E00;
-
-    {Super registers:}
-      RS_R0 = $01; RS_R1 = $02; RS_R2 = $03;
-      RS_R3 = $04; RS_R4 = $05; RS_R5 = $06;
-      RS_R6 = $07; RS_R7 = $08; RS_R8 = $09;
-      RS_R9 = $0A; RS_R10 = $0B; RS_R11 = $0C;
-      RS_SP = $0D; RS_FP = $0E;
-
-    {Subregisters:}
-      R_SUBL = $00;
-      R_SUBW = $01;
-      R_SUBD = $02;
-
-      {# First register in the tregister enumeration }
-      firstreg = low(toldregister);
-      {# Last register in the tregister enumeration }
-      lastreg  = high(toldregister);
-
-      first_supreg = $01;
-      last_supreg = $0c;
-
-
-      std_reg2str : treg2strtable = ('',
-        'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9','r10','r11','ccr',
-        'sp','fp','pc','fp0','fp1','fp2','fp3','fp4','fp5','fp6','fp7',
-        'fp8','fp9','fp10','fp11','fp12','fp13','fp14','fp15','',''
-      );
-
-
-{*****************************************************************************
-                                Conditions
-*****************************************************************************}
-
-    type
-      TAsmCond=(C_None,
-         C_EQ,                  { equal }
-         C_NE,                  { not equal }
-         C_GE,                  { greater or equal (signed) }
-         C_GT,                  { greater than (signed)     }
-         C_LE,                  { less or equal (signed)    }
-         C_LT,                  { less than (signed)        }
-         C_LS,                  { lower or same (unordered) }
-         C_AS,                  { above or same (unordered) }
-         C_AT,                  { above than (unordered)    }
-         C_BT,                  { below than (unordered)    }
-         C_CC,                  { carry clear               }
-         C_CS                   { carry set                 }
-      );
-
-
-    const
-      cond2str:array[TAsmCond] of string[3]=('',
-        'eq','ne','ge','gt','le','lt','ls','as',
-        'at','bt','cc','cs');
-
-
-{*****************************************************************************
-                                   Flags
-*****************************************************************************}
-
-    type
-      TResFlags = (
-          F_E,            { zero flag = equal      }
-          F_NE,           { !zero_flag = not equal }
-          F_G,            { greater (signed)       }
-          F_L,            { less (signed)          }
-          F_GE,
-          F_LE,
-          F_C,            { carry flag             }
-          F_NC,           { !carry flag            }
-          F_A,            { greater (unsigned)     }
-          F_AE,
-          F_B,            { less (unsigned)        }
-          F_BE
-         );
-
-{*****************************************************************************
-                                Reference
-*****************************************************************************}
-
-    type
-      trefoptions=(ref_none,ref_parafixup,ref_localfixup,ref_selffixup);
-
-      { reference record }
-      preference = ^treference;
-      treference = packed record
-         base,
-         index       : tregister;
-         offset      : longint;
-         symbol      : tasmsymbol;
-         offsetfixup : longint;
-         options     : trefoptions;
-         alignment   : byte;
-      end;
-
-      { reference record }
-      pparareference = ^tparareference;
-      tparareference = packed record
-         index       : tregister;
-         offset      : aword;
-      end;
-
-
-{*****************************************************************************
-                                Operand
-*****************************************************************************}
-
-    type
-      toptype=(top_none,top_reg,top_ref,top_const,top_symbol,top_bool);
-
-      toper=record
-        ot  : longint;
-        case typ : toptype of
-         top_none   : ();
-         top_reg    : (reg:tregister);
-         top_ref    : (ref:^treference);
-         top_const  : (val:aword);
-         top_symbol : (sym:tasmsymbol;symofs:longint);
-         top_bool  :  (b: boolean);
-      end;
-
-{*****************************************************************************
-                                Operand Sizes
-*****************************************************************************}
-       { S_NO = No Size of operand   }
-       { S_B  = 8-bit size operand   }
-       { S_W  = 16-bit size operand  }
-       { S_L  = 32-bit size operand  }
-       { Floating point types        }
-       { S_FS  = single type (32 bit) }
-       { S_FD  = double/64bit integer }
-       { S_FX  = Extended type      }
-       topsize = (S_NO,S_B,S_W,S_L,S_FS,S_FD,S_FX,S_IQ);
-
-
-{*****************************************************************************
-                               Generic Location
-*****************************************************************************}
-
-    type
-      TLoc=(
-        { added for tracking problems}
-        LOC_INVALID,
-        { ordinal constant }
-        LOC_CONSTANT,
-        { in a processor register }
-        LOC_REGISTER,
-        { Constant register which shouldn't be modified }
-        LOC_CREGISTER,
-        { FPU register}
-        LOC_FPUREGISTER,
-        { Constant FPU register which shouldn't be modified }
-        LOC_CFPUREGISTER,
-        { multimedia register }
-        LOC_MMREGISTER,
-        { Constant multimedia reg which shouldn't be modified }
-        LOC_CMMREGISTER,
-        { in memory }
-        LOC_REFERENCE,
-        { in memory (constant) }
-        LOC_CREFERENCE,
-        { boolean results only, jump to false or true label }
-        LOC_JUMP,
-        { boolean results only, flags are set }
-        LOC_FLAGS
-      );
-
-      { tparamlocation describes where a parameter for a procedure is stored.
-        References are given from the caller's point of view. The usual
-        TLocation isn't used, because contains a lot of unnessary fields.
-      }
-      tparalocation = packed record
-         size : TCGSize;
-         { The location type where the parameter is passed, usually
-           LOC_REFERENCE,LOC_REGISTER or LOC_FPUREGISTER
-         }
-         loc  : TLoc;
-         { The stack pointer must be decreased by this value before
-           the parameter is copied to the given destination.
-           This allows to "encode" pushes with tparalocation.
-           On the PowerPC, this field is unsed but it is there
-           because several generic code accesses it.
-         }
-         sp_fixup : longint;
-         case TLoc of
-            LOC_REFERENCE : (reference : tparareference);
-            LOC_FPUREGISTER, LOC_CFPUREGISTER, LOC_MMREGISTER, LOC_CMMREGISTER,
-              LOC_REGISTER,LOC_CREGISTER : (
-              case longint of
-                1 : (register,register64.reghi : tregister);
-                { overlay a register64.reglo }
-                2 : (register64.reglo : tregister);
-                { overlay a 64 Bit register type }
-                3 : (reg64 : tregister64);
-                4 : (register64 : tregister64);
-            );
-      end;
-
-      treglocation = packed record
-        case longint of
-          1 : (register,register64.reghi : tregister);
-          { overlay a register64.reglo }
-          2 : (register64.reglo : tregister);
-          { overlay a 64 Bit register type }
-          3 : (reg64 : tregister64);
-          4 : (register64 : tregister64);
-       end;
-
-
-      tlocation = packed record
-         size : TCGSize;
-         loc : tloc;
-         case tloc of
-            LOC_CREFERENCE,LOC_REFERENCE : (reference : treference);
-            LOC_CONSTANT : (
-              case longint of
-                1 : (value : AWord);
-                { can't do this, this layout depends on the host cpu. Use }
-                { lo(valueqword)/hi(valueqword) instead (JM)              }
-                { 2 : (valuelow, valuehigh:AWord);                        }
-                { overlay a complete 64 Bit value }
-                3 : (valueqword : qword);
-              );
-            LOC_FPUREGISTER, LOC_CFPUREGISTER, LOC_MMREGISTER, LOC_CMMREGISTER,
-              LOC_REGISTER,LOC_CREGISTER : (
-                case longint of
-                  1 : (register64.reglo,register64.reghi : tregister);
-                  2 : (register : tregister);
-                  { overlay a 64 Bit register type }
-                  3 : (reg64 : tregister64);
-                  4 : (register64 : tregister64);
-                );
-            LOC_FLAGS : (resflags : tresflags);
-      end;
-
-{*****************************************************************************
-                                 Constants
-*****************************************************************************}
-
-    const
-      max_operands = 2;
-
-      lvaluelocations = [LOC_REFERENCE, LOC_CREGISTER, LOC_CFPUREGISTER,
-                         LOC_CMMREGISTER];
-
-      {# Constant defining possibly all registers which might require saving }
-      ALL_REGISTERS = [R_FP0..R_FP15];
-
-      general_registers = [R_R0..R_R11];
-
-      {# low and high of the available maximum width integer general purpose }
-      { registers                                                            }
-      LoGPReg = R_R0;
-      HiGPReg = R_R11;
-
-      {# low and high of every possible width general purpose register (same as }
-      { above on most architctures apart from the 80x86)                        }
-      LoReg = R_R0;
-      HiReg = R_R11;
-
-      maxintregs = 12;
-      maxfpuregs = 16;
-      maxaddrregs = 0;
-
-      maxvarregs = 10;
-      varregs : Array [1..maxvarregs] of toldregister =
-                (R_R2,R_R3,R_R4,R_R5,R_R6,R_R7,R_R8,R_R9,R_R10,R_R11);
-
-      maxfpuvarregs = 15;
-      fpuvarregs : Array [1..maxfpuvarregs] of toldregister =
-                (R_FP1,R_FP2,R_FP3,
-                 R_FP4,R_FP5,R_FP6,
-                 R_FP7,R_FP8,R_FP9,
-                 R_FP10,R_FP11,R_FP12,
-                 R_FP13,R_FP14,R_FP15);
-
-
-      max_param_regs_int = 0;
-
-      max_param_regs_fpu = 0;
-
-      max_param_regs_mm = 0;
-
-      {# Registers which are defined as scratch and no need to save across
-         routine calls or in assembler blocks.
-      }
-      max_scratch_regs = 2;
-      scratch_regs: Array[1..max_scratch_regs] of Tsuperregister = (RS_R0,RS_R1);
-
-{*****************************************************************************
-                          Default generic sizes
-*****************************************************************************}
-
-      {# Defines the default address size for a processor, }
-      OS_ADDR = OS_32;
-      {# the natural int size for a processor,
-         has to match osuinttype/ossinttype as initialized in psystem }
-      OS_INT = OS_32;
-      {# the maximum float size for a processor,           }
-      OS_FLOAT = OS_F64;
-      {# the size of a vector register for a processor     }
-      OS_VECTOR = OS_NO;
-
-{*****************************************************************************
-                               GDB Information
-*****************************************************************************}
-
-      {# Register indexes for stabs information, when some
-         parameters or variables are stored in registers.
-
-         Currently unsupported by abstract machine
-      }
-
-          stab_regindex : array[toldregister] of shortint =
-          (-1,
-           { r0..r11 }
-           -1,-1,-1,-1,-1,-1,
-           -1,-1,-1,-1,-1,-1,
-           { sp,fp,ccr,pc }
-           -1,-1,-1,-1,
-           { FP0..FP7 }
-           -1,-1,-1,-1,-1,-1,-1,-1,
-           { FP8..FP15 }
-           -1,-1,-1,-1,-1,-1,-1,-1,
-           { invalid }
-           -1,-1
-        );
-
-
-{*****************************************************************************
-                          Generic Register names
-*****************************************************************************}
-
-      {# Stack pointer register }
-      stack_pointer_reg = R_SP;
-      NR_STACK_POINTER_REG = NR_SP;
-      RS_STACK_POINTER_REG = RS_SP;
-      {# Frame pointer register }
-      frame_pointer_reg = R_FP;
-      NR_FRAME_POINTER_REG = NR_FP;
-      RS_FRAME_POINTER_REG = RS_FP;
-      {# Self pointer register : contains the instance address of an
-         object or class. }
-      self_pointer_reg  = R_R11;
-      NR_SELF_POINTER_REG = NR_R11;
-      RS_SELF_POINTER_REG = RS_R11;
-      {# Register for addressing absolute data in a position independant way,
-         such as in PIC code. The exact meaning is ABI specific.
-      }
-      pic_offset_reg = R_R10;
-      {# Results are returned in this register (32-bit values) }
-      accumulator   = R_R0;
-      NR_ACCUMULATOR = NR_R0;
-      RS_ACCUMULATOR = RS_R0;
-  {the return_result_reg, is used inside the called function to store its return
-  value when that is a scalar value otherwise a pointer to the address of the
-  result is placed inside it}
-    return_result_reg       =   accumulator;
-
-  {the function_result_reg contains the function result after a call to a scalar
-  function othewise it contains a pointer to the returned result}
-    function_result_reg =   accumulator;
-      {# Hi-Results are returned in this register (64-bit value high register) }
-      accumulatorhigh = R_R1;
-      NR_ACCUMULATORHIGH = NR_R1;
-      RS_ACCUMULATORHIGH = RS_R1;
-      fpu_result_reg = R_FP0;
-      mmresultreg = R_NO;
-
-{*****************************************************************************
-                       GCC /ABI linking information
-*****************************************************************************}
-
-      {# Registers which must be saved when calling a routine declared as
-         cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
-         saved should be the ones as defined in the target ABI and / or GCC.
-
-         This value can be deduced from CALLED_USED_REGISTERS array in the
-         GCC source.
-      }
-      std_saved_registers = [RS_R0,RS_R1,RS_R10,RS_R11];
-      {# Required parameter alignment when calling a routine declared as
-         stdcall and cdecl. The alignment value should be the one defined
-         by GCC or the target ABI.
-
-         The value of this constant is equal to the constant
-         PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
-      }
-      std_param_align = 4;  { for 32-bit version only }
-
-
-{*****************************************************************************
-                                  Helpers
-*****************************************************************************}
-
-    function  is_calljmp(o:tasmop):boolean;
-
-    procedure inverse_flags(var r : TResFlags);
-    function  flags_to_cond(const f: TResFlags) : TAsmCond;
-    procedure convert_register_to_enum(var r:Tregister);
-    function cgsize2subreg(s:Tcgsize):Tsubregister;
-
-
-implementation
-
-    uses
-      verbose;
-
-{*****************************************************************************
-                                  Helpers
-*****************************************************************************}
-
-    function is_calljmp(o:tasmop):boolean;
-      begin
-        is_calljmp := false;
-        if o in [a_bxx,a_call,a_beqs..a_bbtl] then
-           is_calljmp := true;
-      end;
-
-    procedure inverse_flags(var r: TResFlags);
-      const flagsinvers : array[F_E..F_BE] of tresflags =
-            (F_NE,F_E,
-             F_LE,F_GE,
-             F_L,F_G,
-             F_NC,F_C,
-             F_BE,F_B,
-             F_AE,F_A);
-      begin
-         r:=flagsinvers[r];
-      end;
-
-
-
-    function flags_to_cond(const f: TResFlags) : TAsmCond;
-        const flags2cond : array[tresflags] of tasmcond =
-        (
-         {F_E}  C_EQ,
-         {F_NE} C_NE,
-         {F_G } C_GT,
-         {F_L } C_LT,
-         {F_GE} C_GE,
-         {F_LE} C_LE,
-         {F_C}  C_CS,
-         {F_NC} C_CC,
-         {F_A}  C_AT,
-         {F_AE} C_AS,
-         {F_B}  C_BT,
-         {F_BE} C_LS);
-      begin
-        flags_to_cond := flags2cond[f];
-      end;
-
-
-    procedure convert_register_to_enum(var r:Tregister);
-
-    begin
-      if r.enum = R_INTREGISTER then
-        case r.number of
-          NR_NO: r.enum:= R_NO;
-          NR_R0: r.enum:= R_R0;
-          NR_R1: r.enum:= R_R1;
-          NR_R2: r.enum:= R_R2;
-          NR_R3: r.enum:= R_R3;
-          NR_R4: r.enum:= R_R4;
-          NR_R5: r.enum:= R_R5;
-          NR_R6: r.enum:= R_R6;
-          NR_R7: r.enum:= R_R7;
-          NR_R8: r.enum:= R_R8;
-          NR_R9: r.enum:= R_R9;
-          NR_R10: r.enum:= R_R10;
-          NR_R11: r.enum:= R_R11;
-        else
-          internalerror(200301082);
-        end;
-    end;
-
-    function cgsize2subreg(s:Tcgsize):Tsubregister;
-
-    begin
-      case s of
-        OS_8,OS_S8:
-          cgsize2subreg:=R_SUBL;
-        OS_16,OS_S16:
-          cgsize2subreg:=R_SUBW;
-        OS_32,OS_S32:
-          cgsize2subreg:=R_SUBD;
-        else
-          internalerror(200301231);
-      end;
-    end;
-
-
-end.

+ 0 - 79
compiler/vis/cpuinfo.pas

@@ -1,79 +0,0 @@
-{
-    Copyright (c) 1998-2002 by the Free Pascal development team
-
-    Basic Processor information for the virtual instruction set
-
-    See the file COPYING.FPC, included in this distribution,
-    for details about the copyright.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-
- **********************************************************************}
-
-Unit CPUInfo;
-
-Interface
-
-uses
-   globtype;
-
-Type
-   { Architecture word - Native unsigned type }
-   AWord  = Longword;
-   PAWord = ^AWord;
-
-   { this must be an ordinal type with the same size as a pointer }
-   { to allow some dirty type casts for example when using        }
-   { tconstsym.value                                              }
-   { Note: must be unsigned!! Otherwise, ugly code like           }
-   { pointer(-1) will result in a pointer with the value          }
-   { $fffffffffffffff on a 32bit machine if the compiler uses     }
-   { int64 constants internally (JM)                              }
-   TConstPtrUInt = Longword;
-
-   bestreal = double;
-{$if FPC_FULLVERSION>20700}
-   bestrealrec = TDoubleRec;
-{$endif FPC_FULLVERSION>20700}
-   ts32real = single;
-   ts64real = double;
-   ts80real = extended;
-   ts64comp = comp;
-
-   pbestreal=^bestreal;
-
-   { possible supported processors for this target }
-   tcputype = (cpu_none);
-
-   tcontrollertype =
-     (ct_none
-     );
-
-
-Const
-   { Is there support for dealing with multiple microcontrollers available }
-   { for this platform? }
-   ControllerSupport = false;
-   {# Size of native extended floating point type }
-   extended_size = 8;
-   {# Size of a pointer                           }
-   sizeof(aint)  = 4;
-   {# Size of a multimedia register               }
-   mmreg_size = 8;
-   { target cpu string (used by compiler options) }
-   target_cpu_string = 'vis';
-
-   { We know that there are fields after sramsize
-     but we don't care about this warning }
-   {$PUSH}
-    {$WARN 3177 OFF}
-   embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
-   (
-      (controllertypestr:''; controllerunitstr:''; flashbase:0; flashsize:0; srambase:0; sramsize:0));
-   {$POP}
-
-Implementation
-
-end.

+ 0 - 49
compiler/vis/cpunode.pas

@@ -1,49 +0,0 @@
-{
-    Copyright (c) 2000-2002 by Florian Klaempfl
-
-    Includes the Virtual instrution set code generator
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-unit cpunode;
-
-{$i fpcdefs.inc}
-
-  interface
-
-  implementation
-
-    uses
-       { generic nodes }
-       ncgbas,ncgld,ncgflw,ncgcnv,ncgmem,ncgcon,ncgcal,ncgset,ncginl,
-       { to be able to only parts of the generic code,
-         the processor specific nodes must be included
-         after the generic one (FK)
-       }
-//       nvisadd,
-//       nviscal,
-//       nviscon,
-//       nvisflw,
-//       nvismem,
-//       nvisinl,
-//       nvismat,
-//       nviscnv,
-       { symtable }
-       symcpu
-       ;
-
-end.

+ 0 - 69
compiler/vis/cpupara.pas

@@ -1,69 +0,0 @@
-{
-    Copyright (c) 2002 by Florian Klaempfl
-
-    Generates the argument location information for the
-    virtual instruction set machine
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-{ Generates the argument location information for 680x0.
-}
-unit cpupara;
-
-{$i fpcdefs.inc}
-
-  interface
-
-    uses
-       cpubase,
-       symdef,paramgr;
-
-    type
-       { Returns the location for the nr-st 32 Bit int parameter
-         if every parameter before is an 32 Bit int parameter as well
-         and if the calling conventions for the helper routines of the
-         rtl are used.
-       }
-       tcpuparamanager = class(tparamanager)
-          procedure create_param_loc_info(p : tabstractprocdef);override;
-          function getselflocation(p : tabstractprocdef) : tparalocation;override;
-       end;
-
-  implementation
-
-    uses
-       verbose,
-       globals,
-       globtype,
-       systems,
-       cpuinfo,cginfo,cgbase,
-       defutil;
-
-    procedure tcpuparamanager.create_param_loc_info(p : tabstractprocdef);
-      var
-        param_offset : integer;
-        hp : tparaitem;
-      begin
-      end;
-
-    function tcpuparamanager.getselflocation(p : tabstractprocdef) : tparalocation;
-      begin
-      end;
-
-begin
-   paramanager:=tcpuparamanager.create;
-end.