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softfpu: make it possible to optionally inline some of the simple functions. also made it possible to replace the MUL32TO64 function with compiler generated code. If the new defines are enabled, they results in 15-30% speedup on m68k (68020+) softfpu code

git-svn-id: trunk@36352 -
Károly Balogh 8 年之前
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a57d0d51b4
共有 1 个文件被更改,包括 16 次插入5 次删除
  1. 16 5
      rtl/inc/softfpu.pp

+ 16 - 5
rtl/inc/softfpu.pp

@@ -1098,7 +1098,7 @@ are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
 *}
 *}
 Procedure
 Procedure
  add64(
  add64(
-     a0:bits32; a1:bits32; b0:bits32; b1:bits32; VAR z0Ptr:bits32; VAR z1Ptr:bits32 );
+     a0:bits32; a1:bits32; b0:bits32; b1:bits32; VAR z0Ptr:bits32; VAR z1Ptr:bits32 );{$IFDEF SOFTFPU_INLINE}inline;{$ENDIF}
 Var
 Var
     z1: bits32;
     z1: bits32;
 Begin
 Begin
@@ -1179,7 +1179,7 @@ end;
 | are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
 | are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
 *----------------------------------------------------------------------------*}
 *----------------------------------------------------------------------------*}
 
 
-procedure add128( a0, a1, b0, b1 : bits64; var z0Ptr, z1Ptr : bits64);inline;
+procedure add128( a0, a1, b0, b1 : bits64; var z0Ptr, z1Ptr : bits64);{$IFDEF SOFTFPU_INLINE}inline;{$ENDIF}
 var
 var
     z1 : bits64;
     z1 : bits64;
 begin
 begin
@@ -1225,7 +1225,7 @@ Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the
 *}
 *}
 Procedure
 Procedure
  sub64(
  sub64(
-     a0: bits32; a1 : bits32; b0 :bits32; b1: bits32; VAR z0Ptr:bits32; VAR z1Ptr: bits32 );
+     a0: bits32; a1 : bits32; b0 :bits32; b1: bits32; VAR z0Ptr:bits32; VAR z1Ptr: bits32 );{$IFDEF SOFTFPU_INLINE}inline;{$ENDIF}
 Begin
 Begin
     z1Ptr := a1 - b1;
     z1Ptr := a1 - b1;
     z0Ptr := a0 - b0 - bits32( a1 < b1 );
     z0Ptr := a0 - b0 - bits32( a1 < b1 );
@@ -1317,6 +1317,16 @@ into two 32-bit pieces which are stored at the locations pointed to by
 `z0Ptr' and `z1Ptr'.
 `z0Ptr' and `z1Ptr'.
 -------------------------------------------------------------------------------
 -------------------------------------------------------------------------------
 *}
 *}
+{$IFDEF SOFTFPU_COMPILER_MUL32TO64}
+Procedure mul32To64( a:bits32; b:bits32; VAR z0Ptr: bits32; VAR z1Ptr :bits32 );{$IFDEF SOFTFPU_INLINE}inline;{$ENDIF}
+var
+  tmp: qword;
+begin
+  tmp:=qword(a) * b;
+  z0ptr:=hi(tmp);
+  z1ptr:=lo(tmp);
+end;
+{$ELSE}
 Procedure mul32To64( a:bits32; b:bits32; VAR z0Ptr: bits32; VAR z1Ptr
 Procedure mul32To64( a:bits32; b:bits32; VAR z0Ptr: bits32; VAR z1Ptr
 :bits32 );
 :bits32 );
 Var
 Var
@@ -1339,6 +1349,7 @@ Begin
     z1Ptr := z1;
     z1Ptr := z1;
     z0Ptr := z0;
     z0Ptr := z0;
 End;
 End;
+{$ENDIF}
 
 
 {*
 {*
 -------------------------------------------------------------------------------
 -------------------------------------------------------------------------------
@@ -1681,7 +1692,7 @@ than or equal to the 64-bit value formed by concatenating `b0' and `b1'.
 Otherwise, returns 0.
 Otherwise, returns 0.
 -------------------------------------------------------------------------------
 -------------------------------------------------------------------------------
 *}
 *}
-Function le64( a0: bits32; a1:bits32 ;b0:bits32; b1:bits32 ): flag;
+Function le64( a0: bits32; a1:bits32 ;b0:bits32; b1:bits32 ): flag;{$IFDEF SOFTFPU_INLINE}inline;{$ENDIF}
 Begin
 Begin
 
 
     le64:= flag( a0 < b0 ) or flag( ( a0 = b0 ) and ( a1 <= b1 ) );
     le64:= flag( a0 < b0 ) or flag( ( a0 = b0 ) and ( a1 <= b1 ) );
@@ -1695,7 +1706,7 @@ than the 64-bit value formed by concatenating `b0' and `b1'.  Otherwise,
 returns 0.
 returns 0.
 -------------------------------------------------------------------------------
 -------------------------------------------------------------------------------
 *}
 *}
-Function lt64( a0: bits32; a1:bits32 ;b0:bits32; b1:bits32 ): flag;
+Function lt64( a0: bits32; a1:bits32 ;b0:bits32; b1:bits32 ): flag;{$IFDEF SOFTFPU_INLINE}inline;{$ENDIF}
 Begin
 Begin
     lt64 := flag( a0 < b0 ) or flag( ( a0 = b0 ) and ( a1 < b1 ) );
     lt64 := flag( a0 < b0 ) or flag( ( a0 = b0 ) and ( a1 < b1 ) );
 End;
 End;