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@@ -3515,278 +3515,262 @@ unit aoptx86;
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end;
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end;
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- { Ensure nothing in between p and hp1 would make optimisations
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- invalid, such as the source register being modified }
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- if (
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- (taicpu(p).oper[0]^.typ = top_reg) and
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- not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)
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- ) or
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- (
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- (taicpu(p).oper[0]^.typ = top_ref) and
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- (taicpu(p).oper[0]^.ref^.refaddr <> addr_full) and
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- { Make sure we check separately whether p_TargetReg is used as part of the reference when required }
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- not RefModifiedBetween(taicpu(p).oper[0]^.ref^, topsize2memsize[taicpu(p).opsize] shr 3, p, hp1)
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- ) or
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- (taicpu(p).oper[0]^.typ = top_const) then
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+ if taicpu(p).oper[0]^.typ = top_reg then
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begin
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+ p_SourceReg := taicpu(p).oper[0]^.reg;
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- if taicpu(p).oper[0]^.typ = top_reg then
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+ { Look for:
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+ mov %reg1,%reg2
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+ ??? %reg2,r/m
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+ Change to:
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+ mov %reg1,%reg2
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+ ??? %reg1,r/m
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+ }
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+ if RegReadByInstruction(p_TargetReg, hp1) and
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+ not RegModifiedBetween(p_SourceReg, p, hp1) and
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+ DeepMOVOpt(taicpu(p), taicpu(hp1)) then
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begin
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- p_SourceReg := taicpu(p).oper[0]^.reg;
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-
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- { Look for:
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- mov %reg1,%reg2
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- ??? %reg2,r/m
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- Change to:
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- mov %reg1,%reg2
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- ??? %reg1,r/m
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- }
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- if RegReadByInstruction(p_TargetReg, hp1) and
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- not RegModifiedBetween(p_SourceReg, p, hp1) and
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- DeepMOVOpt(taicpu(p), taicpu(hp1)) then
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- begin
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- { A change has occurred, just not in p }
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- Include(OptsToCheck, aoc_ForceNewIteration);
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+ { A change has occurred, just not in p }
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+ Include(OptsToCheck, aoc_ForceNewIteration);
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- TransferUsedRegs(TmpUsedRegs);
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- UpdateUsedRegsBetween(TmpUsedRegs, tai(p.Next), hp1);
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+ TransferUsedRegs(TmpUsedRegs);
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+ UpdateUsedRegsBetween(TmpUsedRegs, tai(p.Next), hp1);
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- if not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) and
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- { Just in case something didn't get modified (e.g. an
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- implicit register) }
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- not RegReadByInstruction(p_TargetReg, hp1) then
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- begin
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- { We can remove the original MOV }
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- DebugMsg(SPeepholeOptimization + 'Mov2Nop 3 done',p);
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- RemoveCurrentP(p);
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+ if not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) and
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+ { Just in case something didn't get modified (e.g. an
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+ implicit register) }
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+ not RegReadByInstruction(p_TargetReg, hp1) then
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+ begin
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+ { We can remove the original MOV }
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+ DebugMsg(SPeepholeOptimization + 'Mov2Nop 3 done',p);
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+ RemoveCurrentP(p);
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- { UsedRegs got updated by RemoveCurrentp }
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- Result := True;
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- Exit;
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- end;
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+ { UsedRegs got updated by RemoveCurrentp }
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+ Result := True;
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+ Exit;
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+ end;
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- { If we know a MOV instruction has become a null operation, we might as well
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- get rid of it now to save time. }
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- if (taicpu(hp1).opcode = A_MOV) and
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- (taicpu(hp1).oper[1]^.typ = top_reg) and
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- SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, taicpu(p).oper[0]^.reg) and
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- { Just being a register is enough to confirm it's a null operation }
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- (taicpu(hp1).oper[0]^.typ = top_reg) then
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- begin
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+ { If we know a MOV instruction has become a null operation, we might as well
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+ get rid of it now to save time. }
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+ if (taicpu(hp1).opcode = A_MOV) and
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+ (taicpu(hp1).oper[1]^.typ = top_reg) and
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+ SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, taicpu(p).oper[0]^.reg) and
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+ { Just being a register is enough to confirm it's a null operation }
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+ (taicpu(hp1).oper[0]^.typ = top_reg) then
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+ begin
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- Result := True;
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+ Result := True;
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- { Speed-up to reduce a pipeline stall... if we had something like...
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+ { Speed-up to reduce a pipeline stall... if we had something like...
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- movl %eax,%edx
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- movw %dx,%ax
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+ movl %eax,%edx
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+ movw %dx,%ax
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- ... the second instruction would change to movw %ax,%ax, but
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- given that it is now %ax that's active rather than %eax,
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- penalties might occur due to a partial register write, so instead,
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- change it to a MOVZX instruction when optimising for speed.
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- }
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- if not (cs_opt_size in current_settings.optimizerswitches) and
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- IsMOVZXAcceptable and
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- (taicpu(hp1).opsize < taicpu(p).opsize)
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+ ... the second instruction would change to movw %ax,%ax, but
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+ given that it is now %ax that's active rather than %eax,
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+ penalties might occur due to a partial register write, so instead,
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+ change it to a MOVZX instruction when optimising for speed.
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+ }
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+ if not (cs_opt_size in current_settings.optimizerswitches) and
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+ IsMOVZXAcceptable and
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+ (taicpu(hp1).opsize < taicpu(p).opsize)
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{$ifdef x86_64}
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- { operations already implicitly set the upper 64 bits to zero }
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- and not ((taicpu(hp1).opsize = S_L) and (taicpu(p).opsize = S_Q))
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+ { operations already implicitly set the upper 64 bits to zero }
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+ and not ((taicpu(hp1).opsize = S_L) and (taicpu(p).opsize = S_Q))
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{$endif x86_64}
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- then
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- begin
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- DebugMsg(SPeepholeOptimization + 'Zero-extension to minimise pipeline stall (Mov2Movz)',hp1);
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- case taicpu(p).opsize of
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+ then
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+ begin
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+ DebugMsg(SPeepholeOptimization + 'Zero-extension to minimise pipeline stall (Mov2Movz)',hp1);
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+ case taicpu(p).opsize of
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+ S_W:
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+ if taicpu(hp1).opsize = S_B then
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+ taicpu(hp1).opsize := S_BL
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+ else
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+ InternalError(2020012911);
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+ S_L{$ifdef x86_64}, S_Q{$endif x86_64}:
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+ case taicpu(hp1).opsize of
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+ S_B:
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+ taicpu(hp1).opsize := S_BL;
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S_W:
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- if taicpu(hp1).opsize = S_B then
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- taicpu(hp1).opsize := S_BL
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- else
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- InternalError(2020012911);
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- S_L{$ifdef x86_64}, S_Q{$endif x86_64}:
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- case taicpu(hp1).opsize of
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- S_B:
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- taicpu(hp1).opsize := S_BL;
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- S_W:
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- taicpu(hp1).opsize := S_WL;
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- else
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- InternalError(2020012912);
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- end;
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+ taicpu(hp1).opsize := S_WL;
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else
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- InternalError(2020012910);
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+ InternalError(2020012912);
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end;
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+ else
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+ InternalError(2020012910);
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+ end;
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- taicpu(hp1).opcode := A_MOVZX;
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- setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
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- end
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- else
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- begin
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- GetNextInstruction_p := GetNextInstruction(hp1, hp2);
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- DebugMsg(SPeepholeOptimization + 'Mov2Nop 4 done',hp1);
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- RemoveInstruction(hp1);
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+ taicpu(hp1).opcode := A_MOVZX;
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+ setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
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+ end
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+ else
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+ begin
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+ GetNextInstruction_p := GetNextInstruction(hp1, hp2);
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+ DebugMsg(SPeepholeOptimization + 'Mov2Nop 4 done',hp1);
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+ RemoveInstruction(hp1);
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- { The instruction after what was hp1 is now the immediate next instruction,
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- so we can continue to make optimisations if it's present }
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- if not GetNextInstruction_p or (hp2.typ <> ait_instruction) then
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- Exit;
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+ { The instruction after what was hp1 is now the immediate next instruction,
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+ so we can continue to make optimisations if it's present }
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+ if not GetNextInstruction_p or (hp2.typ <> ait_instruction) then
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+ Exit;
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- hp1 := hp2;
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- end;
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+ hp1 := hp2;
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end;
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end;
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- end
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- else if taicpu(p).oper[0]^.typ = top_const then
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+ end;
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+ end
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+ else if taicpu(p).oper[0]^.typ = top_const then
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+ begin
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+
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+ if (taicpu(hp1).opcode = A_OR) and
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+ (taicpu(p).oper[1]^.typ = top_reg) and
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+ MatchOperand(taicpu(p).oper[0]^, 0) and
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+ MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^.reg) then
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begin
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+ { mov 0, %reg
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+ or ###,%reg
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+ Change to (only if the flags are not used):
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+ mov ###,%reg
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+ }
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+ TransferUsedRegs(TmpUsedRegs);
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+ UpdateUsedRegsBetween(TmpUsedRegs, tai(p.Next), hp1);
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+ DoOptimisation := True;
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- if (taicpu(hp1).opcode = A_OR) and
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- (taicpu(p).oper[1]^.typ = top_reg) and
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- MatchOperand(taicpu(p).oper[0]^, 0) and
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- MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^.reg) then
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+ { Even if the flags are used, we might be able to do the optimisation
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+ if the conditions are predictable }
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+ if RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) then
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begin
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- { mov 0, %reg
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- or ###,%reg
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- Change to (only if the flags are not used):
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- mov ###,%reg
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- }
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- TransferUsedRegs(TmpUsedRegs);
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- UpdateUsedRegsBetween(TmpUsedRegs, tai(p.Next), hp1);
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- DoOptimisation := True;
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-
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- { Even if the flags are used, we might be able to do the optimisation
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- if the conditions are predictable }
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- if RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) then
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+ { Only perform if ### = %reg (the same register) or equal to 0,
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+ so %reg is guaranteed to still have a value of zero }
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+ if MatchOperand(taicpu(hp1).oper[0]^, 0) or
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+ MatchOperand(taicpu(hp1).oper[0]^, taicpu(hp1).oper[1]^.reg) then
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begin
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- { Only perform if ### = %reg (the same register) or equal to 0,
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- so %reg is guaranteed to still have a value of zero }
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- if MatchOperand(taicpu(hp1).oper[0]^, 0) or
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- MatchOperand(taicpu(hp1).oper[0]^, taicpu(hp1).oper[1]^.reg) then
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+ hp2 := hp1;
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+ UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
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+ while RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) and
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+ GetNextInstruction(hp2, hp3) do
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begin
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- hp2 := hp1;
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- UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
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- while RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) and
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- GetNextInstruction(hp2, hp3) do
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+ { Don't continue modifying if the flags state is getting changed }
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+ if RegModifiedByInstruction(NR_DEFAULTFLAGS, hp3) then
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+ Break;
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+
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+ UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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+ if MatchInstruction(hp3, A_Jcc, A_SETcc, A_CMOVcc, []) then
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begin
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- { Don't continue modifying if the flags state is getting changed }
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- if RegModifiedByInstruction(NR_DEFAULTFLAGS, hp3) then
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- Break;
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- UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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- if MatchInstruction(hp3, A_Jcc, A_SETcc, A_CMOVcc, []) then
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+ if condition_in(C_E, taicpu(hp3).condition) or (taicpu(hp3).condition in [C_NC, C_NS, C_NO]) then
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begin
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-
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- if condition_in(C_E, taicpu(hp3).condition) or (taicpu(hp3).condition in [C_NC, C_NS, C_NO]) then
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- begin
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- { Condition is always true }
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- case taicpu(hp3).opcode of
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- A_Jcc:
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- begin
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- { Check for jump shortcuts before we destroy the condition }
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- hp4 := hp3;
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- DoJumpOptimizations(hp3, TempBool);
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- { Make sure hp3 hasn't changed }
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- if (hp4 = hp3) then
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- begin
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- DebugMsg(SPeepholeOptimization + 'Condition is always true (jump made unconditional)', hp3);
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- MakeUnconditional(taicpu(hp3));
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- end;
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- Result := True;
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- end;
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- A_CMOVcc:
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- begin
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- DebugMsg(SPeepholeOptimization + 'Condition is always true (CMOVcc -> MOV)', hp3);
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- taicpu(hp3).opcode := A_MOV;
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- taicpu(hp3).condition := C_None;
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- Result := True;
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- end;
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- A_SETcc:
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+ { Condition is always true }
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+ case taicpu(hp3).opcode of
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+ A_Jcc:
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+ begin
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+ { Check for jump shortcuts before we destroy the condition }
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+ hp4 := hp3;
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+ DoJumpOptimizations(hp3, TempBool);
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+ { Make sure hp3 hasn't changed }
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+ if (hp4 = hp3) then
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begin
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- DebugMsg(SPeepholeOptimization + 'Condition is always true (changed to MOV 1)', hp3);
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- { Convert "set(c) %reg" instruction to "movb 1,%reg" }
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- taicpu(hp3).opcode := A_MOV;
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- taicpu(hp3).ops := 2;
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- taicpu(hp3).condition := C_None;
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- taicpu(hp3).opsize := S_B;
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- taicpu(hp3).loadreg(1,taicpu(hp3).oper[0]^.reg);
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- taicpu(hp3).loadconst(0, 1);
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- Result := True;
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+ DebugMsg(SPeepholeOptimization + 'Condition is always true (jump made unconditional)', hp3);
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+ MakeUnconditional(taicpu(hp3));
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end;
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- else
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- InternalError(2021090701);
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+ Result := True;
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end;
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- end
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- else if (taicpu(hp3).condition in [C_A, C_B, C_C, C_G, C_L, C_NE, C_NZ, C_O, C_S]) then
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- begin
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- { Condition is always false }
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- case taicpu(hp3).opcode of
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- A_Jcc:
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- begin
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- DebugMsg(SPeepholeOptimization + 'Condition is always false (jump removed)', hp3);
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- TAsmLabel(taicpu(hp3).oper[0]^.ref^.symbol).decrefs;
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- RemoveInstruction(hp3);
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- Result := True;
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- { Since hp3 was deleted, hp2 must not be updated }
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- Continue;
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- end;
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- A_CMOVcc:
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- begin
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- DebugMsg(SPeepholeOptimization + 'Condition is always false (conditional load removed)', hp3);
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- RemoveInstruction(hp3);
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- Result := True;
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- { Since hp3 was deleted, hp2 must not be updated }
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- Continue;
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- end;
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- A_SETcc:
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- begin
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- DebugMsg(SPeepholeOptimization + 'Condition is always false (changed to MOV 0)', hp3);
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- { Convert "set(c) %reg" instruction to "movb 0,%reg" }
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- taicpu(hp3).opcode := A_MOV;
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- taicpu(hp3).ops := 2;
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- taicpu(hp3).condition := C_None;
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- taicpu(hp3).opsize := S_B;
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- taicpu(hp3).loadreg(1,taicpu(hp3).oper[0]^.reg);
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- taicpu(hp3).loadconst(0, 0);
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- Result := True;
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- end;
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- else
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- InternalError(2021090702);
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|
|
+ A_CMOVcc:
|
|
|
+ begin
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Condition is always true (CMOVcc -> MOV)', hp3);
|
|
|
+ taicpu(hp3).opcode := A_MOV;
|
|
|
+ taicpu(hp3).condition := C_None;
|
|
|
+ Result := True;
|
|
|
end;
|
|
|
- end
|
|
|
- else
|
|
|
- { Uncertain what to do - don't optimise (although optimise other conditional statements if present) }
|
|
|
- DoOptimisation := False;
|
|
|
- end;
|
|
|
-
|
|
|
- hp2 := hp3;
|
|
|
- end;
|
|
|
-
|
|
|
- if DoOptimisation then
|
|
|
- begin
|
|
|
- UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
- if RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) then
|
|
|
- { Flags are still in use - don't optimise }
|
|
|
+ A_SETcc:
|
|
|
+ begin
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Condition is always true (changed to MOV 1)', hp3);
|
|
|
+ { Convert "set(c) %reg" instruction to "movb 1,%reg" }
|
|
|
+ taicpu(hp3).opcode := A_MOV;
|
|
|
+ taicpu(hp3).ops := 2;
|
|
|
+ taicpu(hp3).condition := C_None;
|
|
|
+ taicpu(hp3).opsize := S_B;
|
|
|
+ taicpu(hp3).loadreg(1,taicpu(hp3).oper[0]^.reg);
|
|
|
+ taicpu(hp3).loadconst(0, 1);
|
|
|
+ Result := True;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ InternalError(2021090701);
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else if (taicpu(hp3).condition in [C_A, C_B, C_C, C_G, C_L, C_NE, C_NZ, C_O, C_S]) then
|
|
|
+ begin
|
|
|
+ { Condition is always false }
|
|
|
+ case taicpu(hp3).opcode of
|
|
|
+ A_Jcc:
|
|
|
+ begin
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Condition is always false (jump removed)', hp3);
|
|
|
+ TAsmLabel(taicpu(hp3).oper[0]^.ref^.symbol).decrefs;
|
|
|
+ RemoveInstruction(hp3);
|
|
|
+ Result := True;
|
|
|
+ { Since hp3 was deleted, hp2 must not be updated }
|
|
|
+ Continue;
|
|
|
+ end;
|
|
|
+ A_CMOVcc:
|
|
|
+ begin
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Condition is always false (conditional load removed)', hp3);
|
|
|
+ RemoveInstruction(hp3);
|
|
|
+ Result := True;
|
|
|
+ { Since hp3 was deleted, hp2 must not be updated }
|
|
|
+ Continue;
|
|
|
+ end;
|
|
|
+ A_SETcc:
|
|
|
+ begin
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Condition is always false (changed to MOV 0)', hp3);
|
|
|
+ { Convert "set(c) %reg" instruction to "movb 0,%reg" }
|
|
|
+ taicpu(hp3).opcode := A_MOV;
|
|
|
+ taicpu(hp3).ops := 2;
|
|
|
+ taicpu(hp3).condition := C_None;
|
|
|
+ taicpu(hp3).opsize := S_B;
|
|
|
+ taicpu(hp3).loadreg(1,taicpu(hp3).oper[0]^.reg);
|
|
|
+ taicpu(hp3).loadconst(0, 0);
|
|
|
+ Result := True;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ InternalError(2021090702);
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ { Uncertain what to do - don't optimise (although optimise other conditional statements if present) }
|
|
|
DoOptimisation := False;
|
|
|
end;
|
|
|
- end
|
|
|
- else
|
|
|
- DoOptimisation := False;
|
|
|
- end;
|
|
|
|
|
|
- if DoOptimisation then
|
|
|
- begin
|
|
|
+ hp2 := hp3;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if DoOptimisation then
|
|
|
+ begin
|
|
|
+ UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
+ if RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) then
|
|
|
+ { Flags are still in use - don't optimise }
|
|
|
+ DoOptimisation := False;
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ DoOptimisation := False;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if DoOptimisation then
|
|
|
+ begin
|
|
|
{$ifdef x86_64}
|
|
|
- { OR only supports 32-bit sign-extended constants for 64-bit
|
|
|
- instructions, so compensate for this if the constant is
|
|
|
- encoded as a value greater than or equal to 2^31 }
|
|
|
- if (taicpu(hp1).opsize = S_Q) and
|
|
|
- (taicpu(hp1).oper[0]^.typ = top_const) and
|
|
|
- (taicpu(hp1).oper[0]^.val >= $80000000) then
|
|
|
- taicpu(hp1).oper[0]^.val := taicpu(hp1).oper[0]^.val or $FFFFFFFF00000000;
|
|
|
+ { OR only supports 32-bit sign-extended constants for 64-bit
|
|
|
+ instructions, so compensate for this if the constant is
|
|
|
+ encoded as a value greater than or equal to 2^31 }
|
|
|
+ if (taicpu(hp1).opsize = S_Q) and
|
|
|
+ (taicpu(hp1).oper[0]^.typ = top_const) and
|
|
|
+ (taicpu(hp1).oper[0]^.val >= $80000000) then
|
|
|
+ taicpu(hp1).oper[0]^.val := taicpu(hp1).oper[0]^.val or $FFFFFFFF00000000;
|
|
|
{$endif x86_64}
|
|
|
- DebugMsg(SPeepholeOptimization + 'MOV 0 / OR -> MOV', p);
|
|
|
- taicpu(hp1).opcode := A_MOV;
|
|
|
- RemoveCurrentP(p);
|
|
|
- Result := True;
|
|
|
- Exit;
|
|
|
- end;
|
|
|
+ DebugMsg(SPeepholeOptimization + 'MOV 0 / OR -> MOV', p);
|
|
|
+ taicpu(hp1).opcode := A_MOV;
|
|
|
+ RemoveCurrentP(p);
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
end;
|
|
|
end;
|
|
|
end;
|
|
|
@@ -3799,8 +3783,7 @@ unit aoptx86;
|
|
|
|
|
|
In this case, we can remove the MOV (Go to "Mov2Nop 5" below)
|
|
|
}
|
|
|
- if (taicpu(p).oper[1]^.typ = top_reg) and
|
|
|
- MatchInstruction(hp1, [A_LEA, A_MOV, A_MOVSX, A_MOVZX{$ifdef x86_64}, A_MOVSXD{$endif x86_64}], []) and
|
|
|
+ if MatchInstruction(hp1, [A_LEA, A_MOV, A_MOVSX, A_MOVZX{$ifdef x86_64}, A_MOVSXD{$endif x86_64}], []) and
|
|
|
(taicpu(hp1).oper[1]^.typ = top_reg) and
|
|
|
Reg1WriteOverwritesReg2Entirely(taicpu(hp1).oper[1]^.reg, taicpu(p).oper[1]^.reg) then
|
|
|
begin
|
|
|
@@ -3909,6 +3892,272 @@ unit aoptx86;
|
|
|
Exit;
|
|
|
end;
|
|
|
end;
|
|
|
+
|
|
|
+ if (taicpu(hp1).opcode = A_MOV) and
|
|
|
+ MatchOperand(taicpu(p).oper[1]^,taicpu(hp1).oper[0]^) then
|
|
|
+ begin
|
|
|
+ { Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
|
|
|
+ TransferUsedRegs(TmpUsedRegs);
|
|
|
+ UpdateUsedRegsBetween(TmpUsedRegs, tai(p.Next), hp1);
|
|
|
+ { we have
|
|
|
+ mov x, %treg
|
|
|
+ mov %treg, y
|
|
|
+ }
|
|
|
+ if not(RegInOp(p_TargetReg, taicpu(hp1).oper[1]^)) then
|
|
|
+ if not(RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs)) then
|
|
|
+ begin
|
|
|
+ { we've got
|
|
|
+
|
|
|
+ mov x, %treg
|
|
|
+ mov %treg, y
|
|
|
+
|
|
|
+ with %treg is not used after }
|
|
|
+ case taicpu(p).oper[0]^.typ Of
|
|
|
+ { top_reg is covered by DeepMOVOpt }
|
|
|
+ top_const:
|
|
|
+ begin
|
|
|
+ { change
|
|
|
+ mov const, %treg
|
|
|
+ mov %treg, y
|
|
|
+
|
|
|
+ to
|
|
|
+
|
|
|
+ mov const, y
|
|
|
+ }
|
|
|
+{$ifdef x86_64}
|
|
|
+ if (taicpu(hp1).oper[1]^.typ=top_reg) or
|
|
|
+ ((taicpu(p).oper[0]^.val>=low(longint)) and (taicpu(p).oper[0]^.val<=high(longint))) then
|
|
|
+{$endif x86_64}
|
|
|
+ begin
|
|
|
+ taicpu(hp1).loadconst(0, taicpu(p).oper[0]^.val);
|
|
|
+ DebugMsg(SPeepholeOptimization + 'MovMov2Mov 5 done', hp1);
|
|
|
+ RemoveCurrentP(p);
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ top_ref:
|
|
|
+ case taicpu(hp1).oper[1]^.typ of
|
|
|
+ top_reg:
|
|
|
+ { change
|
|
|
+ mov mem, %treg
|
|
|
+ mov %treg, %reg
|
|
|
+
|
|
|
+ to
|
|
|
+
|
|
|
+ mov mem, %reg"
|
|
|
+ }
|
|
|
+ if not RegUsedBetween(taicpu(hp1).oper[1]^.reg, p, hp1) then
|
|
|
+ begin
|
|
|
+ taicpu(p).loadreg(1, taicpu(hp1).oper[1]^.reg);
|
|
|
+ DebugMsg(SPeepholeOptimization + 'MovMov2Mov 3a done', p);
|
|
|
+ AllocRegBetween(taicpu(hp1).oper[1]^.reg, p, hp1, UsedRegs);
|
|
|
+ RemoveInstruction(hp1);
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
+ end
|
|
|
+ else if
|
|
|
+ { Make sure that if a reference is used, its
|
|
|
+ registers are not modified in between }
|
|
|
+ not RefModifiedBetween(taicpu(p).oper[0]^.ref^, topsize2memsize[taicpu(p).opsize] shr 3, p, hp1) then
|
|
|
+ begin
|
|
|
+ if (taicpu(p).oper[0]^.ref^.base <> NR_NO){$ifdef x86_64} and (taicpu(p).oper[0]^.ref^.base <> NR_RIP){$endif x86_64} then
|
|
|
+ AllocRegBetween(taicpu(p).oper[0]^.ref^.base, p, hp1, UsedRegs);
|
|
|
+ if (taicpu(p).oper[0]^.ref^.index <> NR_NO) and (taicpu(p).oper[0]^.ref^.index <> taicpu(p).oper[0]^.ref^.base) then
|
|
|
+ AllocRegBetween(taicpu(p).oper[0]^.ref^.index, p, hp1, UsedRegs);
|
|
|
+
|
|
|
+ taicpu(hp1).loadref(0, taicpu(p).oper[0]^.ref^);
|
|
|
+
|
|
|
+ if Assigned(taicpu(p).oper[0]^.ref^.symbol) then
|
|
|
+ taicpu(p).oper[0]^.ref^.symbol.decrefs;
|
|
|
+ if Assigned(taicpu(p).oper[0]^.ref^.relsymbol) then
|
|
|
+ taicpu(p).oper[0]^.ref^.relsymbol.decrefs;
|
|
|
+
|
|
|
+ DebugMsg(SPeepholeOptimization + 'MovMov2Mov 3 done', hp1);
|
|
|
+ RemoveCurrentP(p);
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
+ end;
|
|
|
+ top_ref:
|
|
|
+ if not RegInRef(p_TargetReg, taicpu(p).oper[0]^.ref^) then
|
|
|
+ begin
|
|
|
+{$ifdef x86_64}
|
|
|
+ { Look for the following to simplify:
|
|
|
+
|
|
|
+ mov x(mem1), %reg
|
|
|
+ mov %reg, y(mem2)
|
|
|
+ mov x+8(mem1), %reg
|
|
|
+ mov %reg, y+8(mem2)
|
|
|
+
|
|
|
+ Change to:
|
|
|
+ movdqu x(mem1), %xmmreg
|
|
|
+ movdqu %xmmreg, y(mem2)
|
|
|
+
|
|
|
+ ...but only as long as the memory blocks don't overlap
|
|
|
+ }
|
|
|
+ SourceRef := taicpu(p).oper[0]^.ref^;
|
|
|
+ TargetRef := taicpu(hp1).oper[1]^.ref^;
|
|
|
+ if (taicpu(p).opsize = S_Q) and
|
|
|
+ not RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs) and
|
|
|
+ GetNextInstruction(hp1, hp2) and
|
|
|
+ MatchInstruction(hp2, A_MOV, [taicpu(p).opsize]) and
|
|
|
+ MatchOpType(taicpu(hp2), top_ref, top_reg) then
|
|
|
+ begin
|
|
|
+ { Delay calling GetNextInstruction(hp2, hp3) for as long as possible }
|
|
|
+
|
|
|
+ UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
|
|
|
+
|
|
|
+ Inc(SourceRef.offset, 8);
|
|
|
+
|
|
|
+ if UseAVX then
|
|
|
+ begin
|
|
|
+ MovAligned := A_VMOVDQA;
|
|
|
+ MovUnaligned := A_VMOVDQU;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ MovAligned := A_MOVDQA;
|
|
|
+ MovUnaligned := A_MOVDQU;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if RefsEqual(SourceRef, taicpu(hp2).oper[0]^.ref^) and
|
|
|
+ not RefsMightOverlap(taicpu(p).oper[0]^.ref^, TargetRef, 16) then
|
|
|
+ begin
|
|
|
+ UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
+ Inc(TargetRef.offset, 8);
|
|
|
+ if GetNextInstruction(hp2, hp3) and
|
|
|
+ MatchInstruction(hp3, A_MOV, [taicpu(p).opsize]) and
|
|
|
+ MatchOpType(taicpu(hp3), top_reg, top_ref) and
|
|
|
+ (taicpu(hp2).oper[1]^.reg = taicpu(hp3).oper[0]^.reg) and
|
|
|
+ RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
|
|
|
+ not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
|
|
|
+ begin
|
|
|
+ NewMMReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
|
|
|
+ if NewMMReg <> NR_NO then
|
|
|
+ begin
|
|
|
+ { Remember that the offsets are 8 ahead }
|
|
|
+ if ((SourceRef.offset mod 16) = 8) and
|
|
|
+ (
|
|
|
+ { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
+ (SourceRef.base = current_procinfo.framepointer) or
|
|
|
+ ((SourceRef.alignment >= 16) and ((SourceRef.alignment mod 16) = 0))
|
|
|
+ ) then
|
|
|
+ taicpu(p).opcode := MovAligned
|
|
|
+ else
|
|
|
+ taicpu(p).opcode := MovUnaligned;
|
|
|
+
|
|
|
+ taicpu(p).opsize := S_XMM;
|
|
|
+ taicpu(p).oper[1]^.reg := NewMMReg;
|
|
|
+
|
|
|
+ if ((TargetRef.offset mod 16) = 8) and
|
|
|
+ (
|
|
|
+ { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
+ (TargetRef.base = current_procinfo.framepointer) or
|
|
|
+ ((TargetRef.alignment >= 16) and ((TargetRef.alignment mod 16) = 0))
|
|
|
+ ) then
|
|
|
+ taicpu(hp1).opcode := MovAligned
|
|
|
+ else
|
|
|
+ taicpu(hp1).opcode := MovUnaligned;
|
|
|
+
|
|
|
+ taicpu(hp1).opsize := S_XMM;
|
|
|
+ taicpu(hp1).oper[0]^.reg := NewMMReg;
|
|
|
+
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(NewMMReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 1)', p);
|
|
|
+
|
|
|
+ RemoveInstruction(hp2);
|
|
|
+ RemoveInstruction(hp3);
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ { See if the next references are 8 less rather than 8 greater }
|
|
|
+
|
|
|
+ Dec(SourceRef.offset, 16); { -8 the other way }
|
|
|
+ if RefsEqual(SourceRef, taicpu(hp2).oper[0]^.ref^) then
|
|
|
+ begin
|
|
|
+ UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
+ Dec(TargetRef.offset, 8); { Only 8, not 16, as it wasn't incremented unlike SourceRef }
|
|
|
+ if not RefsMightOverlap(SourceRef, TargetRef, 16) and
|
|
|
+ GetNextInstruction(hp2, hp3) and
|
|
|
+ MatchInstruction(hp3, A_MOV, [taicpu(p).opsize]) and
|
|
|
+ MatchOpType(taicpu(hp3), top_reg, top_ref) and
|
|
|
+ (taicpu(hp2).oper[1]^.reg = taicpu(hp3).oper[0]^.reg) and
|
|
|
+ RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
|
|
|
+ not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
|
|
|
+ begin
|
|
|
+ NewMMReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
|
|
|
+ if NewMMReg <> NR_NO then
|
|
|
+ begin
|
|
|
+ { hp2 and hp3 are the starting offsets, so mod = 0 this time }
|
|
|
+ if ((SourceRef.offset mod 16) = 0) and
|
|
|
+ (
|
|
|
+ { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
+ (SourceRef.base = current_procinfo.framepointer) or
|
|
|
+ ((SourceRef.alignment >= 16) and ((SourceRef.alignment mod 16) = 0))
|
|
|
+ ) then
|
|
|
+ taicpu(hp2).opcode := MovAligned
|
|
|
+ else
|
|
|
+ taicpu(hp2).opcode := MovUnaligned;
|
|
|
+
|
|
|
+ taicpu(hp2).opsize := S_XMM;
|
|
|
+ taicpu(hp2).oper[1]^.reg := NewMMReg;
|
|
|
+
|
|
|
+ if ((TargetRef.offset mod 16) = 0) and
|
|
|
+ (
|
|
|
+ { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
+ (TargetRef.base = current_procinfo.framepointer) or
|
|
|
+ ((TargetRef.alignment >= 16) and ((TargetRef.alignment mod 16) = 0))
|
|
|
+ ) then
|
|
|
+ taicpu(hp3).opcode := MovAligned
|
|
|
+ else
|
|
|
+ taicpu(hp3).opcode := MovUnaligned;
|
|
|
+
|
|
|
+ taicpu(hp3).opsize := S_XMM;
|
|
|
+ taicpu(hp3).oper[0]^.reg := NewMMReg;
|
|
|
+
|
|
|
+ DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(NewMMReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 2)', p);
|
|
|
+
|
|
|
+ RemoveInstruction(hp1);
|
|
|
+ RemoveCurrentP(p);
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+{$endif x86_64}
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ { The write target should be a reg or a ref }
|
|
|
+ InternalError(2021091601);
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ ;
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else if (taicpu(p).oper[0]^.typ = top_const) and
|
|
|
+ { %treg is used afterwards, but all eventualities other
|
|
|
+ than the first MOV instruction being a constant are
|
|
|
+ covered by DeepMOVOpt, so only check for that }
|
|
|
+ (
|
|
|
+ { For MOV operations, a size saving is only made if the register/const is byte-sized }
|
|
|
+ not (cs_opt_size in current_settings.optimizerswitches) or
|
|
|
+ (taicpu(hp1).opsize = S_B)
|
|
|
+ ) and
|
|
|
+ (
|
|
|
+ (taicpu(hp1).oper[1]^.typ = top_reg) or
|
|
|
+ ((taicpu(p).oper[0]^.val >= low(longint)) and (taicpu(p).oper[0]^.val <= high(longint)))
|
|
|
+ ) then
|
|
|
+ begin
|
|
|
+ DebugMsg(SPeepholeOptimization + debug_operstr(taicpu(hp1).oper[0]^) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val) + '; changed to minimise pipeline stall (MovMov2Mov 6b)',hp1);
|
|
|
+ taicpu(hp1).loadconst(0, taicpu(p).oper[0]^.val);
|
|
|
+ Include(OptsToCheck, aoc_ForceNewIteration);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
end;
|
|
|
end;
|
|
|
|
|
|
@@ -3975,244 +4224,6 @@ unit aoptx86;
|
|
|
Exit;
|
|
|
end;
|
|
|
|
|
|
- if (taicpu(p).oper[1]^.typ = top_reg) and
|
|
|
- MatchOperand(taicpu(p).oper[1]^,taicpu(hp1).oper[0]^) then
|
|
|
- begin
|
|
|
- { Remember that p_TargetReg contains taicpu(p).oper[1]^.reg }
|
|
|
- TransferUsedRegs(TmpUsedRegs);
|
|
|
- UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
|
|
|
- { we have
|
|
|
- mov x, %treg
|
|
|
- mov %treg, y
|
|
|
- }
|
|
|
- if not(RegInOp(p_TargetReg, taicpu(hp1).oper[1]^)) then
|
|
|
- if not(RegUsedAfterInstruction(p_TargetReg, hp1, TmpUsedRegs)) then
|
|
|
- { we've got
|
|
|
-
|
|
|
- mov x, %treg
|
|
|
- mov %treg, y
|
|
|
-
|
|
|
- with %treg is not used after }
|
|
|
- case taicpu(p).oper[0]^.typ Of
|
|
|
- { top_reg is covered by DeepMOVOpt }
|
|
|
- top_const:
|
|
|
- begin
|
|
|
- { change
|
|
|
- mov const, %treg
|
|
|
- mov %treg, y
|
|
|
-
|
|
|
- to
|
|
|
-
|
|
|
- mov const, y
|
|
|
- }
|
|
|
- if (taicpu(hp1).oper[1]^.typ=top_reg) or
|
|
|
- ((taicpu(p).oper[0]^.val>=low(longint)) and (taicpu(p).oper[0]^.val<=high(longint))) then
|
|
|
- begin
|
|
|
- if taicpu(hp1).oper[1]^.typ=top_reg then
|
|
|
- AllocRegBetween(taicpu(hp1).oper[1]^.reg,p,hp1,usedregs);
|
|
|
- taicpu(p).loadOper(1,taicpu(hp1).oper[1]^);
|
|
|
- DebugMsg(SPeepholeOptimization + 'MovMov2Mov 5 done',p);
|
|
|
- RemoveInstruction(hp1);
|
|
|
- Result:=true;
|
|
|
- Exit;
|
|
|
- end;
|
|
|
- end;
|
|
|
- top_ref:
|
|
|
- case taicpu(hp1).oper[1]^.typ of
|
|
|
- top_reg:
|
|
|
- begin
|
|
|
- { change
|
|
|
- mov mem, %treg
|
|
|
- mov %treg, %reg
|
|
|
-
|
|
|
- to
|
|
|
-
|
|
|
- mov mem, %reg"
|
|
|
- }
|
|
|
- AllocRegBetween(taicpu(hp1).oper[1]^.reg,p,hp1,usedregs);
|
|
|
- taicpu(p).loadreg(1, taicpu(hp1).oper[1]^.reg);
|
|
|
- DebugMsg(SPeepholeOptimization + 'MovMov2Mov 3 done',p);
|
|
|
- RemoveInstruction(hp1);
|
|
|
- Result:=true;
|
|
|
- Exit;
|
|
|
- end;
|
|
|
- top_ref:
|
|
|
- begin
|
|
|
-{$ifdef x86_64}
|
|
|
- { Look for the following to simplify:
|
|
|
-
|
|
|
- mov x(mem1), %reg
|
|
|
- mov %reg, y(mem2)
|
|
|
- mov x+8(mem1), %reg
|
|
|
- mov %reg, y+8(mem2)
|
|
|
-
|
|
|
- Change to:
|
|
|
- movdqu x(mem1), %xmmreg
|
|
|
- movdqu %xmmreg, y(mem2)
|
|
|
-
|
|
|
- ...but only as long as the memory blocks don't overlap
|
|
|
- }
|
|
|
- SourceRef := taicpu(p).oper[0]^.ref^;
|
|
|
- TargetRef := taicpu(hp1).oper[1]^.ref^;
|
|
|
- if (taicpu(p).opsize = S_Q) and
|
|
|
- GetNextInstruction(hp1, hp2) and
|
|
|
- MatchInstruction(hp2, A_MOV, [taicpu(p).opsize]) and
|
|
|
- MatchOpType(taicpu(hp2), top_ref, top_reg) then
|
|
|
- begin
|
|
|
- { Delay calling GetNextInstruction(hp2, hp3) for as long as possible }
|
|
|
-
|
|
|
- UpdateUsedRegs(TmpUsedRegs, tai(hp1.Next));
|
|
|
-
|
|
|
- Inc(SourceRef.offset, 8);
|
|
|
-
|
|
|
- if UseAVX then
|
|
|
- begin
|
|
|
- MovAligned := A_VMOVDQA;
|
|
|
- MovUnaligned := A_VMOVDQU;
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- MovAligned := A_MOVDQA;
|
|
|
- MovUnaligned := A_MOVDQU;
|
|
|
- end;
|
|
|
-
|
|
|
- if RefsEqual(SourceRef, taicpu(hp2).oper[0]^.ref^) and
|
|
|
- not RefsMightOverlap(taicpu(p).oper[0]^.ref^, TargetRef, 16) then
|
|
|
- begin
|
|
|
- UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
- Inc(TargetRef.offset, 8);
|
|
|
- if GetNextInstruction(hp2, hp3) and
|
|
|
- MatchInstruction(hp3, A_MOV, [taicpu(p).opsize]) and
|
|
|
- MatchOpType(taicpu(hp3), top_reg, top_ref) and
|
|
|
- (taicpu(hp2).oper[1]^.reg = taicpu(hp3).oper[0]^.reg) and
|
|
|
- RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
|
|
|
- not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
|
|
|
- begin
|
|
|
- NewMMReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
|
|
|
- if NewMMReg <> NR_NO then
|
|
|
- begin
|
|
|
- { Remember that the offsets are 8 ahead }
|
|
|
- if ((SourceRef.offset mod 16) = 8) and
|
|
|
- (
|
|
|
- { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
- (SourceRef.base = current_procinfo.framepointer) or
|
|
|
- ((SourceRef.alignment >= 16) and ((SourceRef.alignment mod 16) = 0))
|
|
|
- ) then
|
|
|
- taicpu(p).opcode := MovAligned
|
|
|
- else
|
|
|
- taicpu(p).opcode := MovUnaligned;
|
|
|
-
|
|
|
- taicpu(p).opsize := S_XMM;
|
|
|
- taicpu(p).oper[1]^.reg := NewMMReg;
|
|
|
-
|
|
|
- if ((TargetRef.offset mod 16) = 8) and
|
|
|
- (
|
|
|
- { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
- (TargetRef.base = current_procinfo.framepointer) or
|
|
|
- ((TargetRef.alignment >= 16) and ((TargetRef.alignment mod 16) = 0))
|
|
|
- ) then
|
|
|
- taicpu(hp1).opcode := MovAligned
|
|
|
- else
|
|
|
- taicpu(hp1).opcode := MovUnaligned;
|
|
|
-
|
|
|
- taicpu(hp1).opsize := S_XMM;
|
|
|
- taicpu(hp1).oper[0]^.reg := NewMMReg;
|
|
|
-
|
|
|
- DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(NewMMReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 1)', p);
|
|
|
-
|
|
|
- RemoveInstruction(hp2);
|
|
|
- RemoveInstruction(hp3);
|
|
|
- Result := True;
|
|
|
- Exit;
|
|
|
- end;
|
|
|
- end;
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- { See if the next references are 8 less rather than 8 greater }
|
|
|
-
|
|
|
- Dec(SourceRef.offset, 16); { -8 the other way }
|
|
|
- if RefsEqual(SourceRef, taicpu(hp2).oper[0]^.ref^) then
|
|
|
- begin
|
|
|
- UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
- Dec(TargetRef.offset, 8); { Only 8, not 16, as it wasn't incremented unlike SourceRef }
|
|
|
- if not RefsMightOverlap(SourceRef, TargetRef, 16) and
|
|
|
- GetNextInstruction(hp2, hp3) and
|
|
|
- MatchInstruction(hp3, A_MOV, [taicpu(p).opsize]) and
|
|
|
- MatchOpType(taicpu(hp3), top_reg, top_ref) and
|
|
|
- (taicpu(hp2).oper[1]^.reg = taicpu(hp3).oper[0]^.reg) and
|
|
|
- RefsEqual(TargetRef, taicpu(hp3).oper[1]^.ref^) and
|
|
|
- not RegUsedAfterInstruction(taicpu(hp2).oper[1]^.reg, hp3, TmpUsedRegs) then
|
|
|
- begin
|
|
|
- NewMMReg := GetMMRegisterBetween(R_SUBMMX, UsedRegs, p, hp3);
|
|
|
- if NewMMReg <> NR_NO then
|
|
|
- begin
|
|
|
- { hp2 and hp3 are the starting offsets, so mod = 0 this time }
|
|
|
- if ((SourceRef.offset mod 16) = 0) and
|
|
|
- (
|
|
|
- { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
- (SourceRef.base = current_procinfo.framepointer) or
|
|
|
- ((SourceRef.alignment >= 16) and ((SourceRef.alignment mod 16) = 0))
|
|
|
- ) then
|
|
|
- taicpu(hp2).opcode := MovAligned
|
|
|
- else
|
|
|
- taicpu(hp2).opcode := MovUnaligned;
|
|
|
-
|
|
|
- taicpu(hp2).opsize := S_XMM;
|
|
|
- taicpu(hp2).oper[1]^.reg := NewMMReg;
|
|
|
-
|
|
|
- if ((TargetRef.offset mod 16) = 0) and
|
|
|
- (
|
|
|
- { Base pointer is always aligned (stack pointer won't be if there's no stack frame) }
|
|
|
- (TargetRef.base = current_procinfo.framepointer) or
|
|
|
- ((TargetRef.alignment >= 16) and ((TargetRef.alignment mod 16) = 0))
|
|
|
- ) then
|
|
|
- taicpu(hp3).opcode := MovAligned
|
|
|
- else
|
|
|
- taicpu(hp3).opcode := MovUnaligned;
|
|
|
-
|
|
|
- taicpu(hp3).opsize := S_XMM;
|
|
|
- taicpu(hp3).oper[0]^.reg := NewMMReg;
|
|
|
-
|
|
|
- DebugMsg(SPeepholeOptimization + 'Used ' + debug_regname(NewMMReg) + ' to merge a pair of memory moves (MovMovMovMov2MovdqMovdq 2)', p);
|
|
|
-
|
|
|
- RemoveInstruction(hp1);
|
|
|
- RemoveCurrentP(p, hp2);
|
|
|
- Result := True;
|
|
|
- Exit;
|
|
|
- end;
|
|
|
- end;
|
|
|
- end;
|
|
|
- end;
|
|
|
- end;
|
|
|
-{$endif x86_64}
|
|
|
- end;
|
|
|
- else
|
|
|
- { The write target should be a reg or a ref }
|
|
|
- InternalError(2021091601);
|
|
|
- end;
|
|
|
- else
|
|
|
- ;
|
|
|
- end
|
|
|
- else
|
|
|
- { %treg is used afterwards, but all eventualities
|
|
|
- other than the first MOV instruction being a constant
|
|
|
- are covered by DeepMOVOpt, so only check for that }
|
|
|
- if (taicpu(p).oper[0]^.typ = top_const) and
|
|
|
- (
|
|
|
- { For MOV operations, a size saving is only made if the register/const is byte-sized }
|
|
|
- not (cs_opt_size in current_settings.optimizerswitches) or
|
|
|
- (taicpu(hp1).opsize = S_B)
|
|
|
- ) and
|
|
|
- (
|
|
|
- (taicpu(hp1).oper[1]^.typ = top_reg) or
|
|
|
- ((taicpu(p).oper[0]^.val >= low(longint)) and (taicpu(p).oper[0]^.val <= high(longint)))
|
|
|
- ) then
|
|
|
- begin
|
|
|
- DebugMsg(SPeepholeOptimization + debug_operstr(taicpu(hp1).oper[0]^) + ' = $' + debug_tostr(taicpu(p).oper[0]^.val) + '; changed to minimise pipeline stall (MovMov2Mov 6b)',hp1);
|
|
|
- taicpu(hp1).loadconst(0, taicpu(p).oper[0]^.val);
|
|
|
- end;
|
|
|
- end;
|
|
|
if (taicpu(hp1).oper[0]^.typ = taicpu(p).oper[1]^.typ) and
|
|
|
(taicpu(hp1).oper[1]^.typ = taicpu(p).oper[0]^.typ) then
|
|
|
{ mov reg1, mem1 or mov mem1, reg1
|
J. Gareth "Curious Kit" Moreton