+ register .inc files for SPARC64

git-svn-id: trunk@36380 -

.gitattributes

@@ -692,10 +692,19 @@ compiler/sparc/rspsri.inc svneol=native#text/plain
 compiler/sparc/rspstab.inc svneol=native#text/plain
 compiler/sparc/rspstd.inc svneol=native#text/plain
 compiler/sparc/rspsup.inc svneol=native#text/plain
-compiler/sparc/spreg.dat svneol=native#text/plain
 compiler/sparc/strinst.inc svneol=native#text/plain
 compiler/sparc/symcpu.pas svneol=native#text/plain
 compiler/sparc64/cpuinfo.pas svneol=native#text/plain
+compiler/sparc64/rsp64con.inc svneol=native#text/pascal
+compiler/sparc64/rsp64dwrf.inc svneol=native#text/pascal
+compiler/sparc64/rsp64nor.inc svneol=native#text/pascal
+compiler/sparc64/rsp64num.inc svneol=native#text/pascal
+compiler/sparc64/rsp64rni.inc svneol=native#text/pascal
+compiler/sparc64/rsp64sri.inc svneol=native#text/pascal
+compiler/sparc64/rsp64stab.inc svneol=native#text/pascal
+compiler/sparc64/rsp64std.inc svneol=native#text/pascal
+compiler/sparc64/rsp64sup.inc svneol=native#text/pascal
+compiler/sparcgen/spreg.dat svneol=native#text/plain
 compiler/switches.pas svneol=native#text/plain
 compiler/symbase.pas svneol=native#text/plain
 compiler/symconst.pas svneol=native#text/plain

compiler/Makefile.fpc

@@ -543,10 +543,16 @@ regdatarm : arm/armreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkarmreg.pp
         cd arm && ..$(PATHSEP)utils$(PATHSEP)mkarmreg$(SRCEXEEXT)
 
-regdatsp : sparc/spreg.dat
+regdatsp : sparcgen/spreg.dat
             $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkspreg.pp
-        cd sparc && ..$(PATHSEP)utils$(PATHSEP)mkspreg$(SRCEXEEXT)
+        cd sparcgen && ..$(PATHSEP)utils$(PATHSEP)mkspreg$(SRCEXEEXT)
+		mv -f sparcgen/rsp*.inc sparc
 
+regdatsp64 : sparcgen/spreg.dat
+            $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkspreg.pp
+        cd sparcgen && ..$(PATHSEP)utils$(PATHSEP)mkspreg$(SRCEXEEXT) sparc64
+		mv -f sparcgen/rsp*.inc sparc64
+		
 regdatavr : avr/avrreg.dat
             $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkavrreg.pp
         cd avr && ..$(PATHSEP)utils$(PATHSEP)mkavrreg$(SRCEXEEXT)
@@ -559,7 +565,7 @@ regdatmips : mips/mipsreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkmpsreg.pp
         cd mips && ..$(PATHSEP)utils$(PATHSEP)mkmpsreg$(SRCEXEEXT)
 
-regdat : regdatx86 regdatarm regdatsp regdatavr regdataarch64 regdatmips
+regdat : regdatx86 regdatarm regdatsp regdatavr regdataarch64 regdatmips regdatsp64
 
 # revision.inc rule
 revision.inc :

compiler/sparc64/rsp64con.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+NR_NO = tregister($00000000);
+NR_G0 = tregister($01040000);
+NR_G1 = tregister($01040001);
+NR_G2 = tregister($01040002);
+NR_G3 = tregister($01040003);
+NR_G4 = tregister($01040004);
+NR_G5 = tregister($01040005);
+NR_G6 = tregister($01040006);
+NR_G7 = tregister($01040007);
+NR_O0 = tregister($01040008);
+NR_O1 = tregister($01040009);
+NR_O2 = tregister($0104000a);
+NR_O3 = tregister($0104000b);
+NR_O4 = tregister($0104000c);
+NR_O5 = tregister($0104000d);
+NR_O6 = tregister($0104000e);
+NR_O7 = tregister($0104000f);
+NR_L0 = tregister($01040010);
+NR_L1 = tregister($01040011);
+NR_L2 = tregister($01040012);
+NR_L3 = tregister($01040013);
+NR_L4 = tregister($01040014);
+NR_L5 = tregister($01040015);
+NR_L6 = tregister($01040016);
+NR_L7 = tregister($01040017);
+NR_I0 = tregister($01040018);
+NR_I1 = tregister($01040019);
+NR_I2 = tregister($0104001a);
+NR_I3 = tregister($0104001b);
+NR_I4 = tregister($0104001c);
+NR_I5 = tregister($0104001d);
+NR_I6 = tregister($0104001e);
+NR_I7 = tregister($0104001f);
+NR_FP = tregister($0104001e);
+NR_SP = tregister($0104000e);
+NR_F0 = tregister($02060000);
+NR_F1 = tregister($02060001);
+NR_F2 = tregister($02060002);
+NR_F3 = tregister($02060003);
+NR_F4 = tregister($02060004);
+NR_F5 = tregister($02060005);
+NR_F6 = tregister($02060006);
+NR_F7 = tregister($02060007);
+NR_F8 = tregister($02060008);
+NR_F9 = tregister($02060009);
+NR_F10 = tregister($0206000a);
+NR_F11 = tregister($0206000b);
+NR_F12 = tregister($0206000c);
+NR_F13 = tregister($0206000d);
+NR_F14 = tregister($0206000e);
+NR_F15 = tregister($0206000f);
+NR_F16 = tregister($02060010);
+NR_F17 = tregister($02060011);
+NR_F18 = tregister($02060012);
+NR_F19 = tregister($02060013);
+NR_F20 = tregister($02060014);
+NR_F21 = tregister($02060015);
+NR_F22 = tregister($02060016);
+NR_F23 = tregister($02060017);
+NR_F24 = tregister($02060018);
+NR_F25 = tregister($02060019);
+NR_F26 = tregister($0206001a);
+NR_F27 = tregister($0206001b);
+NR_F28 = tregister($0206001c);
+NR_F29 = tregister($0206001d);
+NR_F30 = tregister($0206001e);
+NR_F31 = tregister($0206001f);
+NR_D0 = tregister($02070000);
+NR_D2 = tregister($02070002);
+NR_D4 = tregister($02070004);
+NR_D6 = tregister($02070006);
+NR_D8 = tregister($02070008);
+NR_D10 = tregister($0207000a);
+NR_D12 = tregister($0207000c);
+NR_D14 = tregister($0207000e);
+NR_D16 = tregister($02070010);
+NR_D18 = tregister($02070012);
+NR_D20 = tregister($02070014);
+NR_D22 = tregister($02070016);
+NR_D24 = tregister($02070018);
+NR_D26 = tregister($0207001a);
+NR_D28 = tregister($0207001c);
+NR_D30 = tregister($0207001e);
+NR_D32 = tregister($02070020);
+NR_D34 = tregister($02070022);
+NR_D36 = tregister($02070024);
+NR_D38 = tregister($02070026);
+NR_D40 = tregister($02070028);
+NR_D42 = tregister($0207002A);
+NR_D44 = tregister($0207002C);
+NR_D46 = tregister($0207002E);
+NR_D48 = tregister($02070030);
+NR_D50 = tregister($02070032);
+NR_D52 = tregister($02070034);
+NR_D54 = tregister($02070036);
+NR_D56 = tregister($02070038);
+NR_D58 = tregister($0207003A);
+NR_D60 = tregister($0207003C);
+NR_D62 = tregister($0207003E);
+NR_C0 = tregister($03000000);
+NR_C1 = tregister($03000001);
+NR_C2 = tregister($03000002);
+NR_C3 = tregister($03000003);
+NR_C4 = tregister($03000004);
+NR_C5 = tregister($03000005);
+NR_C6 = tregister($03000006);
+NR_C7 = tregister($03000007);
+NR_C8 = tregister($03000008);
+NR_C9 = tregister($03000009);
+NR_C10 = tregister($0300000a);
+NR_C11 = tregister($0300000b);
+NR_C12 = tregister($0300000c);
+NR_C13 = tregister($0300000d);
+NR_C14 = tregister($0300000e);
+NR_C15 = tregister($0300000f);
+NR_C16 = tregister($03000010);
+NR_C17 = tregister($03000011);
+NR_C18 = tregister($03000012);
+NR_C19 = tregister($03000013);
+NR_C20 = tregister($03000014);
+NR_C21 = tregister($03000015);
+NR_C22 = tregister($03000016);
+NR_C23 = tregister($03000017);
+NR_C24 = tregister($03000018);
+NR_C25 = tregister($03000019);
+NR_C26 = tregister($0300001a);
+NR_C27 = tregister($0300001b);
+NR_C28 = tregister($0300001c);
+NR_C29 = tregister($0300001d);
+NR_C30 = tregister($0300001e);
+NR_C31 = tregister($0300001f);
+NR_FSR = tregister($05000000);
+NR_FQ = tregister($05000001);
+NR_CSR = tregister($05000002);
+NR_CQ = tregister($05000003);
+NR_PSR = tregister($05000004);
+NR_TBR = tregister($05000005);
+NR_WIM = tregister($05000006);
+NR_Y = tregister($05000007);
+NR_ASR0 = tregister($04000000);
+NR_ASR1 = tregister($04000001);
+NR_ASR2 = tregister($04000002);
+NR_ASR3 = tregister($04000003);
+NR_ASR4 = tregister($04000004);
+NR_ASR5 = tregister($04000005);
+NR_ASR6 = tregister($04000006);
+NR_ASR7 = tregister($04000007);
+NR_ASR8 = tregister($04000008);
+NR_ASR9 = tregister($04000009);
+NR_ASR10 = tregister($0400000a);
+NR_ASR11 = tregister($0400000b);
+NR_ASR12 = tregister($0400000c);
+NR_ASR13 = tregister($0400000d);
+NR_ASR14 = tregister($0400000e);
+NR_ASR15 = tregister($0400000f);
+NR_ASR16 = tregister($04000010);
+NR_ASR17 = tregister($04000011);
+NR_ASR18 = tregister($04000012);
+NR_ASR19 = tregister($04000013);
+NR_ASR20 = tregister($04000014);
+NR_ASR21 = tregister($04000015);
+NR_ASR22 = tregister($04000016);
+NR_ASR23 = tregister($04000017);
+NR_ASR24 = tregister($04000018);
+NR_ASR25 = tregister($04000019);
+NR_ASR26 = tregister($0400001a);
+NR_ASR27 = tregister($0400001b);
+NR_ASR28 = tregister($0400001c);
+NR_ASR29 = tregister($0400001d);
+NR_ASR30 = tregister($0400001e);
+NR_ASR31 = tregister($0400001f);

compiler/sparc64/rsp64dwrf.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+-1,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15,
+16,
+17,
+18,
+19,
+20,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28,
+29,
+30,
+31,
+30,
+14,
+32,
+33,
+34,
+35,
+36,
+37,
+38,
+39,
+40,
+41,
+42,
+43,
+44,
+45,
+46,
+47,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+56,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80,
+81,
+82,
+83,
+84,
+85,
+86,
+87,
+88,
+89,
+90,
+91,
+92,
+93,
+94,
+95,
+96,
+97,
+98,
+99,
+100,
+101,
+102,
+103,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
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+32,
+32,
+32,
+32,
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+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+70,
+65,
+71,
+65,
+65,
+67,
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+64,
+32,
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+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32

compiler/sparc64/rsp64nor.inc

@@ -0,0 +1,2 @@
+{ don't edit, this file is generated from spreg.dat }
+171

compiler/sparc64/rsp64num.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+NR_NO,
+NR_G0,
+NR_G1,
+NR_G2,
+NR_G3,
+NR_G4,
+NR_G5,
+NR_G6,
+NR_G7,
+NR_O0,
+NR_O1,
+NR_O2,
+NR_O3,
+NR_O4,
+NR_O5,
+NR_O6,
+NR_O7,
+NR_L0,
+NR_L1,
+NR_L2,
+NR_L3,
+NR_L4,
+NR_L5,
+NR_L6,
+NR_L7,
+NR_I0,
+NR_I1,
+NR_I2,
+NR_I3,
+NR_I4,
+NR_I5,
+NR_I6,
+NR_I7,
+NR_FP,
+NR_SP,
+NR_F0,
+NR_F1,
+NR_F2,
+NR_F3,
+NR_F4,
+NR_F5,
+NR_F6,
+NR_F7,
+NR_F8,
+NR_F9,
+NR_F10,
+NR_F11,
+NR_F12,
+NR_F13,
+NR_F14,
+NR_F15,
+NR_F16,
+NR_F17,
+NR_F18,
+NR_F19,
+NR_F20,
+NR_F21,
+NR_F22,
+NR_F23,
+NR_F24,
+NR_F25,
+NR_F26,
+NR_F27,
+NR_F28,
+NR_F29,
+NR_F30,
+NR_F31,
+NR_D0,
+NR_D2,
+NR_D4,
+NR_D6,
+NR_D8,
+NR_D10,
+NR_D12,
+NR_D14,
+NR_D16,
+NR_D18,
+NR_D20,
+NR_D22,
+NR_D24,
+NR_D26,
+NR_D28,
+NR_D30,
+NR_D32,
+NR_D34,
+NR_D36,
+NR_D38,
+NR_D40,
+NR_D42,
+NR_D44,
+NR_D46,
+NR_D48,
+NR_D50,
+NR_D52,
+NR_D54,
+NR_D56,
+NR_D58,
+NR_D60,
+NR_D62,
+NR_C0,
+NR_C1,
+NR_C2,
+NR_C3,
+NR_C4,
+NR_C5,
+NR_C6,
+NR_C7,
+NR_C8,
+NR_C9,
+NR_C10,
+NR_C11,
+NR_C12,
+NR_C13,
+NR_C14,
+NR_C15,
+NR_C16,
+NR_C17,
+NR_C18,
+NR_C19,
+NR_C20,
+NR_C21,
+NR_C22,
+NR_C23,
+NR_C24,
+NR_C25,
+NR_C26,
+NR_C27,
+NR_C28,
+NR_C29,
+NR_C30,
+NR_C31,
+NR_FSR,
+NR_FQ,
+NR_CSR,
+NR_CQ,
+NR_PSR,
+NR_TBR,
+NR_WIM,
+NR_Y,
+NR_ASR0,
+NR_ASR1,
+NR_ASR2,
+NR_ASR3,
+NR_ASR4,
+NR_ASR5,
+NR_ASR6,
+NR_ASR7,
+NR_ASR8,
+NR_ASR9,
+NR_ASR10,
+NR_ASR11,
+NR_ASR12,
+NR_ASR13,
+NR_ASR14,
+NR_ASR15,
+NR_ASR16,
+NR_ASR17,
+NR_ASR18,
+NR_ASR19,
+NR_ASR20,
+NR_ASR21,
+NR_ASR22,
+NR_ASR23,
+NR_ASR24,
+NR_ASR25,
+NR_ASR26,
+NR_ASR27,
+NR_ASR28,
+NR_ASR29,
+NR_ASR30,
+NR_ASR31

compiler/sparc64/rsp64rni.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15,
+34,
+16,
+17,
+18,
+19,
+20,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
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+29,
+30,
+31,
+33,
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+36,
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+54,
+55,
+56,
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+60,
+61,
+62,
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+85,
+86,
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+105,
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+166,
+167,
+168,
+169,
+170,
+131,
+132,
+133,
+134,
+135,
+136,
+137,
+138

compiler/sparc64/rsp64sri.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+139,
+140,
+149,
+150,
+151,
+152,
+153,
+154,
+155,
+156,
+157,
+158,
+141,
+159,
+160,
+161,
+162,
+163,
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+166,
+167,
+168,
+142,
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+170,
+143,
+144,
+145,
+146,
+147,
+148,
+99,
+100,
+109,
+110,
+111,
+112,
+113,
+114,
+115,
+116,
+117,
+118,
+101,
+119,
+120,
+121,
+122,
+123,
+124,
+125,
+126,
+127,
+128,
+102,
+129,
+130,
+103,
+104,
+105,
+106,
+107,
+108,
+134,
+133,
+67,
+72,
+73,
+74,
+75,
+76,
+68,
+77,
+78,
+79,
+80,
+81,
+82,
+83,
+84,
+85,
+86,
+69,
+87,
+88,
+89,
+90,
+91,
+92,
+93,
+94,
+95,
+96,
+70,
+97,
+98,
+71,
+35,
+36,
+45,
+46,
+47,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+37,
+55,
+56,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+64,
+38,
+65,
+66,
+39,
+40,
+41,
+42,
+43,
+44,
+33,
+132,
+131,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+25,
+26,
+27,
+28,
+29,
+30,
+31,
+32,
+17,
+18,
+19,
+20,
+21,
+22,
+23,
+24,
+9,
+10,
+11,
+12,
+13,
+14,
+15,
+16,
+135,
+34,
+136,
+137,
+138,
+0

compiler/sparc64/rsp64stab.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+-1,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15,
+16,
+17,
+18,
+19,
+20,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28,
+29,
+30,
+31,
+30,
+14,
+32,
+33,
+34,
+35,
+36,
+37,
+38,
+39,
+40,
+41,
+42,
+43,
+44,
+45,
+46,
+47,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+56,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80,
+81,
+82,
+83,
+84,
+85,
+86,
+87,
+88,
+89,
+90,
+91,
+92,
+93,
+94,
+95,
+96,
+97,
+98,
+99,
+100,
+101,
+102,
+103,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+70,
+65,
+71,
+65,
+65,
+67,
+66,
+64,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32,
+32

compiler/sparc64/rsp64std.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+'INVALID',
+'%g0',
+'%g1',
+'%g2',
+'%g3',
+'%g4',
+'%g5',
+'%g6',
+'%g7',
+'%o0',
+'%o1',
+'%o2',
+'%o3',
+'%o4',
+'%o5',
+'%o6',
+'%o7',
+'%l0',
+'%l1',
+'%l2',
+'%l3',
+'%l4',
+'%l5',
+'%l6',
+'%l7',
+'%i0',
+'%i1',
+'%i2',
+'%i3',
+'%i4',
+'%i5',
+'%i6',
+'%i7',
+'%fp',
+'%sp',
+'%f0',
+'%f1',
+'%f2',
+'%f3',
+'%f4',
+'%f5',
+'%f6',
+'%f7',
+'%f8',
+'%f9',
+'%f10',
+'%f11',
+'%f12',
+'%f13',
+'%f14',
+'%f15',
+'%f16',
+'%f17',
+'%f18',
+'%f19',
+'%f20',
+'%f21',
+'%f22',
+'%f23',
+'%f24',
+'%f25',
+'%f26',
+'%f27',
+'%f28',
+'%f29',
+'%f30',
+'%f31',
+'%d0',
+'%d2',
+'%d4',
+'%d6',
+'%d8',
+'%d10',
+'%d12',
+'%d14',
+'%d16',
+'%d18',
+'%d20',
+'%d22',
+'%d24',
+'%d26',
+'%d28',
+'%d30',
+'%d32',
+'%d34',
+'%d36',
+'%d38',
+'%d40',
+'%d42',
+'%d44',
+'%d46',
+'%d48',
+'%d50',
+'%d52',
+'%d54',
+'%d56',
+'%d58',
+'%d60',
+'%d62',
+'%c0',
+'%c1',
+'%c2',
+'%c3',
+'%c4',
+'%c5',
+'%c6',
+'%c7',
+'%c8',
+'%c9',
+'%c10',
+'%c11',
+'%c12',
+'%c13',
+'%c14',
+'%c15',
+'%c16',
+'%c17',
+'%c18',
+'%c19',
+'%c20',
+'%c21',
+'%c22',
+'%c23',
+'%c24',
+'%c25',
+'%c26',
+'%c27',
+'%c28',
+'%c29',
+'%c30',
+'%c31',
+'%fsr',
+'%fq',
+'%csr',
+'%cq',
+'%psr',
+'%tbr',
+'%wim',
+'%y',
+'%asr0',
+'%asr1',
+'%asr2',
+'%asr3',
+'%asr4',
+'%asr5',
+'%asr6',
+'%asr7',
+'%asr8',
+'%asr9',
+'%asr10',
+'%asr11',
+'%asr12',
+'%asr13',
+'%asr14',
+'%asr15',
+'%asr16',
+'%asr17',
+'%asr18',
+'%asr19',
+'%asr20',
+'%asr21',
+'%asr22',
+'%asr23',
+'%asr24',
+'%asr25',
+'%asr26',
+'%asr27',
+'%asr28',
+'%asr29',
+'%asr30',
+'%asr31'

compiler/sparc64/rsp64sup.inc

@@ -0,0 +1,172 @@
+{ don't edit, this file is generated from spreg.dat }
+RS_NO = $00;
+RS_G0 = $00;
+RS_G1 = $01;
+RS_G2 = $02;
+RS_G3 = $03;
+RS_G4 = $04;
+RS_G5 = $05;
+RS_G6 = $06;
+RS_G7 = $07;
+RS_O0 = $08;
+RS_O1 = $09;
+RS_O2 = $0a;
+RS_O3 = $0b;
+RS_O4 = $0c;
+RS_O5 = $0d;
+RS_O6 = $0e;
+RS_O7 = $0f;
+RS_L0 = $10;
+RS_L1 = $11;
+RS_L2 = $12;
+RS_L3 = $13;
+RS_L4 = $14;
+RS_L5 = $15;
+RS_L6 = $16;
+RS_L7 = $17;
+RS_I0 = $18;
+RS_I1 = $19;
+RS_I2 = $1a;
+RS_I3 = $1b;
+RS_I4 = $1c;
+RS_I5 = $1d;
+RS_I6 = $1e;
+RS_I7 = $1f;
+RS_FP = $1e;
+RS_SP = $0e;
+RS_F0 = $00;
+RS_F1 = $01;
+RS_F2 = $02;
+RS_F3 = $03;
+RS_F4 = $04;
+RS_F5 = $05;
+RS_F6 = $06;
+RS_F7 = $07;
+RS_F8 = $08;
+RS_F9 = $09;
+RS_F10 = $0a;
+RS_F11 = $0b;
+RS_F12 = $0c;
+RS_F13 = $0d;
+RS_F14 = $0e;
+RS_F15 = $0f;
+RS_F16 = $10;
+RS_F17 = $11;
+RS_F18 = $12;
+RS_F19 = $13;
+RS_F20 = $14;
+RS_F21 = $15;
+RS_F22 = $16;
+RS_F23 = $17;
+RS_F24 = $18;
+RS_F25 = $19;
+RS_F26 = $1a;
+RS_F27 = $1b;
+RS_F28 = $1c;
+RS_F29 = $1d;
+RS_F30 = $1e;
+RS_F31 = $1f;
+RS_D0 = $00;
+RS_D2 = $02;
+RS_D4 = $04;
+RS_D6 = $06;
+RS_D8 = $08;
+RS_D10 = $0a;
+RS_D12 = $0c;
+RS_D14 = $0e;
+RS_D16 = $10;
+RS_D18 = $12;
+RS_D20 = $14;
+RS_D22 = $16;
+RS_D24 = $18;
+RS_D26 = $1a;
+RS_D28 = $1c;
+RS_D30 = $1e;
+RS_D32 = $20;
+RS_D34 = $22;
+RS_D36 = $24;
+RS_D38 = $26;
+RS_D40 = $28;
+RS_D42 = $2A;
+RS_D44 = $2C;
+RS_D46 = $2E;
+RS_D48 = $30;
+RS_D50 = $32;
+RS_D52 = $34;
+RS_D54 = $36;
+RS_D56 = $38;
+RS_D58 = $3A;
+RS_D60 = $3C;
+RS_D62 = $3E;
+RS_C0 = $00;
+RS_C1 = $01;
+RS_C2 = $02;
+RS_C3 = $03;
+RS_C4 = $04;
+RS_C5 = $05;
+RS_C6 = $06;
+RS_C7 = $07;
+RS_C8 = $08;
+RS_C9 = $09;
+RS_C10 = $0a;
+RS_C11 = $0b;
+RS_C12 = $0c;
+RS_C13 = $0d;
+RS_C14 = $0e;
+RS_C15 = $0f;
+RS_C16 = $10;
+RS_C17 = $11;
+RS_C18 = $12;
+RS_C19 = $13;
+RS_C20 = $14;
+RS_C21 = $15;
+RS_C22 = $16;
+RS_C23 = $17;
+RS_C24 = $18;
+RS_C25 = $19;
+RS_C26 = $1a;
+RS_C27 = $1b;
+RS_C28 = $1c;
+RS_C29 = $1d;
+RS_C30 = $1e;
+RS_C31 = $1f;
+RS_FSR = $00;
+RS_FQ = $01;
+RS_CSR = $02;
+RS_CQ = $03;
+RS_PSR = $04;
+RS_TBR = $05;
+RS_WIM = $06;
+RS_Y = $07;
+RS_ASR0 = $00;
+RS_ASR1 = $01;
+RS_ASR2 = $02;
+RS_ASR3 = $03;
+RS_ASR4 = $04;
+RS_ASR5 = $05;
+RS_ASR6 = $06;
+RS_ASR7 = $07;
+RS_ASR8 = $08;
+RS_ASR9 = $09;
+RS_ASR10 = $0a;
+RS_ASR11 = $0b;
+RS_ASR12 = $0c;
+RS_ASR13 = $0d;
+RS_ASR14 = $0e;
+RS_ASR15 = $0f;
+RS_ASR16 = $10;
+RS_ASR17 = $11;
+RS_ASR18 = $12;
+RS_ASR19 = $13;
+RS_ASR20 = $14;
+RS_ASR21 = $15;
+RS_ASR22 = $16;
+RS_ASR23 = $17;
+RS_ASR24 = $18;
+RS_ASR25 = $19;
+RS_ASR26 = $1a;
+RS_ASR27 = $1b;
+RS_ASR28 = $1c;
+RS_ASR29 = $1d;
+RS_ASR30 = $1e;
+RS_ASR31 = $1f;

compiler/sparc/spreg.dat → compiler/sparcgen/spreg.dat

@@ -92,7 +92,22 @@ D24,$02,$07,$18,%d24,84,84
 D26,$02,$07,$1a,%d26,85,85
 D28,$02,$07,$1c,%d28,86,86
 D30,$02,$07,$1e,%d30,87,87
-
+D32,$02,$07,$20,%d32,88,88,SPARC64
+D34,$02,$07,$22,%d34,89,89,SPARC64
+D36,$02,$07,$24,%d36,90,90,SPARC64
+D38,$02,$07,$26,%d38,91,91,SPARC64
+D40,$02,$07,$28,%d40,92,92,SPARC64
+D42,$02,$07,$2A,%d42,93,93,SPARC64
+D44,$02,$07,$2C,%d44,94,94,SPARC64
+D46,$02,$07,$2E,%d46,95,95,SPARC64
+D48,$02,$07,$30,%d48,96,96,SPARC64
+D50,$02,$07,$32,%d50,97,97,SPARC64
+D52,$02,$07,$34,%d52,98,98,SPARC64
+D54,$02,$07,$36,%d54,99,99,SPARC64
+D56,$02,$07,$38,%d56,100,100,SPARC64
+D58,$02,$07,$3A,%d58,101,101,SPARC64
+D60,$02,$07,$3C,%d60,102,102,SPARC64
+D62,$02,$07,$3E,%d62,103,103,SPARC64
 
 ; Coprocessor registers
 C0,$03,$00,$00,%c0,32,32

compiler/utils/mkspreg.pp

@@ -33,6 +33,9 @@ var s : string;
     dwarfs : array[0..max_regcount-1] of string[63];
     regnumber_index,
     std_regname_index : array[0..max_regcount-1] of byte;
+	sparc64 : boolean;
+	cpustr,
+	fileprefix : string;
 
 function tostr(l : longint) : string;
 
@@ -180,6 +183,13 @@ begin
         stabs[regcount]:=readstr;
         readcomma;
         dwarfs[regcount]:=readstr;
+        if (i<=high(s)) and (s[i]=',') then
+          begin
+            readcomma;
+            cpustr:=readstr;
+          end
+        else
+          cpustr:='';		
         { Create register number }
         if supregs[regcount][1]<>'$' then
           begin
@@ -187,14 +197,18 @@ begin
             writeln('Line: "',s,'"');
             halt(1);
           end;
-        numbers[regcount]:=regtypes[regcount]+copy(subregs[regcount],2,255)+'00'+copy(supregs[regcount],2,255);
+		
         if i<length(s) then
           begin
             writeln('Extra chars at end of line, at line ',line);
             writeln('Line: "',s,'"');
             halt(1);
           end;
-        inc(regcount);
+		if (cpustr<>'SPARC64') or sparc64 then
+		  begin
+            numbers[regcount]:=regtypes[regcount]+copy(subregs[regcount],2,255)+'00'+copy(supregs[regcount],2,255);
+            inc(regcount);
+		  end;
         if regcount>max_regcount then
           begin
             writeln('Error: Too much registers, please increase maxregcount in source');
@@ -214,15 +228,15 @@ var
 
 begin
   { create inc files }
-  openinc(confile,'rspcon.inc');
-  openinc(supfile,'rspsup.inc');
-  openinc(numfile,'rspnum.inc');
-  openinc(stdfile,'rspstd.inc');
-  openinc(stabfile,'rspstab.inc');
-  openinc(dwarffile,'rspdwrf.inc');
-  openinc(norfile,'rspnor.inc');
-  openinc(rnifile,'rsprni.inc');
-  openinc(srifile,'rspsri.inc');
+  openinc(confile,'rsp'+fileprefix+'con.inc');
+  openinc(supfile,'rsp'+fileprefix+'sup.inc');
+  openinc(numfile,'rsp'+fileprefix+'num.inc');
+  openinc(stdfile,'rsp'+fileprefix+'std.inc');
+  openinc(stabfile,'rsp'+fileprefix+'stab.inc');
+  openinc(dwarffile,'rsp'+fileprefix+'dwrf.inc');
+  openinc(norfile,'rsp'+fileprefix+'nor.inc');
+  openinc(rnifile,'rsp'+fileprefix+'rni.inc');
+  openinc(srifile,'rsp'+fileprefix+'sri.inc');
   first:=true;
   for i:=0 to regcount-1 do
     begin
@@ -263,6 +277,15 @@ end;
 
 begin
    writeln('Register Table Converter Version ',Version);
+   sparc64:=paramstr(1)='sparc64';
+   fileprefix:='';
+   if sparc64 then
+     begin
+       fileprefix:='64';
+       writeln('Processing for CPU SPARC64');
+     end
+   else
+     writeln('Processing for CPU SPARC');
    line:=0;
    regcount:=0;
    read_spreg_file;