* remaking sparc rtl compile

compiler/sparc/aasmcpu.pas

@@ -764,7 +764,7 @@ procedure TAiCpu.SetCondition(const c:TAsmCond);
   const
     AsmCond2OpCode:array[TAsmCond]of TAsmOp=
       (A_BN,A_BNE,A_BE,A_BG,A_BLE,A_BGE,A_BI,A_BGU,A_BLEU,A_BCC,
-A_BCS,A_BPOS,A_NEG,A_BVC,A_BVS,A_BA,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE);
+A_BCS,A_BPOS,A_NEG,A_BVC,A_BVS,A_BA,A_BNE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE,A_NONE);
   begin
     inherited SetCondition(c);
     if Opcode=A_BA
@@ -1096,7 +1096,10 @@ procedure InitAsm;
 end.
 {
     $Log$
-    Revision 1.18  2003-03-10 21:59:54  mazen
+    Revision 1.19  2003-03-15 22:51:58  mazen
+    * remaking sparc rtl compile
+
+    Revision 1.18  2003/03/10 21:59:54  mazen
     * fixing index overflow in handling new registers arrays.
 
     Revision 1.17  2003/02/18 22:00:20  mazen

compiler/sparc/cpugas.pas

@@ -189,7 +189,7 @@ const
     needar:true;
     labelprefix_only_inside_procedure:false;
     labelprefix:'.L';
-    comment:'; ';
+    comment:'## ';
     secnames:({sec_none}'',           {no section}
               {sec_code}'.text',      {executable code}
               {sec_data}'.data',      {initialized R/W data}
@@ -209,7 +209,10 @@ initialization
 end.
 {
     $Log$
-    Revision 1.11  2003-01-08 18:43:58  daniel
+    Revision 1.12  2003-03-15 22:51:58  mazen
+    * remaking sparc rtl compile
+
+    Revision 1.11  2003/01/08 18:43:58  daniel
      * Tregister changed into a record
 
     Revision 1.10  2002/11/16 15:29:16  florian

compiler/sparc/ncpumat.pas

@@ -253,8 +253,9 @@ procedure tSparcshlshrnode.pass_2;
                 location.registerhigh := location.registerlow;
                 location.registerlow := resultreg;
               end;
-            r.enum:=R_G0;
-            rg.getexplicitregisterint(exprasmlist,NR_G0);
+            //rg.getexplicitregisterint(exprasmlist,NR_O0);
+            r.enum:=R_INTREGISTER;
+            r.number:=NR_O0;
 {            exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,R_0,hregister1,32));
             exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,location.registerhigh,hregisterhigh,hregister1));
             exprasmlist.concat(taicpu.op_reg_reg_reg(asmop2,R_0,hregisterlow,R_0));
@@ -478,7 +479,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.6  2003-03-10 21:59:54  mazen
+  Revision 1.7  2003-03-15 22:51:58  mazen
+  * remaking sparc rtl compile
+
+  Revision 1.6  2003/03/10 21:59:54  mazen
   * fixing index overflow in handling new registers arrays.
 
   Revision 1.5  2003/02/19 22:00:17  daniel

compiler/sparc/rgcpu.pas

@@ -39,23 +39,21 @@ methods in this class overrides generic implementations in rgobj.pas.}
 implementation
 uses
   cgobj,verbose;
-
-function trgcpu.GetExplicitRegisterInt(list:taasmoutput;reg:Tnewregister):tregister;
-
-var r:Tregister;
-
+function TRgCpu.GetExplicitRegisterInt(list:TAasmOutput;reg:TNewRegister):TRegister;
+  var
+    r:TRegister;
   begin
-    if (reg=RS_O7) or (reg=NR_I7)
+    if(reg=RS_O7)or(reg=NR_I7)
     then
       begin
         r.enum:=R_INTREGISTER;
         r.number:=reg;
         cg.a_reg_alloc(list,r);
-        result := r;
+        result:=r;
       end
-    else result := inherited GetExplicitRegisterInt(list,reg);
+    else
+      result:=inherited GetExplicitRegisterInt(list,reg);
   end;
-
 procedure trgcpu.UngetRegisterInt(list:taasmoutput;reg:tregister);
   begin
     if reg.enum<>R_INTREGISTER
@@ -72,7 +70,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.7  2003-03-10 21:59:54  mazen
+  Revision 1.8  2003-03-15 22:51:58  mazen
+  * remaking sparc rtl compile
+
+  Revision 1.7  2003/03/10 21:59:54  mazen
   * fixing index overflow in handling new registers arrays.
 
   Revision 1.6  2003/02/19 22:00:17  daniel