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@@ -0,0 +1,63 @@
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+{******************************************************************************
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+ $Id$
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+ Author : Mazen NEIFER
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+ Project : Free Pascal Compiler (FPC)
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+ Creation date : 2002\05\08
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+ Licence : GPL
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+ Bug report : [email protected]
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+******************************************************************************}
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+R_NONE
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+{General purpose global registers}
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+,R_G0{This register is usually set to zero and used as a scratch register}
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+,R_G1,R_G2,R_G3,R_G4,R_G5,R_G6,R_G7
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+{General purpose out registers}
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+,R_O0,R_O1,R_O2,R_O3,R_O4,R_O5,R_O6
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+,R_O7{This register is used to save the address of the last CALL instruction}
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+{General purpose local registers}
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+,R_L0
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+,R_L1{This register is used to save the Program Counter (PC) after a Trap}
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+,R_L2{This register is used to save the Program Counter (nPC) after a Trap}
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+,R_L3,R_L4,R_L5,R_L6,R_L7
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+{General purpose in registers}
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+,R_I0,R_I1,R_I2,R_I3,R_I4,R_I5,R_I6,R_I7
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+{Floating point registers}
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+,R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7
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+,R_F8,R_F9,R_F10,R_F11,R_F12,R_F13,R_F14,R_F15
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+,R_F16,R_F17,R_F18,R_F19,R_F20,R_F21,R_F22,R_F23
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+,R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,R_F30,R_F31
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+{Floating point status/"front of queue" registers}
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+,R_FSR,R_FQ
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+{Coprocessor registers}
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+,R_C0,R_C1,R_C2,R_C3,R_C4,R_C5,R_C6,R_C7
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+,R_C8,R_C9,R_C10,R_C11,R_C12,R_C13,R_C14,R_C15
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+,R_C16,R_C17,R_C18,R_C19,R_C20,R_C21,R_C22,R_C23
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+,R_C24,R_C25,R_C26,R_C27,R_C28,R_C29,R_C30,R_C31
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+{Coprocessor status/queue registers}
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+,R_CSR
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+,R_CQ
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+{Integer Unit control & status registers}
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+,R_PSR{Processor Status Register : informs upon the program status}
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+,R_TBR{Trap Base Register : saves the Trap vactor base address}
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+,R_WIM{Window Invalid Mask : }
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+,R_Y{Multiply/Devide Register : }
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+{Ancillary State Registers : these are implementation dependent registers and
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+thus, are not specified by the SPARC Reference Manual. I did choose the SUN's
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+implementation according to the Assembler Refernce Manual.(MN)}
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+,R_ASR0,R_ASR1,R_ASR2,R_ASR3,R_ASR4,R_ASR5,R_ASR6,R_ASR7
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+,R_ASR8,R_ASR9,R_ASR10,R_ASR11,R_ASR12,R_ASR13,R_ASR14,R_ASR15
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+,R_ASR16,R_ASR17,R_ASR18,R_ASR19,R_ASR20,R_ASR21,R_ASR22,R_ASR23
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+,R_ASR24,R_ASR25,R_ASR26,R_ASR27,R_ASR28,R_ASR29,R_ASR30,R_ASR31
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+{The following registers are just used with the new register allocator}
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+,R_INTREGISTER,R_FLOATREGISTER,R_MMXREGISTER,R_KNIREGISTER
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+{
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+ $Log$
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+ Revision 1.1 2003-04-29 11:53:38 mazen
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+ + This file is used to define all cpu registers physically available
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+
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+ Revision 1.3 2003/01/20 22:21:36 mazen
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+ * many stuff related to RTL fixed
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+
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+ Revision 1.2 2002/10/02 22:20:28 mazen
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+ + out registers allocator for the first 6 scalar parameters which must be passed into %o0..%o5
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+
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+}
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mazen