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Merged revisions 7132,7142-7143 via svnmerge from
svn+ssh://[email protected]/FPC/svn/fpc/trunk

........
r7132 | jonas | 2007-04-18 15:00:36 +0200 (Wed, 18 Apr 2007) | 3 lines

* patch from Michalis Kamburelis to link the correct libraries
on Mac OS X (mantis #8585)

........
r7142 | jonas | 2007-04-20 15:22:45 +0200 (Fri, 20 Apr 2007) | 3 lines

* fixed loading spilled registers from offsets outside the smallint
range for ppc32 and ppc64 (mantis #8633)

........
r7143 | jonas | 2007-04-20 17:14:40 +0200 (Fri, 20 Apr 2007) | 2 lines

* fixed typo in opcode tables (hbrx -> lhbrx)

........

git-svn-id: branches/fixes_2_2@7404 -

Jonas Maebe 18 years ago
parent
commit
d0ee653a9e

+ 2 - 2
.gitattributes

@@ -317,7 +317,6 @@ compiler/powerpc/nppccnv.pas svneol=native#text/plain
 compiler/powerpc/nppcmat.pas svneol=native#text/plain
 compiler/powerpc/nppcmat.pas svneol=native#text/plain
 compiler/powerpc/rappc.pas svneol=native#text/plain
 compiler/powerpc/rappc.pas svneol=native#text/plain
 compiler/powerpc/rappcgas.pas svneol=native#text/plain
 compiler/powerpc/rappcgas.pas svneol=native#text/plain
-compiler/powerpc/rgcpu.pas svneol=native#text/plain
 compiler/powerpc/rppccon.inc svneol=native#text/plain
 compiler/powerpc/rppccon.inc svneol=native#text/plain
 compiler/powerpc/rppcdwrf.inc svneol=native#text/plain
 compiler/powerpc/rppcdwrf.inc svneol=native#text/plain
 compiler/powerpc/rppcgas.inc svneol=native#text/plain
 compiler/powerpc/rppcgas.inc svneol=native#text/plain
@@ -355,7 +354,6 @@ compiler/powerpc64/ppcins.dat -text
 compiler/powerpc64/ppcreg.dat -text
 compiler/powerpc64/ppcreg.dat -text
 compiler/powerpc64/rappc.pas svneol=native#text/plain
 compiler/powerpc64/rappc.pas svneol=native#text/plain
 compiler/powerpc64/rappcgas.pas svneol=native#text/plain
 compiler/powerpc64/rappcgas.pas svneol=native#text/plain
-compiler/powerpc64/rgcpu.pas svneol=native#text/plain
 compiler/powerpc64/rppccon.inc svneol=native#text/plain
 compiler/powerpc64/rppccon.inc svneol=native#text/plain
 compiler/powerpc64/rppcdwrf.inc svneol=native#text/plain
 compiler/powerpc64/rppcdwrf.inc svneol=native#text/plain
 compiler/powerpc64/rppcgas.inc svneol=native#text/plain
 compiler/powerpc64/rppcgas.inc svneol=native#text/plain
@@ -383,6 +381,7 @@ compiler/ppcgen/ngppcadd.pas svneol=native#text/plain
 compiler/ppcgen/ngppccnv.pas svneol=native#text/plain
 compiler/ppcgen/ngppccnv.pas svneol=native#text/plain
 compiler/ppcgen/ngppcinl.pas svneol=native#text/plain
 compiler/ppcgen/ngppcinl.pas svneol=native#text/plain
 compiler/ppcgen/ngppcset.pas svneol=native#text/plain
 compiler/ppcgen/ngppcset.pas svneol=native#text/plain
+compiler/ppcgen/rgcpu.pas svneol=native#text/plain
 compiler/ppcppc.lpi svneol=native#text/plain
 compiler/ppcppc.lpi svneol=native#text/plain
 compiler/ppcsparc.lpi svneol=native#text/plain
 compiler/ppcsparc.lpi svneol=native#text/plain
 compiler/ppheap.pas svneol=native#text/plain
 compiler/ppheap.pas svneol=native#text/plain
@@ -8097,6 +8096,7 @@ tests/webtbs/tw8465.pp svneol=native#text/plain
 tests/webtbs/tw8513.pp svneol=native#text/plain
 tests/webtbs/tw8513.pp svneol=native#text/plain
 tests/webtbs/tw8573.pp svneol=native#text/plain
 tests/webtbs/tw8573.pp svneol=native#text/plain
 tests/webtbs/tw8615.pp svneol=native#text/plain
 tests/webtbs/tw8615.pp svneol=native#text/plain
+tests/webtbs/tw8633.pp svneol=native#text/plain
 tests/webtbs/tw8660.pp svneol=native#text/plain
 tests/webtbs/tw8660.pp svneol=native#text/plain
 tests/webtbs/tw8664.pp svneol=native#text/plain
 tests/webtbs/tw8664.pp svneol=native#text/plain
 tests/webtbs/tw8685.pp svneol=native#text/plain
 tests/webtbs/tw8685.pp svneol=native#text/plain

+ 1 - 1
compiler/powerpc/cpubase.pas

@@ -58,7 +58,7 @@ uses
         a_fsel, a_fsel_, a_fsqrt, a_fsqrt_, a_fsqrts, a_fsqrts_, a_fsub, a_fsub_,
         a_fsel, a_fsel_, a_fsqrt, a_fsqrt_, a_fsqrts, a_fsqrts_, a_fsub, a_fsub_,
         a_fsubs, a_fsubs_, a_icbi, a_isync, a_lbz, a_lbzu, a_lbzux, a_lbzx,
         a_fsubs, a_fsubs_, a_icbi, a_isync, a_lbz, a_lbzu, a_lbzux, a_lbzx,
         a_lfd, a_lfdu, a_lfdux, a_lfdx, a_lfs, a_lfsu, a_lfsux, a_lfsx, a_lha,
         a_lfd, a_lfdu, a_lfdux, a_lfdx, a_lfs, a_lfsu, a_lfsux, a_lfsx, a_lha,
-        a_lhau, a_lhaux, a_lhax, a_hbrx, a_lhz, a_lhzu, a_lhzux, a_lhzx, a_lmw,
+        a_lhau, a_lhaux, a_lhax, a_lhbrx, a_lhz, a_lhzu, a_lhzux, a_lhzx, a_lmw,
         a_lswi, a_lswx, a_lwarx, a_lwbrx, a_lwz, a_lwzu, a_lwzux, a_lwzx, a_mcrf,
         a_lswi, a_lswx, a_lwarx, a_lwbrx, a_lwz, a_lwzu, a_lwzux, a_lwzx, a_mcrf,
         a_mcrfs, a_mcrxr, a_mfcr, a_mffs, a_mffs_, a_mfmsr, a_mfspr, a_mfsr,
         a_mcrfs, a_mcrxr, a_mfcr, a_mffs, a_mffs_, a_mfmsr, a_mfspr, a_mfsr,
         a_mfsrin, a_mftb, a_mtcrf, a_mtfsb0, a_mtfsb1, a_mtfsf, a_mtfsf_,
         a_mfsrin, a_mftb, a_mtcrf, a_mtfsb0, a_mtfsb1, a_mtfsf, a_mtfsf_,

+ 1 - 1
compiler/powerpc/itcpugas.pas

@@ -49,7 +49,7 @@ interface
         'fsel','fsel.','fsqrt','fsqrt.','fsqrts','fsqrts.','fsub','fsub.',
         'fsel','fsel.','fsqrt','fsqrt.','fsqrts','fsqrts.','fsub','fsub.',
         'fsubs','fsubs.','icbi','isync','lbz','lbzu','lbzux','lbzx',
         'fsubs','fsubs.','icbi','isync','lbz','lbzu','lbzux','lbzx',
         'lfd','lfdu','lfdux','lfdx','lfs','lfsu','lfsux','lfsx','lha',
         'lfd','lfdu','lfdux','lfdx','lfs','lfsu','lfsux','lfsx','lha',
-        'lhau','lhaux','lhax','hbrx','lhz','lhzu','lhzux','lhzx','lmw',
+        'lhau','lhaux','lhax','lhbrx','lhz','lhzu','lhzux','lhzx','lmw',
         'lswi','lswx','lwarx','lwbrx','lwz','lwzu','lwzux','lwzx','mcrf',
         'lswi','lswx','lwarx','lwbrx','lwz','lwzu','lwzux','lwzx','mcrf',
         'mcrfs','mcrxr','mfcr','mffs','mffs.','mfmsr','mfspr','mfsr',
         'mcrfs','mcrxr','mfcr','mffs','mffs.','mfmsr','mfspr','mfsr',
         'mfsrin','mftb','mtcrf','mtfsb0','mtfsb1','mtfsf','mtfsf.',
         'mfsrin','mftb','mtcrf','mtfsb0','mtfsb1','mtfsf','mtfsf.',

+ 0 - 130
compiler/powerpc/rgcpu.pas

@@ -1,130 +0,0 @@
-{
-    Copyright (c) 1998-2002 by Florian Klaempfl
-
-    This unit implements the powerpc specific class for the register
-    allocator
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-
-unit rgcpu;
-
-{$i fpcdefs.inc}
-
-  interface
-
-     uses
-       aasmbase,aasmtai,aasmdata,
-       cpubase,
-       rgobj;
-
-     type
-       trgcpu = class(trgobj)
-{
-         function getcpuregisterint(list: TAsmList; reg: Tnewregister): tregister; override;
-         procedure ungetregisterint(list: TAsmList; reg: tregister); override;
-         function getcpuregisterfpu(list : TAsmList; r : Toldregister) : tregister;override;
-         procedure ungetregisterfpu(list: TAsmList; r : tregister; size:TCGsize);override;
-         procedure cleartempgen; override;
-        private
-         usedpararegs: Tsupregset;
-         usedparafpuregs: tregisterset;
-}
-       end;
-
-  implementation
-
-    uses
-      cgobj, verbose, cutils;
-
-(*
-    function trgcpu.getcpuregisterint(list: TAsmList; reg: Tnewregister): tregister;
-
-      begin
-        if ((reg shr 8) in [RS_R0]) and
-           not((reg shr 8) in is_reg_var_int) then
-          begin
-            if (reg shr 8) in usedpararegs then
-              internalerror(2003060701);
-{              comment(v_warning,'Double allocation of register '+tostr((reg shr 8)-1));}
-            include(usedpararegs,reg shr 8);
-            result.enum:=R_INTREGISTER;
-            result.number:=reg;
-            cg.a_reg_alloc(list,result);
-          end
-        else result := inherited getcpuregisterint(list,reg);
-      end;
-
-
-    procedure trgcpu.ungetregisterint(list: TAsmList; reg: tregister);
-
-      begin
-        if ((reg.number shr 8) in [RS_R0]) and
-            not((reg.number shr 8) in is_reg_var_int) then
-          begin
-            if not((reg.number shr 8) in usedpararegs) then
-              internalerror(2003060702);
-{               comment(v_warning,'Double free of register '+tostr((reg.number shr 8)-1));}
-            exclude(usedpararegs,reg.number shr 8);
-            cg.a_reg_dealloc(list,reg);
-          end
-        else
-          inherited ungetregisterint(list,reg);
-      end;
-
-
-    function trgcpu.getcpuregisterfpu(list : TAsmList; r : Toldregister) : tregister;
-      begin
-        if (r in [R_F1..R_F13]) and
-           not is_reg_var_other[r] then
-          begin
-            if r in usedparafpuregs then
-              internalerror(2003060902);
-            include(usedparafpuregs,r);
-            result.enum := r;
-            cg.a_reg_alloc(list,result);
-          end
-        else
-          result := inherited getcpuregisterfpu(list,r);
-      end;
-
-
-    procedure trgcpu.ungetregisterfpu(list: TAsmList; r : tregister; size:TCGsize);
-      begin
-        if (r.enum in [R_F1..R_F13]) and
-           not is_reg_var_other[r.enum] then
-          begin
-            if not(r.enum in usedparafpuregs) then
-              internalerror(2003060903);
-            exclude(usedparafpuregs,r.enum);
-            cg.a_reg_dealloc(list,r);
-          end
-        else
-          inherited ungetregisterfpu(list,r,size);
-      end;
-
-
-    procedure trgcpu.cleartempgen;
-
-      begin
-        inherited cleartempgen;
-        usedpararegs := [];
-        usedparafpuregs := [];
-      end;
-*)
-
-end.

+ 1 - 1
compiler/powerpc64/cpubase.pas

@@ -58,7 +58,7 @@ type
     a_fsel, a_fsel_, a_fsqrt, a_fsqrt_, a_fsqrts, a_fsqrts_, a_fsub, a_fsub_,
     a_fsel, a_fsel_, a_fsqrt, a_fsqrt_, a_fsqrts, a_fsqrts_, a_fsub, a_fsub_,
     a_fsubs, a_fsubs_, a_icbi, a_isync, a_lbz, a_lbzu, a_lbzux, a_lbzx,
     a_fsubs, a_fsubs_, a_icbi, a_isync, a_lbz, a_lbzu, a_lbzux, a_lbzx,
     a_lfd, a_lfdu, a_lfdux, a_lfdx, a_lfs, a_lfsu, a_lfsux, a_lfsx, a_lha,
     a_lfd, a_lfdu, a_lfdux, a_lfdx, a_lfs, a_lfsu, a_lfsux, a_lfsx, a_lha,
-    a_lhau, a_lhaux, a_lhax, a_hbrx, a_lhz, a_lhzu, a_lhzux, a_lhzx, a_lmw,
+    a_lhau, a_lhaux, a_lhax, a_lhbrx, a_lhz, a_lhzu, a_lhzux, a_lhzx, a_lmw,
     a_lswi, a_lswx, a_lwarx, a_lwbrx, a_lwz, a_lwzu, a_lwzux, a_lwzx, a_mcrf,
     a_lswi, a_lswx, a_lwarx, a_lwbrx, a_lwz, a_lwzu, a_lwzux, a_lwzx, a_mcrf,
     a_mcrfs, a_mcrxr, a_mfcr, a_mffs, a_mffs_, a_mfmsr, a_mfspr, a_mfsr,
     a_mcrfs, a_mcrxr, a_mfcr, a_mffs, a_mffs_, a_mfmsr, a_mfspr, a_mfsr,
     a_mfsrin, a_mftb, a_mtcrf, a_mtfsb0, a_mtfsb1, a_mtfsf, a_mtfsf_,
     a_mfsrin, a_mftb, a_mtcrf, a_mtfsb0, a_mtfsb1, a_mtfsf, a_mtfsf_,

+ 1 - 1
compiler/powerpc64/itcpugas.pas

@@ -50,7 +50,7 @@ const
     'fsel', 'fsel.', 'fsqrt', 'fsqrt.', 'fsqrts', 'fsqrts.', 'fsub', 'fsub.',
     'fsel', 'fsel.', 'fsqrt', 'fsqrt.', 'fsqrts', 'fsqrts.', 'fsub', 'fsub.',
     'fsubs', 'fsubs.', 'icbi', 'isync', 'lbz', 'lbzu', 'lbzux', 'lbzx',
     'fsubs', 'fsubs.', 'icbi', 'isync', 'lbz', 'lbzu', 'lbzux', 'lbzx',
     'lfd', 'lfdu', 'lfdux', 'lfdx', 'lfs', 'lfsu', 'lfsux', 'lfsx', 'lha',
     'lfd', 'lfdu', 'lfdux', 'lfdx', 'lfs', 'lfsu', 'lfsux', 'lfsx', 'lha',
-    'lhau', 'lhaux', 'lhax', 'hbrx', 'lhz', 'lhzu', 'lhzux', 'lhzx', 'lmw',
+    'lhau', 'lhaux', 'lhax', 'lhbrx', 'lhz', 'lhzu', 'lhzux', 'lhzx', 'lmw',
     'lswi', 'lswx', 'lwarx', 'lwbrx', 'lwz', 'lwzu', 'lwzux', 'lwzx', 'mcrf',
     'lswi', 'lswx', 'lwarx', 'lwbrx', 'lwz', 'lwzu', 'lwzux', 'lwzx', 'mcrf',
     'mcrfs', 'mcrxr', 'mfcr', 'mffs', 'mffs.', 'mfmsr', 'mfspr', 'mfsr',
     'mcrfs', 'mcrxr', 'mfcr', 'mffs', 'mffs.', 'mfmsr', 'mfspr', 'mfsr',
     'mfsrin', 'mftb', 'mtcrf', 'mtfsb0', 'mtfsb1', 'mtfsf', 'mtfsf.',
     'mfsrin', 'mftb', 'mtcrf', 'mtfsb0', 'mtfsb1', 'mtfsf', 'mtfsf.',

+ 0 - 46
compiler/powerpc64/rgcpu.pas

@@ -1,46 +0,0 @@
-{
-    Copyright (c) 1998-2002 by Florian Klaempfl
-
-    This unit implements the powerpc specific class for the register
-    allocator
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
- ****************************************************************************
-}
-
-unit rgcpu;
-
-{$I fpcdefs.inc}
-
-interface
-
-uses
-  aasmbase, aasmtai,aasmdata,
-  cpubase,
-  rgobj;
-
-type
-  trgcpu = class(trgobj)
-  end;
-
-implementation
-
-uses
-  cgobj, verbose, cutils;
-
-
-end.
-

+ 127 - 0
compiler/ppcgen/rgcpu.pas

@@ -0,0 +1,127 @@
+{
+    Copyright (c) 1998-2002 by Florian Klaempfl
+
+    This unit implements the powerpc specific class for the register
+    allocator
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+
+unit rgcpu;
+
+{$i fpcdefs.inc}
+
+  interface
+
+     uses
+       aasmbase,aasmtai,aasmdata,aasmcpu,
+       cgbase,cgutils,
+       cpubase,
+       rgobj;
+
+     type
+       trgcpu = class(trgobj)
+         procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
+         procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
+       end;
+
+  implementation
+
+    uses
+      verbose, cutils,
+      cgobj,
+      procinfo;
+
+
+    procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
+      var
+        tmpref : treference;
+        helplist : TAsmList;
+        l : tasmlabel;
+        hreg : tregister;
+      begin
+        if (spilltemp.offset<low(smallint)) or
+           (spilltemp.offset>high(smallint)) then
+          begin
+            helplist:=TAsmList.create;
+
+            if (spilltemp.index<>NR_NO) then
+              internalerror(200704201);
+
+            if getregtype(tempreg)=R_INTREGISTER then
+              hreg:=getregisterinline(helplist,R_SUBWHOLE)
+            else
+              hreg:=cg.getintregister(helplist,OS_ADDR);
+            reference_reset(tmpref);
+            tmpref.offset:=spilltemp.offset;
+            tmpref.refaddr:=addr_hi;
+            helplist.concat(taicpu.op_reg_reg_ref(A_ADDIS,hreg,spilltemp.base,tmpref));
+            tmpref:=spilltemp;
+            tmpref.refaddr:=addr_lo;
+            tmpref.base:=hreg;
+            helplist.concat(spilling_create_load(tmpref,tempreg));
+
+            if getregtype(tempreg)=R_INTREGISTER then
+              ungetregisterinline(helplist,hreg);
+
+            list.insertlistafter(pos,helplist);
+            helplist.free;
+          end
+        else
+          inherited do_spill_read(list,pos,spilltemp,tempreg);
+      end;
+
+
+    procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
+      var
+        tmpref : treference;
+        helplist : TAsmList;
+        l : tasmlabel;
+        hreg : tregister;
+      begin
+        if (spilltemp.offset<low(smallint)) or
+           (spilltemp.offset>high(smallint)) then
+          begin
+            helplist:=TAsmList.create;
+
+            if (spilltemp.index<>NR_NO) then
+              internalerror(200704201);
+
+            if getregtype(tempreg)=R_INTREGISTER then
+              hreg:=getregisterinline(helplist,R_SUBWHOLE)
+            else
+              hreg:=cg.getintregister(helplist,OS_ADDR);
+            reference_reset(tmpref);
+            tmpref.offset:=spilltemp.offset;
+            tmpref.refaddr:=addr_hi;
+            helplist.concat(taicpu.op_reg_reg_ref(A_ADDIS,hreg,spilltemp.base,tmpref));
+            tmpref:=spilltemp;
+            tmpref.refaddr:=addr_lo;
+            tmpref.base:=hreg;
+            helplist.concat(spilling_create_store(tempreg,tmpref));
+
+            if getregtype(tempreg)=R_INTREGISTER then
+              ungetregisterinline(helplist,hreg);
+
+            list.insertlistafter(pos,helplist);
+            helplist.free;
+          end
+        else
+          inherited do_spill_written(list,pos,spilltemp,tempreg);
+      end;
+
+end.

+ 7 - 1
packages/extra/gtk2/gtkglext/gdkglext.pas

@@ -32,7 +32,13 @@ uses Glib2, Gdk2;
 const
 const
   GdkGLExtLib = 
   GdkGLExtLib = 
     {$ifdef WIN32} 'libgdkglext-win32-1.0-0.dll'
     {$ifdef WIN32} 'libgdkglext-win32-1.0-0.dll'
-    {$else}        'libgdkglext-x11-1.0.so'
+    {$else}        
+      {$ifdef DARWIN}
+        'gdkglext-x11-1.0'
+        {$linklib gdkglext-x11-1.0}
+      {$else}
+        'libgdkglext-x11-1.0.so'
+      {$endif}
     {$endif};
     {$endif};
 
 
 type
 type

+ 7 - 1
packages/extra/gtk2/gtkglext/gtkglext.pas

@@ -32,7 +32,13 @@ uses Glib2, Gdk2, Gtk2, GdkGLExt;
 const
 const
   GtkGLExtLib = 
   GtkGLExtLib = 
     {$ifdef WIN32} 'libgtkglext-win32-1.0-0.dll'
     {$ifdef WIN32} 'libgtkglext-win32-1.0-0.dll'
-    {$else}        'libgtkglext-x11-1.0.so'
+    {$else}        
+      {$ifdef DARWIN}
+        'gtkglext-x11-1.0'
+        {$linklib gtkglext-x11-1.0}
+      {$else}
+        'libgtkglext-x11-1.0.so'
+      {$endif}
     {$endif};
     {$endif};
 
 
 { gtkglext does not (for now) define any objects ("objects" in the glib sense),
 { gtkglext does not (for now) define any objects ("objects" in the glib sense),

+ 46 - 0
tests/webtbs/tw8633.pp

@@ -0,0 +1,46 @@
+{ %norun }
+
+{$MODE objfpc}
+unit tw8633;
+interface
+
+function dorm2r_(var side: Char; var trans: Char; var m: Integer; var n: Integer; var k: Integer; var a: Double; var lda: Integer; var tau: Double; var c__: Double; var ldc: Integer; var work: Double; var info: Integer; side_len: Integer; trans_len: Integer): Integer; cdecl; external;
+function dormqr_(var side: Char; var trans: Char; var m: Integer; var n: Integer; var k: Integer; var a: Double; var lda: Integer; var tau: Double; var c__: Double; var ldc: Integer; var work: Double; var lwork: Integer; var info: Integer; side_len: Integer; trans_len: Integer): Integer; cdecl;
+
+implementation
+
+uses SysUtils, Math;
+
+function ILAENV(ispec: Integer; name__: string; opts: string;
+                 n1: Integer; n2: Integer; n3: Integer; n4: Integer): Integer;
+begin
+  Result := 0; 
+end;
+
+function dormqr_(var side: Char; var trans: Char; var m: Integer; var n: Integer; var k: Integer; var a: Double; var lda: Integer; var tau: Double; var c__: Double; var ldc: Integer; var work: Double; var lwork: Integer; var info: Integer; side_len: Integer; trans_len: Integer): Integer; cdecl;
+var
+  iinfo, iws, ldwork,
+  lwkopt, nb, nbmin, nw: Integer;
+  T: array [1..65*64] of Double;
+begin
+
+      NBMIN := 2;
+      LDWORK := NW;
+      IF ( NB > 1 ) and ( NB < K ) THEN BEGIN
+         IWS := NW*NB;
+         IF LWORK < IWS THEN BEGIN
+            NB := LWORK div LDWORK;
+            NBMIN := MAX( 2, ILAENV( 2, 'DORMQR', SIDE + TRANS, M, N, K,-1 ) );
+         END;
+      END ELSE
+         IWS := NW;
+
+      IF( NB < NBMIN ) or  ( NB >= K ) THEN
+       dorm2r_( SIDE, TRANS, M, N, K, A, LDA, TAU, c__, LDC, WORK, IINFO, side_len, trans_len );
+      WORK := LWKOPT;
+end;
+
+end.
+
+
+