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@@ -0,0 +1,130 @@
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+unit allwinner_a20;
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+
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+{$goto on}
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+
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+ interface
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+
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+ const
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+ SRAM_A1_Base = $00000000;
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+ SRAM_A2_Base = $00004000;
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+ SRAM_A3_Base = $00008000;
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+ SRAM_A4_Base = $0000B400;
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+ SRAM_D_Base = $00010000;
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+ SRAM_B_Secure_Base = $00020000;
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+ SRAM_Controller_Base = $01C00000;
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+ DRAM_Controller_Base = $01C01000;
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+ DMA_Base = $01C02000;
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+ NAND_Flash_Base = $01C03000;
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+ Transport_Stream_Base = $01C04000;
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+ SPI_0_Base = $01C05000;
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+ SPI_1_Base = $01C06000;
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+ Memory_Stick_Base = $01C07000;
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+ TVD_Base = $01C08000;
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+ CSI_0_Base = $01C09000;
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+ TVE_0_Base = $01C0A000;
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+ EMAC_Base = $01C0B000;
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+ LCD_0_Base = $01C0C000;
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+ LCD_1_Base = $01C0D000;
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+ Video_Engine_Base = $01C0E000;
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+ SD_MMC_0_Base = $01C0F000;
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+ SD_MMC_1_Base = $01C10000;
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+ SD_MMC_2_Base = $01C11000;
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+ SD_MMC_3_Base = $01C12000;
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+ USB_0_Base = $01C13000;
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+ USB_1_Base = $01C14000;
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+ Security_System_Base = $01C15000;
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+ HDMI_Base = $01C16000;
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+ SPI_2_Base = $01C17000;
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+ SATA_Base = $01C18000;
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+ PATA_Base = $01C19000;
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+ ACE_Base = $01C1A000;
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+ TVE_1_Base = $01C1B000;
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+ USB_2_Base = $01C1C000;
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+ CSI_1_Base = $01C1D000;
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+ SPI3_Base = $01C1F000;
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+ CCU_Base = $01C20000;
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+ Interrupt_Base = $01C20400;
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+ PIO_Base = $01C20800;
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+ Timer_Base = $01C20C00;
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+ SPDIF_Base = $01C21000;
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+ AC97_Base = $01C21400;
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+ IR0_Base = $01C21800;
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+ IR_1_Base = $01C21C00;
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+ IIS_1_Base = $01C22000;
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+ IIS_0_Base = $01C22400;
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+ LRADC_0_1_Base = $01C22800;
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+ AD_DA_Base = $01C22C00;
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+ Keypad_Base = $01C23000;
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+ SID_Base = $01C23800;
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+ SJTAG_Base = $01C23C00;
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+ IIS_2_Base = $01C24400;
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+ TP_Base = $01C25000;
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+ PMU_Base = $01C25400;
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+ CPU_Configuration_Base = $01C25C00;
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+ UART_0_Base = $01C28000;
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+ UART_1_Base = $01C28400;
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+ UART_2_Base = $01C28800;
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+ UART_3_Base = $01C28C00;
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+ UART_4_Base = $01C29000;
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+ UART_5_Base = $01C29400;
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+ UART_6_Base = $01C29800;
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+ UART_7_Base = $01C29C00;
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+ PS2_0_Base = $01C2A000;
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+ PS2_1_Base = $01C2A400;
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+ TWI_0_Base = $01C2AC00;
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+ TWI_1_Base = $01C2B000;
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+ TWI_2_Base = $01C2B400;
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+ TWI_3_Base = $01C2B800;
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+ CAN_Base = $01C2BC00;
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+ TWI_4_Base = $01C2C000;
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+ Smart_Card_Reader_Base = $01C2C400;
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+ GPS_Base = $01C30000;
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+ Mali400_Base = $01C40000;
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+ GMAC_Base = $01C50000;
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+ HSTIMER_Base = $01C60000;
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+ GIC_Registers_Base = $01C80000;
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+ HDMI1_Base = $01CE0000;
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+ CPUBIST_Base = $3F501000;
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+ SRAM_C_Base = $01D00000;
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+ DE_FE0_Base = $01E00000;
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+ DE_FE1_Base = $01E20000;
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+ DE_BE0_Base = $01E60000;
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+ DE_BE1_Base = $01E40000;
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+ MP_Base = $01E80000;
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+ AVG_Base = $01EA0000;
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+ CoreSight_Debug_Module_Base = $3F500000;
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+ DDR_Base = $40000000;
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+ BROM_Base = $FFFF0000;
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+
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+ implementation
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+
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+ procedure _FPC_haltproc; assembler; nostackframe; public name '_haltproc';
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+ asm
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+ .Lhalt:
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+ b .Lhalt
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+ end;
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+
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+{$ifndef CUSTOM_ENTRY}
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+ procedure PASCALMAIN; external name 'PASCALMAIN';
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+
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+ var
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+ _stack_top: record end; external name '_stack_top';
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+
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+ procedure _FPC_start; assembler; nostackframe;
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+ label
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+ _start;
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+ asm
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+ .init
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+ .align 16
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+ .globl _start
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+ _start:
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+ ldr r0,.L_stack_top
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+ bl PASCALMAIN
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+ bl _FPC_haltproc
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+ .L_stack_top:
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+ .long _stack_top
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+ .text
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+ end;
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+{$endif CUSTOM_ENTRY}
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+
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+end.
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