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* Fixed tMIPSELnotnode.second_boolean do handle QWordBool type correctly and deal with difference between Pascal and C booleans. Also improved it to produce code without macros. Fixes webtbs/tw20874 (and maybe something else).

git-svn-id: trunk@23345 -
sergei 12 éve
szülő
commit
d43c38633c
1 módosított fájl, 25 hozzáadás és 4 törlés
  1. 25 4
      compiler/mips/ncpumat.pas

+ 25 - 4
compiler/mips/ncpumat.pas

@@ -261,6 +261,7 @@ procedure tMIPSELnotnode.second_boolean;
 var
 var
   hl: tasmlabel;
   hl: tasmlabel;
   tmpreg : TRegister;
   tmpreg : TRegister;
+  r64: TRegister64;
 begin
 begin
   { if the location is LOC_JUMP, we do the secondpass after the
   { if the location is LOC_JUMP, we do the secondpass after the
           labels are allocated
           labels are allocated
@@ -287,11 +288,31 @@ begin
       end;
       end;
       LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_CREFERENCE:
       LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_CREFERENCE:
       begin
       begin
-        tmpreg := cg.GetIntRegister(current_asmdata.CurrAsmList, OS_INT);
         hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
         hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
-        current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SEQ, tmpreg, left.location.Register, NR_R0));
-        location_reset(location, LOC_REGISTER, OS_INT);
-        location.Register := tmpreg;
+        if is_64bit(resultdef) then
+          begin
+            r64.reglo:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
+            r64.reghi:=cg.GetIntRegister(current_asmdata.CurrAsmList,OS_INT);
+            { OR low and high parts together }
+            current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_OR,r64.reglo,left.location.register64.reglo,left.location.register64.reghi));
+            { x=0 <=> unsigned(x)<1 }
+            current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SLTIU,r64.reglo,r64.reglo,1));
+            cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,r64.reghi);
+            if not is_pasbool(resultdef) then
+              cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_S64,r64,r64);
+            location_reset(location,LOC_REGISTER,OS_64);
+            location.Register64:=r64;
+          end
+        else
+          begin
+            tmpreg := cg.GetIntRegister(current_asmdata.CurrAsmList, OS_INT);
+            { x=0 <=> unsigned(x)<1 }
+            current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SLTIU, tmpreg, left.location.Register, 1));
+            if not is_pasbool(resultdef) then
+              cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_S32,tmpreg,tmpreg);
+            location_reset(location, LOC_REGISTER, OS_INT);
+            location.Register := tmpreg;
+          end;
       end;
       end;
       else
       else
         internalerror(2003042401);
         internalerror(2003042401);