Просмотр исходного кода

For now completely disable (I)MUL/(I)DIV support for Coldfire and pass through the RTL routines
(of which the names had changed from FPC_MUL_LONGWORD->FPC_MUL_DWORD and FPC_MOD_CARDINAL->
FPC_MOD_DWORD).
Also disable the usage of FPU opcodes for Coldfire.

git-svn-id: trunk@22739 -

svenbarth 12 лет назад
Родитель
Сommit
d5523e6af6
4 измененных файлов с 18 добавлено и 10 удалено
  1. 5 5
      compiler/m68k/cgcpu.pas
  2. 5 5
      compiler/m68k/n68kmat.pas
  3. 6 0
      rtl/inc/systemh.inc
  4. 2 0
      rtl/linux/m68k/sighnd.inc

+ 5 - 5
compiler/m68k/cgcpu.pas

@@ -865,7 +865,7 @@ unit cgcpu;
               end;
           OP_IMUL :
               begin
-                if current_settings.cputype = cpu_MC68000 then
+                if current_settings.cputype<>cpu_MC68020 then
                    begin
                      r:=NR_D0;
                      r2:=NR_D1;
@@ -894,7 +894,7 @@ unit cgcpu;
               end;
           OP_MUL :
               begin
-                 if current_settings.cputype = cpu_MC68000 then
+                 if current_settings.cputype<>cpu_MC68020 then
                    begin
                      r:=NR_D0;
                      r2:=NR_D1;
@@ -902,7 +902,7 @@ unit cgcpu;
                      cg.getcpuregister(list,NR_D1);
                      list.concat(taicpu.op_const_reg(A_MOVE,S_L,a, r));
                      list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, r2));
-                     cg.a_call_name(list,'FPC_MUL_LONGWORD',false);
+                     cg.a_call_name(list,'FPC_MUL_DWORD',false);
                      list.concat(taicpu.op_reg_reg(A_MOVE,S_L,r, reg));
                      cg.ungetcpuregister(list,r);
                      cg.ungetcpuregister(list,r2);
@@ -1120,7 +1120,7 @@ unit cgcpu;
               begin
                  sign_extend(list, size,reg1);
                  sign_extend(list, size,reg2);
-                 if current_settings.cputype = cpu_MC68000 then
+                 if current_settings.cputype <> cpu_MC68020 then
                    begin
                      r:=NR_D0;
                      r2:=NR_D1;
@@ -1128,7 +1128,7 @@ unit cgcpu;
                      cg.getcpuregister(list,NR_D1);
                      list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1, r));
                      list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2, r2));
-                     cg.a_call_name(list,'FPC_MUL_LONGWORD',false);
+                     cg.a_call_name(list,'FPC_MUL_DWORD',false);
                      list.concat(taicpu.op_reg_reg(A_MOVE,S_L,r, reg2));
                      cg.ungetcpuregister(list,r);
                      cg.ungetcpuregister(list,r2);

+ 5 - 5
compiler/m68k/n68kmat.pas

@@ -145,7 +145,7 @@ implementation
      paraloc1 : tcgpara;
    begin
      { no RTL call, so inline a zero denominator verification }
-     if current_settings.cputype <> cpu_MC68000 then
+     if current_settings.cputype=cpu_MC68020 then
        begin
          { verify if denominator is zero }
          current_asmdata.getjumplabel(continuelabel);
@@ -165,7 +165,7 @@ implementation
        end
      else
        begin
-         { On MC68000/68010 mw must pass through RTL routines }
+         { On MC68000/68010/Coldfire we must pass through RTL routines }
          reg_d0:=NR_D0;
          cg.getcpuregister(current_asmdata.CurrAsmList,NR_D0);
          reg_d1:=NR_D1;
@@ -193,7 +193,7 @@ implementation
     begin
 //     writeln('emit mod reg reg');
      { no RTL call, so inline a zero denominator verification }
-     if current_settings.cputype <> cpu_MC68000 then
+     if current_settings.cputype=cpu_MC68020 then
        begin
          { verify if denominator is zero }
          current_asmdata.getjumplabel(continuelabel);
@@ -228,7 +228,7 @@ implementation
        end
      else
        begin
-         { On MC68000/68010 mw must pass through RTL routines }
+         { On MC68000/68010/coldfire we must pass through RTL routines }
          Reg_d0:=NR_D0;
          cg.getcpuregister(current_asmdata.CurrAsmList,NR_D0);
          Reg_d1:=NR_D1;
@@ -240,7 +240,7 @@ implementation
          if signed then
              cg.a_call_name(current_asmdata.CurrAsmList,'FPC_MOD_LONGINT',false)
          else
-             cg.a_call_name(current_asmdata.CurrAsmList,'FPC_MOD_CARDINAL',false);
+             cg.a_call_name(current_asmdata.CurrAsmList,'FPC_MOD_DWORD',false);
         cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,Reg_D0,denum);
         cg.ungetcpuregister(current_asmdata.CurrAsmList,Reg_D0);
         cg.ungetcpuregister(current_asmdata.CurrAsmList,Reg_D1);

+ 6 - 0
rtl/inc/systemh.inc

@@ -142,6 +142,12 @@ Type
 {$ifdef CPUM68K}
   {$define DEFAULT_DOUBLE}
 
+  {$ifdef CPUCOLDFIRE}
+    {$define FPC_INCLUDE_SOFTWARE_MOD_DIV}
+    {$define FPC_INCLUDE_SOFTWARE_MUL}
+    {$define FPC_INCLUDE_SOFTWARE_SHIFT_INT64}
+  {$endif}
+
   {$define SUPPORT_SINGLE}
   {$define SUPPORT_DOUBLE}
 

+ 2 - 0
rtl/linux/m68k/sighnd.inc

@@ -47,10 +47,12 @@ const
 
 Procedure ResetFPU;
 begin
+{$ifdef CPU68020}
   asm
     fmove.l fpucw,fpcr
     fmove.l fpust,fpsr
   end;
+{$endif}
 end;