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+ 2 - 2
compiler/Makefile

@@ -4671,7 +4671,7 @@ override DIFF:=$(CMP) -i218
 endif
 endif
 ifeq ($(OS_TARGET), darwin)
-CODESIGN?=$(strip $(wildcard $(addsuffix /codesign,$(SEARCHPATH))))
+CODESIGN?=$(firstword $(wildcard $(addsuffix /codesign$(SRCEXEEXT),$(SEARCHPATH))))
 endif
 ifneq ($(CYCLELEVEL),1)
 ifndef ALLOW_WARNINGS
@@ -4978,7 +4978,7 @@ ifneq ($(OS_TARGET),darwin)
 DIFFRESULT:=$(shell $(DIFF) $(OLDFPC) $(FPC))
 else
 ifneq ($(CODESIGN),)
-DIFFRESULT:=$(shell $(COPY) $(OLDFPC) $(OLDFPC).tmp; $(COPY) $(FPC) $(FPC).tmp; strip -no_uuid $(OLDFPC).tmp; strip -no_uuid $(FPC).tmp; $(CODESIGN) --remove-signature $(OLDFPC).tmp; codesign --remove-signature $(FPC).tmp; $(DIFF) $(OLDFPC).tmp $(FPC).tmp; $(RMPROG) $(OLDFPC).tmp $(FPC).tmp)
+DIFFRESULT:=$(shell $(COPY) $(OLDFPC) $(OLDFPC).tmp; $(COPY) $(FPC) $(FPC).tmp; strip -no_uuid $(OLDFPC).tmp; strip -no_uuid $(FPC).tmp; $(CODESIGN) --remove-signature $(OLDFPC).tmp; $(CODESIGN) --remove-signature $(FPC).tmp; $(DIFF) $(OLDFPC).tmp $(FPC).tmp; $(RMPROG) $(OLDFPC).tmp $(FPC).tmp)
 else
 DIFFRESULT:=$(shell $(COPY) $(OLDFPC) $(OLDFPC).tmp; $(COPY) $(FPC) $(FPC).tmp; strip -no_uuid $(OLDFPC).tmp; strip -no_uuid $(FPC).tmp; $(DIFF) $(OLDFPC).tmp $(FPC).tmp; $(RMPROG) $(OLDFPC).tmp $(FPC).tmp)
 endif

+ 2 - 2
compiler/Makefile.fpc

@@ -447,7 +447,7 @@ endif
 endif
 
 ifeq ($(OS_TARGET), darwin)
-CODESIGN?=$(strip $(wildcard $(addsuffix /codesign,$(SEARCHPATH))))
+CODESIGN?=$(firstword $(wildcard $(addsuffix /codesign$(SRCEXEEXT),$(SEARCHPATH))))
 endif
 
 # Use -Sew option by default
@@ -895,7 +895,7 @@ ifneq ($(OS_TARGET),darwin)
 DIFFRESULT:=$(shell $(DIFF) $(OLDFPC) $(FPC))
 else
 ifneq ($(CODESIGN),)
-DIFFRESULT:=$(shell $(COPY) $(OLDFPC) $(OLDFPC).tmp; $(COPY) $(FPC) $(FPC).tmp; strip -no_uuid $(OLDFPC).tmp; strip -no_uuid $(FPC).tmp; $(CODESIGN) --remove-signature $(OLDFPC).tmp; codesign --remove-signature $(FPC).tmp; $(DIFF) $(OLDFPC).tmp $(FPC).tmp; $(RMPROG) $(OLDFPC).tmp $(FPC).tmp)
+DIFFRESULT:=$(shell $(COPY) $(OLDFPC) $(OLDFPC).tmp; $(COPY) $(FPC) $(FPC).tmp; strip -no_uuid $(OLDFPC).tmp; strip -no_uuid $(FPC).tmp; $(CODESIGN) --remove-signature $(OLDFPC).tmp; $(CODESIGN) --remove-signature $(FPC).tmp; $(DIFF) $(OLDFPC).tmp $(FPC).tmp; $(RMPROG) $(OLDFPC).tmp $(FPC).tmp)
 else
 DIFFRESULT:=$(shell $(COPY) $(OLDFPC) $(OLDFPC).tmp; $(COPY) $(FPC) $(FPC).tmp; strip -no_uuid $(OLDFPC).tmp; strip -no_uuid $(FPC).tmp; $(DIFF) $(OLDFPC).tmp $(FPC).tmp; $(RMPROG) $(OLDFPC).tmp $(FPC).tmp)
 endif

+ 32 - 27
compiler/arm/aasmcpu.pas

@@ -189,6 +189,9 @@ uses
 
       pinsentry=^tinsentry;
 
+      taicpuflag = (cf_wideformat,cf_inIT,cf_lastinIT,cf_thumb);
+      taicpuflags = set of taicpuflag;
+
     const
       InsTab : array[0..instabentries-1] of TInsEntry={$i armtab.inc}
 
@@ -198,12 +201,12 @@ uses
     type
       taicpu = class(tai_cpu_abstract_sym)
          oppostfix : TOpPostfix;
-         wideformat : boolean;
          roundingmode : troundingmode;
+         flags : taicpuflags;
          procedure loadshifterop(opidx:longint;const so:tshifterop);
          procedure loadregset(opidx:longint; regsetregtype: tregistertype; regsetsubregtype: tsubregister; const s:tcpuregisterset; ausermode: boolean=false);
          procedure loadconditioncode(opidx:longint;const acond:tasmcond);
-         procedure loadmodeflags(opidx:longint;const flags:tcpumodeflags);
+         procedure loadmodeflags(opidx:longint;const _modeflags:tcpumodeflags);
          procedure loadspecialreg(opidx:longint;const areg:tregister; const aflags:tspecialregflags);
          procedure loadrealconst(opidx:longint;const _value:bestreal);
 
@@ -235,8 +238,8 @@ uses
          constructor op_cond(op: tasmop; cond: tasmcond);
 
          { CPSxx }
-         constructor op_modeflags(op: tasmop; flags: tcpumodeflags);
-         constructor op_modeflags_const(op: tasmop; flags: tcpumodeflags; a: aint);
+         constructor op_modeflags(op: tasmop; _modeflags: tcpumodeflags);
+         constructor op_modeflags_const(op: tasmop; _modeflags: tcpumodeflags; a: aint);
 
          { MSR }
          constructor op_specialreg_reg(op: tasmop; specialreg: tregister; specialregflags: tspecialregflags; _op2: tregister);
@@ -273,9 +276,6 @@ uses
          procedure ppubuildderefimploper(var o:toper);override;
          procedure ppuderefoper(var o:toper);override;
       private
-         { pass1 info }
-         inIT,
-         lastinIT: boolean;
          { arm version info }
          fArmVMask,
          fArmMask  : longint;
@@ -404,14 +404,14 @@ implementation
          end;
       end;
 
-    procedure taicpu.loadmodeflags(opidx: longint; const flags: tcpumodeflags);
+    procedure taicpu.loadmodeflags(opidx: longint; const _modeflags: tcpumodeflags);
       begin
         allocate_oper(opidx+1);
         with oper[opidx]^ do
          begin
            if typ<>top_modeflags then
              clearop(opidx);
-           modeflags:=flags;
+           modeflags:=_modeflags;
            typ:=top_modeflags;
          end;
       end;
@@ -585,18 +585,18 @@ implementation
         loadconditioncode(0, cond);
       end;
 
-    constructor taicpu.op_modeflags(op: tasmop; flags: tcpumodeflags);
+    constructor taicpu.op_modeflags(op: tasmop; _modeflags: tcpumodeflags);
       begin
         inherited create(op);
         ops := 1;
-        loadmodeflags(0,flags);
+        loadmodeflags(0,_modeflags);
       end;
 
-    constructor taicpu.op_modeflags_const(op: tasmop; flags: tcpumodeflags; a: aint);
+    constructor taicpu.op_modeflags_const(op: tasmop; _modeflags: tcpumodeflags; a: aint);
       begin
         inherited create(op);
         ops := 2;
-        loadmodeflags(0,flags);
+        loadmodeflags(0,_modeflags);
         loadconst(1,a);
       end;
 
@@ -1427,7 +1427,7 @@ implementation
                                        (taicpu(curtai).oper[1]^.reg >= NR_R8) or
                                        (op2reg >= NR_R8) then
                                       begin
-                                        taicpu(curtai).wideformat:=true;
+                                        include(taicpu(curtai).flags,cf_wideformat);
 
                                         { Handle special cases where register rules are violated by optimizer/user }
                                         { if d == 13 || (d == 15 && S == ‘0’) || n == 15 || m IN [13,15] then UNPREDICTABLE; }
@@ -1698,8 +1698,14 @@ implementation
                       end;
                     else
                       begin
-                        taicpu(curtai).inIT:=in_it;
-                        taicpu(curtai).lastinIT:=in_it and (it_count=1);
+                        if in_it then
+                          include(taicpu(curtai).flags,cf_inIT)
+                        else
+                          exclude(taicpu(curtai).flags,cf_inIT);
+                        if in_it and (it_count=1) then
+                          include(taicpu(curtai).flags,cf_lastinIT)
+                        else
+                          exclude(taicpu(curtai).flags,cf_lastinIT);
 
                         if in_it then
                           begin
@@ -2239,8 +2245,7 @@ implementation
       begin
         fArmVMask:=Masks[current_settings.cputype] or FPUMasks[current_settings.fputype];
 
-        if objdata.ThumbFunc then
-        //if current_settings.instructionset=is_thumb then
+        if cf_thumb in flags then
           begin
             fArmMask:=IF_THUMB;
             if CPUARM_HAS_THUMB2 in cpu_capabilities[current_settings.cputype] then
@@ -2496,7 +2501,7 @@ implementation
           end;
 
         { Check wideformat flag }
-        if wideformat and ((p^.flags and IF_WIDE)=0) then
+        if (cf_wideformat in flags) and ((p^.flags and IF_WIDE)=0) then
           begin
             matches:=0;
             exit;
@@ -2594,8 +2599,8 @@ implementation
         begin
           if (p^.code[0]=#$60) and
              (GenerateThumb2Code and
-              ((not inIT) and (oppostfix<>PF_S)) or
-              (inIT and (condition=C_None))) then
+              ((not(cf_inIT in flags)) and (oppostfix<>PF_S)) or
+              ((cf_inIT in flags) and (condition=C_None))) then
             begin
               Matches:=0;
               exit;
@@ -2609,10 +2614,10 @@ implementation
         end
       else if p^.code[0]=#$62 then
         begin
-          if (GenerateThumb2Code and
-              (condition<>C_None) and
-              (not inIT) and
-              (not lastinIT)) then
+          if GenerateThumb2Code and
+            (condition<>C_None) and
+            (not(cf_inIT in flags)) and
+            (not(cf_lastinIT in flags)) then
             begin
               Matches:=0;
               exit;
@@ -2620,7 +2625,7 @@ implementation
         end
       else if p^.code[0]=#$63 then
         begin
-          if inIT then
+          if cf_inIT in flags then
             begin
               Matches:=0;
               exit;
@@ -2641,7 +2646,7 @@ implementation
         end
       else if p^.code[0]=#$6B then
         begin
-          if inIT or
+          if (cf_inIT in flags) or
              (oppostfix<>PF_S) then
             begin
               Matches:=0;

+ 13 - 6
compiler/arm/agarmgas.pas

@@ -371,7 +371,7 @@ unit agarmgas;
 
     Procedure TArmInstrWriter.WriteInstruction(hp : tai);
     var op: TAsmOp;
-        postfix,s: string;
+        postfix,s,oppostfixstr: string;
         i: byte;
         sep: string[3];
     begin
@@ -379,20 +379,27 @@ unit agarmgas;
       postfix:='';
       if GenerateThumb2Code then
         begin
-          if taicpu(hp).wideformat then
+          if cf_wideformat in taicpu(hp).flags then
             postfix:='.w';
         end;
+      { GNU AS does not like an S postfix for several instructions in thumb mode though it is the only
+        valid encoding of mvn in thumb mode according to the arm docs }
+      if GenerateThumbCode and (taicpu(hp).oppostfix=PF_S) and
+        ((op=A_MVN) or (op=A_ORR) or (op=A_AND) or (op=A_LSL) or (op=A_ADC) or (op=A_LSR) or (op=A_SBC) or (op=A_EOR) or (op=A_ROR)) then
+        oppostfixstr:=''
+      else
+        oppostfixstr:=oppostfix2str[taicpu(hp).oppostfix];
       if unified_syntax then
         begin
           if taicpu(hp).ops = 0 then
-            s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix]
+            s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfixstr
           else if taicpu(hp).oppostfix in [PF_8..PF_U32F64] then
-            s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix]
+            s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfixstr
           else
-            s:=#9+gas_op2str[op]+oppostfix2str[taicpu(hp).oppostfix]+cond2str[taicpu(hp).condition]+postfix; // Conditional infixes are deprecated in unified syntax
+            s:=#9+gas_op2str[op]+oppostfixstr+cond2str[taicpu(hp).condition]+postfix; // Conditional infixes are deprecated in unified syntax
         end
       else
-        s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix];
+        s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfixstr;
       if taicpu(hp).ops<>0 then
         begin
           sep:=#9;

+ 4 - 4
compiler/arm/armins.dat

@@ -215,7 +215,7 @@ reg32                    \3\x01\x2F\xFF\x10            ARM32,ARMv4T
 reg8,reg8                \300\1\x10\101                ARM32,ARMv4
 
 [CMNcc]
-reglo,reglo             \x6B\x42\xC0                     THUMB,ARMv4T
+reglo,reglo             \x6F\x42\xC0                     THUMB,ARMv4T
 
 reg32,immshifter        \x80\xF1\x10\x0F\x00             THUMB32,ARMv6T2
 reg32,reg32             \x80\xEB\x10\x0F\x00             THUMB32,WIDE,ARMv6T2
@@ -226,10 +226,10 @@ reg32,reg32,shifterop   \xE\x1\x60                       ARM32,ARMv4
 reg32,immshifter        \xF\x1\x60                       ARM32,ARMv4
 
 [CMPcc]
-reglo,reglo             \x6B\x42\x80                     THUMB,ARMv4T
+reglo,reglo             \x6F\x42\x80                     THUMB,ARMv4T
 reg32,reg32             \x61\x45\x0                      THUMB,ARMv4T
 
-reglo,immshifter        \x6B\x28\x0                      THUMB,ARMv4T
+reglo,immshifter        \x6F\x28\x0                      THUMB,ARMv4T
 
 reg32,immshifter         \x80\xF1\xB0\x0F\x00           THUMB32,WIDE,ARMv6T2
 reg32,reg32              \x80\xEB\xB0\x0F\x00           THUMB32,WIDE,ARMv6T2
@@ -612,7 +612,7 @@ reg32,reg32,shifterop \xE\x1\x20                     ARM32,ARMv4
 reg32,immshifter      \xF\x3\x20                     ARM32,ARMv4
 
 [TSTcc]
-reglo,reglo           \x6B\x42\x00                   THUMB,ARMv4T
+reglo,reglo           \x6F\x42\x00                   THUMB,ARMv4T
 
 reg32,immshifter      \x80\xF0\x10\x0F\x00           THUMB32,ARMv6T2
 reg32,reg32           \x80\xEA\x10\x0F\x00           THUMB32,WIDE,ARMv6T2

+ 4 - 4
compiler/arm/armtab.inc

@@ -592,7 +592,7 @@
     opcode  : A_CMN;
     ops     : 2;
     optypes : (ot_reglo,ot_reglo,ot_none,ot_none,ot_none,ot_none);
-    code    : #107#66#192;
+    code    : #111#66#192;
     flags   : if_thumb or if_armv4t
   ),
   (
@@ -641,7 +641,7 @@
     opcode  : A_CMP;
     ops     : 2;
     optypes : (ot_reglo,ot_reglo,ot_none,ot_none,ot_none,ot_none);
-    code    : #107#66#128;
+    code    : #111#66#128;
     flags   : if_thumb or if_armv4t
   ),
   (
@@ -655,7 +655,7 @@
     opcode  : A_CMP;
     ops     : 2;
     optypes : (ot_reglo,ot_immediateshifter,ot_none,ot_none,ot_none,ot_none);
-    code    : #107#40#0;
+    code    : #111#40#0;
     flags   : if_thumb or if_armv4t
   ),
   (
@@ -2328,7 +2328,7 @@
     opcode  : A_TST;
     ops     : 2;
     optypes : (ot_reglo,ot_reglo,ot_none,ot_none,ot_none,ot_none);
-    code    : #107#66#0;
+    code    : #111#66#0;
     flags   : if_thumb or if_armv4t
   ),
   (

+ 125 - 111
compiler/arm/cgcpu.pas

@@ -44,6 +44,7 @@ unit cgcpu;
         procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
        protected
          procedure a_load_ref_cgparalocref(list: TAsmList; sourcesize: tcgsize; sizeleft: tcgint; const ref, paralocref: treference; const cgpara: tcgpara; const location: PCGParaLocation); override;
+         procedure init_mmregister_allocator;
        public
         procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
 
@@ -297,19 +298,8 @@ unit cgcpu;
         if FPUARM_HAS_FPA in fpu_capabilities[current_settings.fputype] then
           rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE,
             [RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7],first_fpu_imreg,[]);
-        { The register allocator currently cannot deal with multiple
-          non-overlapping subregs per register, so we can only use
-          half the single precision registers for now (as sub registers of the
-          double precision ones). }
-        if FPUARM_HAS_32REGS in fpu_capabilities[current_settings.fputype] then
-          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
-              [RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
-               RS_D16,RS_D17,RS_D18,RS_D19,RS_D20,RS_D21,RS_D22,RS_D23,RS_D24,RS_D25,RS_D26,RS_D27,RS_D28,RS_D29,RS_D30,RS_D31,
-               RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15
-              ],first_mm_imreg,[])
-        else if FPUARM_HAS_VFP_EXTENSION in fpu_capabilities[current_settings.fputype] then
-          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
-              [RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15],first_mm_imreg,[]);
+
+        init_mmregister_allocator;
       end;
 
 
@@ -589,6 +579,33 @@ unit cgcpu;
       end;
 
 
+    procedure tbasecgarm.init_mmregister_allocator;
+      begin
+        { The register allocator currently cannot deal with multiple
+          non-overlapping subregs per register, so we can only use
+          half the single precision registers for now (as sub registers of the
+          double precision ones). }
+        if (FPUARM_HAS_32REGS in fpu_capabilities[current_settings.fputype]) and
+          (FPUARM_HAS_VFP_DOUBLE in fpu_capabilities[current_settings.fputype]) then
+          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
+              [RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
+               RS_D16,RS_D17,RS_D18,RS_D19,RS_D20,RS_D21,RS_D22,RS_D23,RS_D24,RS_D25,RS_D26,RS_D27,RS_D28,RS_D29,RS_D30,RS_D31,
+               RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15
+              ],first_mm_imreg,[])
+        else if (FPUARM_HAS_32REGS in fpu_capabilities[current_settings.fputype]) then
+          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFS,
+              [RS_S0,RS_S1,RS_S2,RS_S3,RS_S4,RS_S5,RS_S6,RS_S7,
+               RS_S16,RS_S17,RS_S18,RS_S19,RS_S20,RS_S21,RS_S22,RS_S23,RS_S24,RS_S25,RS_S26,RS_S27,RS_S28,RS_S29,RS_S30,RS_S31,
+               RS_S8,RS_S9,RS_S10,RS_S11,RS_S12,RS_S13,RS_S14,RS_S15
+              ],first_mm_imreg,[])
+        else if FPUARM_HAS_VFP_EXTENSION in fpu_capabilities[current_settings.fputype] then
+          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
+              [RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
+               RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15
+              ],first_mm_imreg,[]);
+      end;
+
+
     procedure tbasecgarm.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
       var
         ref: treference;
@@ -729,9 +746,9 @@ unit cgcpu;
         (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,A_NONE,A_MUL,A_MUL,A_NONE,A_NONE,A_ORR,
          A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_NONE,A_ROR);
 
-      op_reg_postfix: array[TOpCG] of TOpPostfix =
-        (PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,
-         PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None);
+      op_reg_postfix_thumb: array[TOpCG] of TOpPostfix =
+        (PF_None,PF_None,PF_None,PF_S,PF_None,PF_None,PF_None,PF_None,PF_None,PF_None,PF_S,
+         PF_None,PF_S,PF_S,PF_None,PF_S,PF_None,PF_S);
 
     procedure tcgarm.a_op_const_reg_reg(list: TAsmList; op: TOpCg;
       size: tcgsize; a: tcgint; src, dst: tregister);
@@ -3716,6 +3733,15 @@ unit cgcpu;
                    if r in regs then
                      inc(registerarea,4);
                  list.concat(taicpu.op_regset(A_PUSH,R_INTREGISTER,R_SUBWHOLE,regs));
+                 { we need to run the loop twice to get cfi right }
+                 registerarea:=0;
+                 for r:=RS_R0 to RS_R15 do
+                   if r in regs then
+                     begin
+                       inc(registerarea,4);
+                       current_asmdata.asmcfi.cfa_offset(list,newreg(R_INTREGISTER,r,R_SUBWHOLE),-registerarea);
+                     end;
+                 current_asmdata.asmcfi.cfa_def_cfa_offset(list,registerarea);
                end;
 
             stackmisalignment:=registerarea mod current_settings.alignment.localalignmax;
@@ -3755,18 +3781,14 @@ unit cgcpu;
                     a_load_const_reg(list,OS_ADDR,-localsize,NR_R4);
                     list.concat(taicpu.op_reg_reg_reg(A_ADD,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R4));
                     include(regs,RS_R4);
-
-                    //!!!! if current_procinfo.framepointer=NR_STACK_POINTER_REG then
-                    //!!!!   a_reg_alloc(list,NR_R12);
-                    //!!!! a_load_const_reg(list,OS_ADDR,LocalSize,NR_R12);
-                    //!!!! list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R12));
-                    //!!!! a_reg_dealloc(list,NR_R12);
                   end;
+                current_asmdata.asmcfi.cfa_def_cfa_offset(list,registerarea+localsize);
               end;
 
             if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
               begin
                 list.concat(taicpu.op_reg_reg_const(A_ADD,current_procinfo.framepointer,NR_STACK_POINTER_REG,0));
+                current_asmdata.asmcfi.cfa_def_cfa_register(list,current_procinfo.framepointer);
               end;
           end;
       end;
@@ -3908,7 +3930,7 @@ unit cgcpu;
                      a_internal_load_ref_reg(list,OS_S8,OS_S8,usedtmpref,tmpreg);
                    list.concat(taicpu.op_reg_const(A_LSL,tmpreg,8));
 
-                   list.concat(taicpu.op_reg_reg(A_ORR,reg,tmpreg));
+                   list.concat(setoppostfix(taicpu.op_reg_reg(A_ORR,reg,tmpreg),PF_S));
                  end;
                OS_32,OS_S32:
                  begin
@@ -3938,7 +3960,7 @@ unit cgcpu;
                        inc(usedtmpref.offset,dir*2);
                        a_internal_load_ref_reg(list,OS_16,OS_16,usedtmpref,tmpreg);
                        list.concat(taicpu.op_reg_const(A_LSL,tmpreg,16));
-                       list.concat(taicpu.op_reg_reg(A_ORR,reg,tmpreg));
+                       list.concat(setoppostfix(taicpu.op_reg_reg(A_ORR,reg,tmpreg),PF_S));
                      end
                    else
                      begin
@@ -3948,15 +3970,15 @@ unit cgcpu;
                        inc(usedtmpref.offset,dir);
                        a_internal_load_ref_reg(list,OS_8,OS_8,usedtmpref,tmpreg);
                        list.concat(taicpu.op_reg_const(A_LSL,tmpreg,8));
-                       list.concat(taicpu.op_reg_reg(A_ORR,reg,tmpreg));
+                       list.concat(setoppostfix(taicpu.op_reg_reg(A_ORR,reg,tmpreg),PF_S));
                        inc(usedtmpref.offset,dir);
                        a_internal_load_ref_reg(list,OS_8,OS_8,usedtmpref,tmpreg);
                        list.concat(taicpu.op_reg_const(A_LSL,tmpreg,16));
-                       list.concat(taicpu.op_reg_reg(A_ORR,reg,tmpreg));
+                       list.concat(setoppostfix(taicpu.op_reg_reg(A_ORR,reg,tmpreg),PF_S));
                        inc(usedtmpref.offset,dir);
                        a_internal_load_ref_reg(list,OS_8,OS_8,usedtmpref,tmpreg);
                        list.concat(taicpu.op_reg_const(A_LSL,tmpreg,24));
-                       list.concat(taicpu.op_reg_reg(A_ORR,reg,tmpreg));
+                       list.concat(setoppostfix(taicpu.op_reg_reg(A_ORR,reg,tmpreg),PF_S));
                      end;
                  end
                else
@@ -3979,7 +4001,7 @@ unit cgcpu;
           if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
             internalerror(2002090908);
           if is_thumb_imm(a) then
-            list.concat(taicpu.op_reg_const(A_MOV,reg,a))
+            list.concat(setoppostfix(taicpu.op_reg_const(A_MOV,reg,a),PF_S))
           else
             begin
               reference_reset(hr,4,[]);
@@ -4140,7 +4162,7 @@ unit cgcpu;
           OP_NEG:
             list.concat(taicpu.op_reg_reg(A_NEG,dst,src));
           OP_NOT:
-            list.concat(taicpu.op_reg_reg(A_MVN,dst,src));
+            list.concat(setoppostfix(taicpu.op_reg_reg(A_MVN,dst,src),PF_S));
           OP_DIV,OP_IDIV:
             internalerror(200308284);
           OP_ROL:
@@ -4151,13 +4173,13 @@ unit cgcpu;
               tmpreg:=getintregister(list,OS_32);
               a_load_const_reg(list,OS_32,32,tmpreg);
               list.concat(taicpu.op_reg_reg(A_SUB,tmpreg,src));
-              list.concat(taicpu.op_reg_reg(A_ROR,dst,src));
+              list.concat(setoppostfix(taicpu.op_reg_reg(A_ROR,dst,src),PF_S));
             end;
           else
             begin
               a_reg_alloc(list,NR_DEFAULTFLAGS);
               list.concat(setoppostfix(
-                taicpu.op_reg_reg(op_reg_opcg2asmop[op],dst,src),op_reg_postfix[op]));
+                taicpu.op_reg_reg(op_reg_opcg2asmop[op],dst,src),op_reg_postfix_thumb[op]));
             end;
         end;
         maybeadjustresult(list,op,size,dst);
@@ -4193,7 +4215,7 @@ unit cgcpu;
              // if cgsetflags or setflags then
              a_reg_alloc(list,NR_DEFAULTFLAGS);
             list.concat(setoppostfix(
-              taicpu.op_reg_const(op_reg_opcg2asmop[op],dst,a),op_reg_postfix[op]));
+              taicpu.op_reg_const(op_reg_opcg2asmop[op],dst,a),op_reg_postfix_thumb[op]));
 
             if (cgsetflags {!!! or setflags }) and (size in [OS_8,OS_16,OS_32]) then
               begin
@@ -4252,7 +4274,7 @@ unit cgcpu;
             { x := y and 0; just clears a register, this sometimes gets generated on 64bit ops.
               Just using mov x, #0 might allow some easier optimizations down the line. }
             else if (op = OP_AND) and (dword(a)=0) then
-              list.concat(taicpu.op_reg_const(A_MOV,dst,0))
+              list.concat(setoppostfix(taicpu.op_reg_const(A_MOV,dst,0),PF_S))
             { x := y AND $FFFFFFFF just copies the register, so use mov for better optimizations }
             else if (op = OP_AND) and (not(dword(a))=0) then
               // do nothing
@@ -4308,10 +4330,10 @@ unit cgcpu;
         ai:=setcondition(taicpu.op_sym(A_B,l1),flags_to_cond(f));
         ai.is_jmp:=true;
         list.concat(ai);
-        list.concat(taicpu.op_reg_const(A_MOV,reg,0));
+        list.concat(setoppostfix(taicpu.op_reg_const(A_MOV,reg,0),PF_S));
         list.concat(taicpu.op_sym(A_B,l2));
         cg.a_label(list,l1);
-        list.concat(taicpu.op_reg_const(A_MOV,reg,1));
+        list.concat(setoppostfix(taicpu.op_reg_const(A_MOV,reg,1),PF_S));
         a_reg_dealloc(list,NR_DEFAULTFLAGS);
         cg.a_label(list,l2);
       end;
@@ -4334,24 +4356,7 @@ unit cgcpu;
           rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBNONE,
             [RS_F0,RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7],first_fpu_imreg,[]);
 
-        if (FPUARM_HAS_32REGS in fpu_capabilities[current_settings.fputype]) and
-          (FPUARM_HAS_VFP_DOUBLE in fpu_capabilities[current_settings.fputype]) then
-          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
-              [RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
-               RS_D16,RS_D17,RS_D18,RS_D19,RS_D20,RS_D21,RS_D22,RS_D23,RS_D24,RS_D25,RS_D26,RS_D27,RS_D28,RS_D29,RS_D30,RS_D31,
-               RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15
-              ],first_mm_imreg,[])
-        else if (FPUARM_HAS_32REGS in fpu_capabilities[current_settings.fputype]) then
-          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFS,
-              [RS_S0,RS_S1,RS_S2,RS_S3,RS_S4,RS_S5,RS_S6,RS_S7,
-               RS_S16,RS_S17,RS_S18,RS_S19,RS_S20,RS_S21,RS_S22,RS_S23,RS_S24,RS_S25,RS_S26,RS_S27,RS_S28,RS_S29,RS_S30,RS_S31,
-               RS_S8,RS_S9,RS_S10,RS_S11,RS_S12,RS_S13,RS_S14,RS_S15
-              ],first_mm_imreg,[])
-        else if FPUARM_HAS_VFP_EXTENSION in fpu_capabilities[current_settings.fputype] then
-          rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBFD,
-              [RS_D0,RS_D1,RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7,
-               RS_D8,RS_D9,RS_D10,RS_D11,RS_D12,RS_D13,RS_D14,RS_D15
-              ],first_mm_imreg,[]);
+        init_mmregister_allocator;
       end;
 
 
@@ -4896,15 +4901,18 @@ unit cgcpu;
           begin
             firstfloatreg:=RS_NO;
             lastfloatreg:=RS_NO;
-            { save floating point registers? }
-            for r:=RS_F0 to RS_F7 do
-              if r in rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall) then
-                begin
-                  if firstfloatreg=RS_NO then
-                    firstfloatreg:=r;
-                  lastfloatreg:=r;
-                  inc(stackmisalignment,12);
-                end;
+            if FPUARM_HAS_FPA in fpu_capabilities[current_settings.fputype] then
+              begin
+                { save floating point registers? }
+                for r:=RS_F0 to RS_F7 do
+                  if r in rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall) then
+                    begin
+                      if firstfloatreg=RS_NO then
+                        firstfloatreg:=r;
+                      lastfloatreg:=r;
+                      inc(stackmisalignment,12);
+                    end;
+              end;
 
             a_reg_alloc(list,NR_STACK_POINTER_REG);
             if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
@@ -4964,22 +4972,25 @@ unit cgcpu;
                   end;
               end;
 
-            if firstfloatreg<>RS_NO then
+            if FPUARM_HAS_FPA in fpu_capabilities[current_settings.fputype] then
               begin
-                reference_reset(ref,4,[]);
-                if tg.direction*tcpuprocinfo(current_procinfo).floatregstart>=1023 then
+                if firstfloatreg<>RS_NO then
                   begin
-                    a_load_const_reg(list,OS_ADDR,-tcpuprocinfo(current_procinfo).floatregstart,NR_R12);
-                    list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_R12,current_procinfo.framepointer,NR_R12));
-                    ref.base:=NR_R12;
-                  end
-                else
-                  begin
-                    ref.base:=current_procinfo.framepointer;
-                    ref.offset:=tcpuprocinfo(current_procinfo).floatregstart;
+                    reference_reset(ref,4,[]);
+                    if tg.direction*tcpuprocinfo(current_procinfo).floatregstart>=1023 then
+                      begin
+                        a_load_const_reg(list,OS_ADDR,-tcpuprocinfo(current_procinfo).floatregstart,NR_R12);
+                        list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_R12,current_procinfo.framepointer,NR_R12));
+                        ref.base:=NR_R12;
+                      end
+                    else
+                      begin
+                        ref.base:=current_procinfo.framepointer;
+                        ref.offset:=tcpuprocinfo(current_procinfo).floatregstart;
+                      end;
+                    list.concat(taicpu.op_reg_const_ref(A_SFM,newreg(R_FPUREGISTER,firstfloatreg,R_SUBWHOLE),
+                      lastfloatreg-firstfloatreg+1,ref));
                   end;
-                list.concat(taicpu.op_reg_const_ref(A_SFM,newreg(R_FPUREGISTER,firstfloatreg,R_SUBWHOLE),
-                  lastfloatreg-firstfloatreg+1,ref));
               end;
           end;
       end;
@@ -4998,38 +5009,41 @@ unit cgcpu;
         if not(nostackframe) then
           begin
             stackmisalignment:=0;
-            { restore floating point register }
-            firstfloatreg:=RS_NO;
-            lastfloatreg:=RS_NO;
-            { save floating point registers? }
-            for r:=RS_F0 to RS_F7 do
-              if r in rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall) then
-                begin
-                  if firstfloatreg=RS_NO then
-                    firstfloatreg:=r;
-                  lastfloatreg:=r;
-                  { floating point register space is already included in
-                    localsize below by calc_stackframe_size
-                   inc(stackmisalignment,12);
-                  }
-                end;
-
-            if firstfloatreg<>RS_NO then
+            if FPUARM_HAS_FPA in fpu_capabilities[current_settings.fputype] then
               begin
-                reference_reset(ref,4,[]);
-                if tg.direction*tcpuprocinfo(current_procinfo).floatregstart>=1023 then
-                  begin
-                    a_load_const_reg(list,OS_ADDR,-tcpuprocinfo(current_procinfo).floatregstart,NR_R12);
-                    list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_R12,current_procinfo.framepointer,NR_R12));
-                    ref.base:=NR_R12;
-                  end
-                else
+                { restore floating point register }
+                firstfloatreg:=RS_NO;
+                lastfloatreg:=RS_NO;
+                { save floating point registers? }
+                for r:=RS_F0 to RS_F7 do
+                  if r in rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall) then
+                    begin
+                      if firstfloatreg=RS_NO then
+                        firstfloatreg:=r;
+                      lastfloatreg:=r;
+                      { floating point register space is already included in
+                        localsize below by calc_stackframe_size
+                       inc(stackmisalignment,12);
+                      }
+                    end;
+
+                if firstfloatreg<>RS_NO then
                   begin
-                    ref.base:=current_procinfo.framepointer;
-                    ref.offset:=tcpuprocinfo(current_procinfo).floatregstart;
+                    reference_reset(ref,4,[]);
+                    if tg.direction*tcpuprocinfo(current_procinfo).floatregstart>=1023 then
+                      begin
+                        a_load_const_reg(list,OS_ADDR,-tcpuprocinfo(current_procinfo).floatregstart,NR_R12);
+                        list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_R12,current_procinfo.framepointer,NR_R12));
+                        ref.base:=NR_R12;
+                      end
+                    else
+                      begin
+                        ref.base:=current_procinfo.framepointer;
+                        ref.offset:=tcpuprocinfo(current_procinfo).floatregstart;
+                      end;
+                    list.concat(taicpu.op_reg_const_ref(A_LFM,newreg(R_FPUREGISTER,firstfloatreg,R_SUBWHOLE),
+                      lastfloatreg-firstfloatreg+1,ref));
                   end;
-                list.concat(taicpu.op_reg_const_ref(A_LFM,newreg(R_FPUREGISTER,firstfloatreg,R_SUBWHOLE),
-                  lastfloatreg-firstfloatreg+1,ref));
               end;
 
             regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
@@ -5346,11 +5360,11 @@ unit cgcpu;
         case op of
           OP_NEG:
             begin
-              list.concat(taicpu.op_reg_const(A_MOV,regdst.reglo,0));
-              list.concat(taicpu.op_reg_const(A_MOV,regdst.reghi,0));
+              list.concat(setoppostfix(taicpu.op_reg_const(A_MOV,regdst.reglo,0),PF_S));
+              list.concat(setoppostfix(taicpu.op_reg_const(A_MOV,regdst.reghi,0),PF_S));
               cg.a_reg_alloc(list,NR_DEFAULTFLAGS);
               list.concat(taicpu.op_reg_reg(A_SUB,regdst.reglo,regsrc.reglo));
-              list.concat(taicpu.op_reg_reg(A_SBC,regdst.reghi,regsrc.reghi));
+              list.concat(setoppostfix(taicpu.op_reg_reg(A_SBC,regdst.reghi,regsrc.reghi),PF_S));
               cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
             end;
           OP_NOT:
@@ -5367,13 +5381,13 @@ unit cgcpu;
             begin
               cg.a_reg_alloc(list,NR_DEFAULTFLAGS);
               list.concat(taicpu.op_reg_reg(A_ADD,regdst.reglo,regsrc.reglo));
-              list.concat(taicpu.op_reg_reg(A_ADC,regdst.reghi,regsrc.reghi));
+              list.concat(setoppostfix(taicpu.op_reg_reg(A_ADC,regdst.reghi,regsrc.reghi),PF_S));
             end;
           OP_SUB:
             begin
               cg.a_reg_alloc(list,NR_DEFAULTFLAGS);
               list.concat(taicpu.op_reg_reg(A_SUB,regdst.reglo,regsrc.reglo));
-              list.concat(taicpu.op_reg_reg(A_SBC,regdst.reghi,regsrc.reghi));
+              list.concat(setoppostfix(taicpu.op_reg_reg(A_SBC,regdst.reghi,regsrc.reghi),PF_S));
             end;
           else
             internalerror(2003083105);
@@ -5408,7 +5422,7 @@ unit cgcpu;
 
                tmpreg:=cg.getintregister(list,OS_32);
                cg.a_load_const_reg(list,OS_32,aint(hi(value)),tmpreg);
-               list.concat(taicpu.op_reg_reg(A_ADC,reg.reghi,tmpreg));
+               list.concat(setoppostfix(taicpu.op_reg_reg(A_ADC,reg.reghi,tmpreg),PF_S));
             end;
           OP_SUB:
             begin
@@ -5427,7 +5441,7 @@ unit cgcpu;
 
               tmpreg:=cg.getintregister(list,OS_32);
               cg.a_load_const_reg(list,OS_32,hi(value),tmpreg);
-              list.concat(taicpu.op_reg_reg(A_SBC,reg.reghi,tmpreg));
+              list.concat(setoppostfix(taicpu.op_reg_reg(A_SBC,reg.reghi,tmpreg),PF_S));
             end;
           else
             internalerror(2003083106);

+ 1 - 1
compiler/arm/cpubase.pas

@@ -322,7 +322,7 @@ unit cpubase;
 
       NR_MM_RESULT_REG  = NR_D0;
 
-      NR_RETURN_ADDRESS_REG = NR_FUNCTION_RETURN_REG;
+      NR_RETURN_ADDRESS_REG = NR_R14;
 
       { Offset where the parent framepointer is pushed }
       PARENT_FRAMEPOINTER_OFFSET = 0;

+ 2 - 2
compiler/arm/narmset.pas

@@ -112,11 +112,11 @@ implementation
              right.resultdef, right.resultdef, true);
 
             hregister:=hlcg.getintregister(current_asmdata.CurrAsmList, opdef);
-            current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_MOV,hregister,1));
+            hlcg.a_load_const_reg(current_asmdata.CurrAsmList,opdef,1,hregister);
 
             if GenerateThumbCode or GenerateThumb2Code then
               begin
-                current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_LSL,hregister,left.location.register));
+                hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_SHL,opdef,left.location.register,hregister);
                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_TST,right.location.register,hregister));
               end

+ 9 - 1
compiler/arm/raarm.pas

@@ -43,13 +43,21 @@ unit raarm;
   implementation
 
     uses
+      globals,
+      cpuinfo,
       aasmcpu;
 
     function TARMInstruction.ConcatInstruction(p:TAsmList) : tai;
       begin
         result:=inherited ConcatInstruction(p);
         (result as taicpu).oppostfix:=oppostfix;
-        (result as taicpu).wideformat:=wideformat;
+        if wideformat then
+          include((result as taicpu).flags,cf_wideformat)
+        else
+          exclude((result as taicpu).flags,cf_wideformat);
+        { GNU As assumes implicit S postfix for some instructions in thumb mode }
+        if (current_settings.instructionset=is_thumb) and (((result as taicpu).oppostfix=PF_None) and ((opcode=A_MOV) and ((result as taicpu).oper[1]^.typ=top_const)) or (opcode=A_MVN)) then
+          (result as taicpu).oppostfix:=PF_S
       end;
 
 

+ 18 - 2
compiler/assemble.pas

@@ -205,6 +205,10 @@ interface
 
       TInternalAssembler=class(TAssembler)
       private
+{$ifdef ARM}
+        { true, if thumb instructions are generated }
+        Code16 : Boolean;
+{$endif ARM}
         FCObjOutput : TObjOutputclass;
         FCInternalAr : TObjectWriterClass;
         { the aasmoutput lists that need to be processed }
@@ -1290,6 +1294,9 @@ Implementation
         ObjOutput:=nil;
         ObjData:=nil;
         SmartAsm:=smart;
+{$ifdef ARM}
+        Code16:=current_settings.instructionset=is_thumb;
+{$endif ARM}
       end;
 
 
@@ -1713,8 +1720,11 @@ Implementation
                    asd_thumb_func:
                      ObjData.ThumbFunc:=true;
                    asd_code:
-                     { ai_directive(hp).name can be only 16 or 32, this is checked by the reader }
-                     ObjData.ThumbFunc:=tai_directive(hp).name='16';
+                     begin
+                       { ai_directive(hp).name can be only 16 or 32, this is checked by the reader }
+                       ObjData.ThumbFunc:=tai_directive(hp).name='16';
+                       Code16:=tai_directive(hp).name='16';
+                     end
 {$endif ARM}
 {$ifdef RISCV}
                    asd_option:
@@ -1746,6 +1756,12 @@ Implementation
                ObjData.alloc(Tai_string(hp).len);
              ait_instruction :
                begin
+{$ifdef arm}
+                 if code16 then
+                   include(taicpu(hp).flags,cf_thumb)
+                 else
+                   exclude(taicpu(hp).flags,cf_thumb);
+{$endif arm}
                  { reset instructions which could change in pass 2 }
                  Taicpu(hp).resetpass2;
                  ObjData.alloc(Taicpu(hp).Pass1(ObjData));

+ 20 - 0
compiler/cfidwarf.pas

@@ -289,6 +289,26 @@ implementation
         list.concat(tai_const.create_uleb128bit(36));
         list.concat(tai_const.create_uleb128bit((-1) div data_alignment_factor));
       end;
+{$elseif defined(arm)}
+    procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList);
+      begin
+        if GenerateThumbCode then
+          begin
+            list.concat(tai_const.create_8bit(DW_CFA_def_cfa));
+            list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG)));
+            list.concat(tai_const.create_uleb128bit(0));
+          end
+        else
+          begin
+            { FIXME!!! }
+            list.concat(tai_const.create_8bit(DW_CFA_def_cfa));
+            list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG)));
+            list.concat(tai_const.create_uleb128bit(sizeof(aint)));
+            list.concat(tai_const.create_8bit(DW_CFA_offset_extended));
+            list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_RETURN_ADDRESS_REG)));
+            list.concat(tai_const.create_uleb128bit((-sizeof(aint)) div data_alignment_factor));
+          end;
+      end;
 {$else}
     { if more cpu dependend stuff is implemented, this needs more refactoring }
     procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList);

+ 3 - 1
compiler/msg/errore.msg

@@ -3426,7 +3426,7 @@ unit_u_ppu_llvm_mismatch=10067_U_Skipping unit, PPU and compiler have to be both
 #
 #  Options
 #
-# 11062 is the last used one
+# 11063 is the last used one
 #
 option_usage=11000_O_$1 [options] <inputfile> [options]
 # BeginOfTeX
@@ -3583,6 +3583,8 @@ option_features_only_for_system_unit=11060_E_Feature switches are only supported
 % system unit through the ppu of the system unit.
 option_debug_info_requires_external_linker=11061_N_The selected debug format is not supported by the internal linker, switching to external linking
 option_valgrind_heaptrc_mismatch=11062_E_You can not use both options ($1) ($2) at same time.
+option_unsupported_fpu=11063_F_The selected FPU type "$1" is not supported by the selected instruction set "$2"
+% Not all instruction sets support all FPU types. For example on ARM, Thumb(-1) supports no FPU/VFP instruction set
 %\end{description}
 # EndOfTeX
 

+ 3 - 2
compiler/msgidx.inc

@@ -1085,6 +1085,7 @@ const
   option_features_only_for_system_unit=11060;
   option_debug_info_requires_external_linker=11061;
   option_valgrind_heaptrc_mismatch=11062;
+  option_unsupported_fpu=11063;
   wpo_cant_find_file=12000;
   wpo_begin_processing=12001;
   wpo_end_processing=12002;
@@ -1138,9 +1139,9 @@ const
   option_info=11024;
   option_help_pages=11025;
 
-  MsgTxtSize = 87198;
+  MsgTxtSize = 87287;
 
   MsgIdxMax : array[1..20] of longint=(
     28,107,361,131,99,63,146,36,223,68,
-    63,20,30,1,1,1,1,1,1,1
+    64,20,30,1,1,1,1,1,1,1
   );

+ 279 - 274
compiler/msgtxt.inc

@@ -1329,89 +1329,91 @@ const msgtxt : array[0..000363,1..240] of char=(
   '11061_N_The selected debug format is not supported by the internal lin'+
   'ker, switching to external linking',#000+
   '11062_E_You can not use both options ($1) ($2) at same time.'#000+
+  '11063_F_The selected FPU type "$1" is not supported by the selected in'+
+  'struction set "$2"'#000+
   '12000_F_Cannot open whole program optimization feedback file "$1"'#000+
-  '12001_D_Processing whole program optimization information in wpo feedb'+
-  'ack file "$1"'#000+
-  '12002_D_Finished processing ','the whole program optimization informati'+
-  'on in wpo feedback file "$1"'#000+
+  '12001_D_Processing whol','e program optimization information in wpo fee'+
+  'dback file "$1"'#000+
+  '12002_D_Finished processing the whole program optimization information'+
+  ' in wpo feedback file "$1"'#000+
   '12003_E_Expected section header, but got "$2" at line $1 of wpo feedba'+
   'ck file'#000+
-  '12004_W_No handler registered for whole program optimization section "'+
-  '$2" at line $1 of wpo f','eedback file, ignoring'#000+
+  '1200','4_W_No handler registered for whole program optimization section'+
+  ' "$2" at line $1 of wpo feedback file, ignoring'#000+
   '12005_D_Found whole program optimization section "$1" with information'+
   ' about "$2"'#000+
-  '12006_F_The selected whole program optimizations require a previously '+
-  'generated feedback file (use -Fw to specify)'#000+
-  '12007_E_No collected',' information necessary to perform "$1" whole pro'+
-  'gram optimization found'#000+
+  '12006_F_The selected whole program optimizatio','ns require a previousl'+
+  'y generated feedback file (use -Fw to specify)'#000+
+  '12007_E_No collected information necessary to perform "$1" whole progr'+
+  'am optimization found'#000+
   '12008_F_Specify a whole program optimization feedback file to store th'+
-  'e generated info in (using -FW)'#000+
-  '12009_E_Not generating any whole program optimization information,',' y'+
-  'et a feedback file was specified (using -FW)'#000+
+  'e generat','ed info in (using -FW)'#000+
+  '12009_E_Not generating any whole program optimization information, yet'+
+  ' a feedback file was specified (using -FW)'#000+
   '12010_E_Not performing any whole program optimizations, yet an input f'+
-  'eedback file was specified (using -Fw)'#000+
+  'eedback file was specified (using ','-Fw)'#000+
   '12011_D_Skipping whole program optimization section "$1", because not '+
-  'needed by the ','requested optimizations'#000+
+  'needed by the requested optimizations'#000+
   '12012_W_Overriding previously read information for "$1" from feedback '+
   'input file using information in section "$2"'#000+
-  '12013_E_Cannot extract symbol liveness information from program when s'+
-  'tripping symbols, use -Xs-'#000+
-  '1201','4_E_Cannot extract symbol liveness information from program when'+
-  ' when not linking'#000+
-  '12015_F_Cannot find "$1" or "$2" to extract symbol liveness informatio'+
-  'n from linked program'#000+
-  '12016_E_Error during reading symbol liveness information produced ','by'+
-  ' "$1"'#000+
+  '12013_E_Cann','ot extract symbol liveness information from program when'+
+  ' stripping symbols, use -Xs-'#000+
+  '12014_E_Cannot extract symbol liveness information from program when w'+
+  'hen not linking'#000+
+  '12015_F_Cannot find "$1" or "$2" to extract symbol liveness informati',
+  'on from linked program'#000+
+  '12016_E_Error during reading symbol liveness information produced by "'+
+  '$1"'#000+
   '12017_F_Error executing "$1" (exitcode: $2) to extract symbol informat'+
   'ion from linked program'#000+
-  '12018_E_Collection of symbol liveness information can only help when u'+
-  'sing smart linking, use -CX -XX'#000+
-  '12019_E_Cannot create specified whol','e program optimisation feedback '+
-  'file "$1"'#000+
+  '12018_E_Collection of symbol liveness information',' can only help when'+
+  ' using smart linking, use -CX -XX'#000+
+  '12019_E_Cannot create specified whole program optimisation feedback fi'+
+  'le "$1"'#000+
   '13001_F_Can'#039't find package $1'#000+
   '13002_U_PCP file for package $1 found'#000+
   '13003_E_Duplicate package $1'#000+
-  '13004_E_Unit $1 can not be part of a package'#000+
-  '13005_N_Unit $1 is implicitely imported into package $2'#000,
+  '13004_E_Unit',' $1 can not be part of a package'#000+
+  '13005_N_Unit $1 is implicitely imported into package $2'#000+
   '13006_F_Failed to create PCP file $2 for package $1'#000+
   '13007_F_Failed to read PCP file for package $1'#000+
   '13008_T_PCP loading $1'#000+
   '13009_U_PCP Name: $1'#000+
-  '13010_U_PCP Flags: $1'#000+
+  '13010_U_','PCP Flags: $1'#000+
   '13011_U_PCP Crc: $1'#000+
   '13012_U_PCP Time: $1'#000+
   '13013_U_PCP File too short'#000+
-  '13014_U','_PCP Invalid Header (no PCP at the begin)'#000+
+  '13014_U_PCP Invalid Header (no PCP at the begin)'#000+
   '13015_U_PCP Invalid Version $1'#000+
   '13016_U_PCP is compiled for another processor'#000+
-  '13017_U_PCP is compiled for another target'#000+
+  '13017_U_PCP is compiled for anot','her target'#000+
   '13018_U_Writing $1'#000+
   '13019_F_Can'#039't Write PCP-File'#000+
-  '13020_F_Error reading PCP-File',#000+
+  '13020_F_Error reading PCP-File'#000+
   '13021_F_Unexpected end of PCP-File'#000+
   '13022_F_Invalid PCP-File entry: $1'#000+
   '13023_U_Trying to use a unit which was compiled with a different FPU m'+
   'ode'#000+
-  '13024_T_Packagesearch: $1'#000+
+  '13024_','T_Packagesearch: $1'#000+
   '13025_U_Required package $1'#000+
   '13026_U_Contained unit $1'#000+
-  '13027_E_Unit $1',' is already contained in package $2'#000+
+  '13027_E_Unit $1 is already contained in package $2'#000+
   '13028_W_Unit $1 is imported from indirectly required package $2'#000+
   '13029_U_PPL filename $1'#000+
-  '11023_Free Pascal Compiler version $FPCFULLVERSION [$FPCDATE] for $FPC'+
-  'CPU'#010+
-  'Copyright (c) 1993-2021 by Florian Klaempf','l and others'#000+
+  '11023_Free Pascal Compiler ','version $FPCFULLVERSION [$FPCDATE] for $F'+
+  'PCCPU'#010+
+  'Copyright (c) 1993-2021 by Florian Klaempfl and others'#000+
   '11024_Free Pascal Compiler version $FPCVERSION'#010+
   #010+
   'Compiler date      : $FPCDATE'#010+
   'Compiler CPU target: $FPCCPU'#010+
   #010+
-  'Supported targets (targets marked with '#039'{*}'#039' are under develop'+
-  'ment):'#010+
+  'Supported targets (targets mar','ked with '#039'{*}'#039' are under devel'+
+  'opment):'#010+
   '  $OSTARGETS'#010+
   #010+
   'Supported CPU instruction sets:'#010+
-  '  $I','NSTRUCTIONSETS'#010+
+  '  $INSTRUCTIONSETS'#010+
   #010+
   'Supported FPU instruction sets:'#010+
   '  $FPUINSTRUCTIONSETS'#010+
@@ -1419,14 +1421,14 @@ const msgtxt : array[0..000363,1..240] of char=(
   'Supported inline assembler modes:'#010+
   '  $ASMMODES'#010+
   #010+
-  'Recognized compiler and RTL features:'#010+
+  'Recognized compiler and RTL featu','res:'#010+
   '  $FEATURELIST'#010+
   #010+
   'Recognized modeswitches:'#010+
   '  $MODESWITCHES'#010+
   #010+
   'Supported ABI targets:'#010+
-  '  $','ABITARGETS'#010+
+  '  $ABITARGETS'#010+
   #010+
   'Supported Optimizations:'#010+
   '  $OPTIMIZATIONS'#010+
@@ -1436,398 +1438,398 @@ const msgtxt : array[0..000363,1..240] of char=(
   '  $WPOPTIMIZATIONS'#010+
   #010+
   'Code Generation Backend'#010+
-  '  $CODEGENERATIONBACKEND'#010+
+  '  $CODE','GENERATIONBACKEND'#010+
   #010+
   'Supported Microcontroller types:$\n  $CONTROLLERTYPES$\n'#010+
-  'This program ','comes under the GNU General Public Licence'#010+
+  'This program comes under the GNU General Public Licence'#010+
   'For more information read COPYING.v2'#010+
   #010+
   'Please report bugs in our bug tracker on:'#010+
-  '                 https://bugs.freepascal.org'#010+
+  '                 https://bug','s.freepascal.org'#010+
   #010+
   'More information may be found on our WWW pages (including directions'#010+
-  'fo','r mailing lists useful for asking questions or discussing potentia'+
-  'l'#010+
+  'for mailing lists useful for asking questions or discussing potential'#010+
   'new features, etc.):'#010+
   '                 https://www.freepascal.org'#000+
-  '11025_F*0*_Only options valid for the default or selected platform are'+
-  ' listed.'#010+
-  '**0*_Put + after a boolean s','witch option to enable it, - to disable '+
-  'it.'#010+
+  '11025_F*0*_Only op','tions valid for the default or selected platform a'+
+  're listed.'#010+
+  '**0*_Put + after a boolean switch option to enable it, - to disable it'+
+  '.'#010+
   '**1@<x>_Read compiler options from <x> in addition to the default fpc.'+
   'cfg'#010+
-  '**1a_The compiler does not delete the generated assembler file'#010+
-  '**2a5_Don'#039't generate Big Obj COFF files for GNU Binutils ol','der t'+
-  'han 2.25 (Windows, NativeNT)'#010+
+  '**1a_The compiler does not delete',' the generated assembler file'#010+
+  '**2a5_Don'#039't generate Big Obj COFF files for GNU Binutils older tha'+
+  'n 2.25 (Windows, NativeNT)'#010+
   '**2al_List sourcecode lines in assembler file'#010+
   '**2an_List node info in assembler file (-dEXTDEBUG compiler)'#010+
-  '**2ao_Add an extra option to external assembler call (ignored for inte'+
-  'rnal)'#010+
-  '*L2ap_Use pipes instead',' of creating temporary assembler files'#010+
+  '**2ao_Add ','an extra option to external assembler call (ignored for in'+
+  'ternal)'#010+
+  '*L2ap_Use pipes instead of creating temporary assembler files'#010+
   '**2ar_List register allocation/release info in assembler file'#010+
-  '**2at_List temp allocation/release info in assembler file'#010+
+  '**2at_List temp allocation/release info in assembl','er file'#010+
   '**1A<x>_Output format:'#010+
   '**2Adefault_Use default assembler'#010+
-  '3*2Aas_Assemble using GN','U AS'#010+
+  '3*2Aas_Assemble using GNU AS'#010+
   '3*2Aas-darwin_Assemble Darwin Mach-O using GNU GAS'#010+
   '3*2Amacho_Mach-O (Darwin, Intel 32 bit) using internal writer'#010+
   '8*2Anasm_Assemble using Nasm'#010+
-  '8*2Anasmobj_Assemble using Nasm'#010+
+  '8*2A','nasmobj_Assemble using Nasm'#010+
   '3*2Anasm_Assemble using Nasm'#010+
-  '3*2Anasmcoff_COFF (Go32v2) file ','using Nasm'#010+
+  '3*2Anasmcoff_COFF (Go32v2) file using Nasm'#010+
   '3*2Anasmelf_ELF32 (Linux) file using Nasm'#010+
   '3*2Anasmwin32_Win32 object file using Nasm'#010+
   '3*2Anasmwdosx_Win32/WDOSX object file using Nasm'#010+
-  '3*2Anasmdarwin_macho32 object file using Nasm (experimental)'#010+
-  '3*2Awasm_Obj file using Wasm (Watc','om)'#010+
+  '3*2Ana','smdarwin_macho32 object file using Nasm (experimental)'#010+
+  '3*2Awasm_Obj file using Wasm (Watcom)'#010+
   '3*2Anasmobj_Obj file using Nasm'#010+
   '3*2Amasm_Obj file using Masm (Microsoft)'#010+
   '3*2Atasm_Obj file using Tasm (Borland)'#010+
-  '3*2Aelf_ELF (Linux) using internal writer'#010+
+  '3*2Aelf_ELF (Linux) using internal ','writer'#010+
   '3*2Acoff_COFF (Go32v2) using internal writer'#010+
-  '3*2Apecoff_PE-COFF (Win32) using inte','rnal writer'#010+
+  '3*2Apecoff_PE-COFF (Win32) using internal writer'#010+
   '3*2Ayasm_Assemble using Yasm (experimental)'#010+
   '4*2Aas_Assemble using GNU AS'#010+
   '4*2Agas_Assemble using GNU GAS'#010+
-  '4*2Aas-darwin_Assemble Darwin Mach-O using GNU GAS'#010+
+  '4*2Aas-darwin_Assemble Darwin Mach-','O using GNU GAS'#010+
   '4*2Amasm_Win64 object file using ml64 (Microsoft)'#010+
-  '4*2Apecoff_PE-COFF (Win','64) using internal writer'#010+
+  '4*2Apecoff_PE-COFF (Win64) using internal writer'#010+
   '4*2Aelf_ELF (Linux-64bit) using internal writer'#010+
   '4*2Ayasm_Assemble using Yasm (experimental)'#010+
-  '4*2Anasm_Assemble using Nasm (experimental)'#010+
+  '4*2Anasm_Assemble using Nasm (exp','erimental)'#010+
   '4*2Anasmwin64_Assemble Win64 object file using Nasm (experimental)'#010+
-  '4*2Anasmelf','_Assemble Linux-64bit object file using Nasm (experimenta'+
-  'l)'#010+
+  '4*2Anasmelf_Assemble Linux-64bit object file using Nasm (experimental)'+
+  #010+
   '4*2Anasmdarwin_Assemble darwin macho64 object file using Nasm (experim'+
   'ental)'#010+
-  '6*2Aas_Unix o-file using GNU AS'#010+
+  '6*2Aas_Unix o-','file using GNU AS'#010+
   '6*2Agas_GNU Motorola assembler'#010+
   '6*2Amit_MIT Syntax (old GAS)'#010+
-  '6*2Amot_Sta','ndard Motorola assembler'#010+
+  '6*2Amot_Standard Motorola assembler'#010+
   '6*2Avasm_Use vasm to assemble'#010+
   'A*2Aas_Assemble using GNU AS'#010+
   'P*2Aas_Assemble using GNU AS'#010+
   'S*2Aas_Assemble using GNU AS'#010+
-  'Z*2Asdcc-sdasz80_Assemble using SDCC-SDASZ80'#010+
+  'Z*2Asdcc-','sdasz80_Assemble using SDCC-SDASZ80'#010+
   'Z*2Az80asm_Assemble using z80asm'#010+
-  '**1b_Generate browse','r info'#010+
+  '**1b_Generate browser info'#010+
   '**2bl_Generate local symbol info'#010+
   '**1B_Build all modules'#010+
   '**1C<x>_Code generation options:'#010+
   '**2C3_Turn on ieee error checking for constants'#010+
-  '**2Ca<x>_Select ABI; see fpc -i or fpc -ia for possible values'#010+
-  '**2Cb_Generate code for a big-end','ian variant of the target architect'+
-  'ure'#010+
+  '**2Ca<x','>_Select ABI; see fpc -i or fpc -ia for possible values'#010+
+  '**2Cb_Generate code for a big-endian variant of the target architectur'+
+  'e'#010+
   '**2Cc<x>_Set default calling convention to <x>'#010+
   '**2CD_Create also dynamic library (not supported)'#010+
-  '**2Ce_Compilation with emulated floating point opcodes'#010+
-  '**2CE_Generate FPU code which can raise exception','s'#010+
+  '**2Ce_Compilati','on with emulated floating point opcodes'#010+
+  '**2CE_Generate FPU code which can raise exceptions'#010+
   '**2Cf<x>_Select fpu instruction set to use; see fpc -i or fpc -if for '+
   'possible values'#010+
-  '**2CF<x>_Minimal floating point constant precision (default, 32, 64)'#010+
+  '**2CF<x>_Minimal floating point constant precision (default, 32',', 64)'+
+  #010+
   '**2Cg_Generate PIC code'#010+
-  '**2Ch<n>[,m]_<n> bytes min heap size (between 1023 and 6710','7840) and'+
-  ' optionally [m] max heap size'#010+
+  '**2Ch<n>[,m]_<n> bytes min heap size (between 1023 and 67107840) and o'+
+  'ptionally [m] max heap size'#010+
   '**2Ci_IO-checking'#010+
   'A*2CI<x>_Select instruction set on ARM: ARM or THUMB'#010+
   'L*2Cl<x>_LLVM code generation options'#010+
-  'L*3Clflto_Enable Link-time optimisation (needed both when compiling un'+
-  'its and programs/libra','ries)'#010+
+  'L*3','Clflto_Enable Link-time optimisation (needed both when compiling '+
+  'units and programs/libraries)'#010+
   'L*3Clfltonosystem_Disable LTO for the system unit (needed with at leas'+
   't Xcode 10.2 and earlier due to linker bugs)'#010+
-  'L*3Clv<x>_LLVM target version: Xcode-10.1, 7.0, 8.0, .., 10.0'#010+
+  'L*3Clv<x>_LLVM target version:',' Xcode-10.1, 7.0, 8.0, .., 10.0'#010+
   '**2Cn_Omit linking stage'#010+
-  'P*2CN_Generate nil-pointer check','s (AIX-only)'#010+
+  'P*2CN_Generate nil-pointer checks (AIX-only)'#010+
   '**2Co_Check overflow of integer operations'#010+
   '**2CO_Check for possible overflow of integer operations'#010+
-  '**2Cp<x>_Select instruction set; see fpc -i or fpc -ic for possible va'+
-  'lues'#010+
+  '**2Cp<x>_Select instruction set; see fp','c -i or fpc -ic for possible '+
+  'values'#010+
   '**2CP<x>=<y>_ packing settings'#010+
-  '**3CPPACKSET=<y>_ <y> ','set allocation: 0, 1 or DEFAULT or NORMAL, 2, '+
-  '4 and 8'#010+
+  '**3CPPACKSET=<y>_ <y> set allocation: 0, 1 or DEFAULT or NORMAL, 2, 4 '+
+  'and 8'#010+
   '**3CPPACKENUM=<y>_ <y> enum packing: 0, 1, 2 and 4 or DEFAULT or NORMA'+
   'L'#010+
-  '**3CPPACKRECORD=<y>_ <y> record packing: 0 or DEFAULT or NORMAL, 1, 2,'+
-  ' 4, 8, 16 and 32'#010+
+  '**3CPPACKRECORD=<y>_ <y> ','record packing: 0 or DEFAULT or NORMAL, 1, '+
+  '2, 4, 8, 16 and 32'#010+
   '**2Cr_Range checking'#010+
-  '**2CR_','Verify object method call validity'#010+
+  '**2CR_Verify object method call validity'#010+
   '**2Cs<n>_Set stack checking size to <n>'#010+
   '**2Ct_Stack checking (for testing only, see manual)'#010+
-  '8*2CT<x>_Target-specific code generation options'#010+
+  '8*2CT<x>_Target-specific',' code generation options'#010+
   '3*2CT<x>_Target-specific code generation options'#010+
-  '4*2CT<x>_Target','-specific code generation options'#010+
+  '4*2CT<x>_Target-specific code generation options'#010+
   'p*2CT<x>_Target-specific code generation options'#010+
   'P*2CT<x>_Target-specific code generation options'#010+
-  'J*2CT<x>_Target-specific code generation options'#010+
+  'J*2CT<x>_Target-spe','cific code generation options'#010+
   'A*2CT<x>_Target-specific code generation options'#010+
-  'p*3CTsmall','toc_ Generate smaller TOCs at the expense of execution spe'+
-  'ed (AIX)'#010+
+  'p*3CTsmalltoc_ Generate smaller TOCs at the expense of execution speed'+
+  ' (AIX)'#010+
   'P*3CTsmalltoc_ Generate smaller TOCs at the expense of execution speed'+
   ' (AIX)'#010+
-  'J*3CTautogetterprefix=X_  Automatically create getters for properties '+
-  'with prefix X (empty strin','g disables)'#010+
+  'J*3CTau','togetterprefix=X_  Automatically create getters for propertie'+
+  's with prefix X (empty string disables)'#010+
   'J*3CTautosetterprefix=X_  Automatically create setters for properties '+
   'with prefix X (empty string disables)'#010+
-  '8*3CTcld_                 Emit a CLD instruction before using the x86 '+
-  'string instructions'#010+
-  '3*3CTcld_                 Emit',' a CLD instruction before using the x8'+
+  '8*3CTcld_                 Emit ','a CLD instruction before using the x8'+
   '6 string instructions'#010+
+  '3*3CTcld_                 Emit a CLD instruction before using the x86 '+
+  'string instructions'#010+
   '4*3CTcld_                 Emit a CLD instruction before using the x86 '+
   'string instructions'#010+
-  '8*3CTfarprocspushoddbp_       Increment BP before pushing it in the pr'+
-  'ologue of far functi','ons'#010+
+  '8','*3CTfarprocspushoddbp_       Increment BP before pushing it in the '+
+  'prologue of far functions'#010+
   'J*3CTcompactintarrayinit_ Generate smaller (but potentially slower) co'+
   'de for initializing integer array constants'#010+
-  'J*3CTenumfieldinit_       Initialize enumeration fields in constructor'+
-  's to enumtype(0), after calling inherited constructo','rs'#010+
+  'J*3CTenumfieldinit_       Initial','ize enumeration fields in construct'+
+  'ors to enumtype(0), after calling inherited constructors'#010+
   'J*3CTinitlocals_          Initialize local variables that trigger a JV'+
   'M bytecode verification error if used uninitialized (slows down code)'#010+
-  'J*3CTlowercaseprocstart_  Lowercase the first character of procedure/f'+
-  'unction/method names'#010+
-  'A*3CTt','humbinterworking_ Generate Thumb interworking-safe code if pos'+
-  'sible'#010+
+  'J*3CTlow','ercaseprocstart_  Lowercase the first character of procedure'+
+  '/function/method names'#010+
+  'A*3CTthumbinterworking_ Generate Thumb interworking-safe code if possi'+
+  'ble'#010+
   'J*2Cv_Var/out parameter copy-out checking'#010+
-  'A*2CV<x>_Set section threadvar model to <x>'#010+
+  'A*2CV<x>_Set section threadvar model to <','x>'#010+
   '**2CX_Create also smartlinked library'#010+
   '**1d<x>_Defines the symbol <x>'#010+
-  '**1D_Generate a D','EF file'#010+
+  '**1D_Generate a DEF file'#010+
   '**2DD<x>_Set the date string returned by %DATE% to x, it is not checke'+
   'd for being a valid date string'#010+
   '**2Dd<x>_Set description to <x>'#010+
-  '**2DT<x>_Set the time string returned by %TIME% to x, it is not checke'+
-  'd for being a valid time str','ing'#010+
+  '**2DT<x>_','Set the time string returned by %TIME% to x, it is not chec'+
+  'ked for being a valid time string'#010+
   '**2Dv<x>_Set DLL version to <x>'#010+
   '*O2Dw_PM application'#010+
   '**1e<x>_Set path to executable'#010+
   '**1E_Same as -Cn'#010+
   '**1fPIC_Same as -Cg'#010+
-  '**1F<x>_Set file names and paths:'#010+
+  '**1F<x>_Set file names and',' paths:'#010+
   '**2Fa<x>[,y]_(for a program) load units <x> and [y] before uses is par'+
   'sed'#010+
-  '**2Fc<x','>_Set input codepage to <x>'#010+
+  '**2Fc<x>_Set input codepage to <x>'#010+
   '**2FC<x>_Set RC compiler binary name to <x>'#010+
   '**2Fd_Disable the compiler'#039's internal directory cache'#010+
-  '**2FD<x>_Set the directory where to search for compiler utilities'#010+
+  '**2FD<x>_Set the director','y where to search for compiler utilities'#010+
   '**2Fe<x>_Redirect error output to <x>'#010+
-  '**2FE<x>_S','et exe/unit output path to <x>'#010+
+  '**2FE<x>_Set exe/unit output path to <x>'#010+
   '**2Ff<x>_Add <x> to framework path (Darwin only), or set IDF path to <'+
   'x> (Xtensa-FreeRTOS)'#010+
-  '**2FF_Use fpcres as RC to RES compiler instead of windres or gorc'#010+
+  '**2FF_Use fpcres as RC to RES',' compiler instead of windres or gorc'#010+
   '**2Fi<x>_Add <x> to include path'#010+
-  '**2Fl<x>_Add <x> to',' library path'#010+
+  '**2Fl<x>_Add <x> to library path'#010+
   '**2FL<x>_Use <x> as dynamic linker'#010+
   '**2Fm<x>_Load unicode conversion table from <x>.txt in the compiler di'+
   'r'#010+
-  '**2FM<x>_Set the directory where to search for unicode binary files'#010+
-  '**2FN<x>_Add <x> to list of default unit scopes (na','mespaces)'#010+
+  '**2FM<x>_Set the directory whe','re to search for unicode binary files'#010+
+  '**2FN<x>_Add <x> to list of default unit scopes (namespaces)'#010+
   '**2Fo<x>_Add <x> to object path'#010+
   '**2Fr<x>_Load error message file <x>'#010+
   '**2FR<x>_Set resource (.res) linker to <x>'#010+
-  '**2Fu<x>_Add <x> to unit path'#010+
+  '**2Fu<x>_Add <x> to unit path',#010+
   '**2FU<x>_Set unit output path to <x>, overrides -FE'#010+
-  '**2FW<x>_Store generated whole-progr','am optimization feedback in <x>'#010+
+  '**2FW<x>_Store generated whole-program optimization feedback in <x>'#010+
   '**2Fw<x>_Load previously stored whole-program optimization feedback fr'+
   'om <x>'#010+
-  '*g1g_Generate debug information (default format for target)'#010+
+  '*g1g_Generate debug information (default f','ormat for target)'#010+
   '*g2gc_Generate checks for pointers (experimental, only available on so'+
-  'm','e targets, might generate false positive)'#010+
+  'me targets, might generate false positive)'#010+
   '*g2gh_Use heaptrace unit (for memory leak/corruption debugging)'#010+
-  '*g2gl_Use line info unit (show more info with backtraces)'#010+
+  '*g2gl_Use line info unit (show more info with',' backtraces)'#010+
   '*g2gm_Generate Microsoft CodeView debug information (experimental)'#010+
-  '*g2go<x>_','Set debug information options'#010+
+  '*g2go<x>_Set debug information options'#010+
   '*g3godwarfsets_ Enable DWARF '#039'set'#039' type debug information (bre'+
   'aks gdb < 6.5)'#010+
-  '*g3gostabsabsincludes_ Store absolute/full include file paths in Stabs'+
-  #010+
-  '*g3godwarfmethodclassprefix_ Prefix method names in DWARF with',' class'+
-  ' name'#010+
+  '*g3gostabsabsincludes_ Store absolute/full i','nclude file paths in Sta'+
+  'bs'#010+
+  '*g3godwarfmethodclassprefix_ Prefix method names in DWARF with class n'+
+  'ame'#010+
   '*g3godwarfcpp_ Simulate C++ debug information in DWARF'#010+
   '*g3godwarfomflinnum_ Generate line number information in OMF LINNUM re'+
-  'cords in MS LINK format in addition to the DWARF debug information (Op'+
-  'en Watcom Debugger/Linker compati','bility)'#010+
+  'cords in MS LI','NK format in addition to the DWARF debug information ('+
+  'Open Watcom Debugger/Linker compatibility)'#010+
   '*g2gp_Preserve case in stabs symbol names'#010+
   '*g2gs_Generate Stabs debug information'#010+
-  '*g2gt_Trash local variables (to detect uninitialized uses; multiple '#039+
-  't'#039' changes the trashing value)'#010+
+  '*g2gt_Trash local variables (to detect uninitialized uses; mul','tiple '+
+  #039't'#039' changes the trashing value)'#010+
   '*g2gv_Generates programs traceable with Valgrind'#010+
-  '*g','2gw_Generate DWARFv2 debug information (same as -gw2)'#010+
+  '*g2gw_Generate DWARFv2 debug information (same as -gw2)'#010+
   '*g2gw2_Generate DWARFv2 debug information'#010+
   '*g2gw3_Generate DWARFv3 debug information'#010+
-  '*g2gw4_Generate DWARFv4 debug information (experimental)'#010+
+  '*g2gw4_Genera','te DWARFv4 debug information (experimental)'#010+
   '**1i_Information'#010+
   '**2iD_Return compiler date'#010+
-  '*','*2iSO_Return compiler OS'#010+
+  '**2iSO_Return compiler OS'#010+
   '**2iSP_Return compiler host processor'#010+
   '**2iTO_Return target OS'#010+
   '**2iTP_Return target processor'#010+
-  '**2iV_Return short compiler version'#010+
+  '**2iV_Return short compiler versi','on'#010+
   '**2iW_Return full compiler version'#010+
   '**2ia_Return list of supported ABI targets'#010+
-  '**2ib_Re','turn the used code generation backend type'#010+
+  '**2ib_Return the used code generation backend type'#010+
   '**2ic_Return list of supported CPU instruction sets'#010+
   '**2if_Return list of supported FPU instruction sets'#010+
-  '**2ii_Return list of supported inline assembler modes'#010+
-  '**2im_Return list of supported modeswit','ches'#010+
+  '**2i','i_Return list of supported inline assembler modes'#010+
+  '**2im_Return list of supported modeswitches'#010+
   '**2io_Return list of supported optimizations'#010+
   '**2ir_Return list of recognized compiler and RTL features'#010+
   '**2it_Return list of supported targets'#010+
-  '**2iu_Return list of supported microcontroller types'#010+
-  '**2iw_Return list of supported whole pro','gram optimizations'#010+
+  '**2i','u_Return list of supported microcontroller types'#010+
+  '**2iw_Return list of supported whole program optimizations'#010+
   '**1I<x>_Add <x> to include path'#010+
   '**1k<x>_Pass <x> to the linker'#010+
   '**1l_Write logo'#010+
-  '**1M<x>_Set language mode to <x> / enable modeswitch <x> (see option -'+
-  'im)'#010+
+  '**1M<x>_Set language mode to <x> / enable modeswitch ','<x> (see option'+
+  ' -im)'#010+
   '**2Mfpc_Free Pascal dialect (default)'#010+
-  '**2Mobjfpc_FPC mode with Objec','t Pascal support'#010+
+  '**2Mobjfpc_FPC mode with Object Pascal support'#010+
   '**2Mdelphi_Delphi 7 compatibility mode'#010+
   '**2Mtp_TP/BP 7.0 compatibility mode'#010+
   '**2Mmacpas_Macintosh Pascal dialects compatibility mode'#010+
-  '**2Miso_ISO 7185 mode'#010+
+  '**2','Miso_ISO 7185 mode'#010+
   '**2Mextendedpascal_ISO 10206 mode'#010+
-  '**2Mdelphiunicode_Delphi 2009 and la','ter compatibility mode'#010+
+  '**2Mdelphiunicode_Delphi 2009 and later compatibility mode'#010+
   '**2*_Each mode (as listed above) enables its default set of modeswitch'+
   'es.'#010+
-  '**2*_Other modeswitches are disabled and need to be enabled one by ano'+
-  'ther.'#010+
+  '**2*_Other modeswitches are disabled and need to be en','abled one by a'+
+  'nother.'#010+
   '**1M<x>-_Disable modeswitch <x> (see option -im)'#010+
-  '**1n_Do not read t','he default config files'#010+
+  '**1n_Do not read the default config files'#010+
   '**1o<x>_Change the name of the executable produced to <x>'#010+
   '**1O<x>_Optimizations:'#010+
   '**2O-_Disable optimizations'#010+
-  '**2O1_Level 1 optimizations (quick and debugger friendly)'#010+
-  '**2O2_Level 2 optimizations (-O1 + quick optimiza','tions)'#010+
+  '**2O1_Level 1 opti','mizations (quick and debugger friendly)'#010+
+  '**2O2_Level 2 optimizations (-O1 + quick optimizations)'#010+
   '**2O3_Level 3 optimizations (-O2 + slow optimizations)'#010+
   '**2O4_Level 4 optimizations (-O3 + optimizations which might have unex'+
-  'pected side effects)'#010+
+  'pected side effects',')'#010+
   '**2Oa<x>=<y>_Set alignment'#010+
-  '**2Oo[NO]<x>_Enable or disable optimizations; see fpc -i or ','fpc -io '+
-  'for possible values'#010+
+  '**2Oo[NO]<x>_Enable or disable optimizations; see fpc -i or fpc -io fo'+
+  'r possible values'#010+
   '**2Op<x>_Set target cpu for optimizing; see fpc -i or fpc -ic for poss'+
   'ible values'#010+
-  '**2OW<x>_Generate whole-program optimization feedback for optimization'+
-  ' <x>; see fpc -i or fpc -iw for possible values'#010+
-  '**2Ow<x>_Per','form whole-program optimization <x>; see fpc -i or fpc -'+
-  'iw for possible values'#010+
+  '**2OW<x>_Generate whole-program optimizat','ion feedback for optimizati'+
+  'on <x>; see fpc -i or fpc -iw for possible values'#010+
+  '**2Ow<x>_Perform whole-program optimization <x>; see fpc -i or fpc -iw'+
+  ' for possible values'#010+
   '**2Os_Optimize for size rather than speed'#010+
-  '**1pg_Generate profile code for gprof (defines FPC_PROFILE)'#010+
+  '**1pg_Generate profile code fo','r gprof (defines FPC_PROFILE)'#010+
   'F*1P<x>_Target CPU / compiler related options:'#010+
-  'F*2PB_Show d','efault compiler binary'#010+
+  'F*2PB_Show default compiler binary'#010+
   'F*2PP_Show default target cpu'#010+
   'F*2P<x>_Set target CPU (aarch64,arm,avr,i386,i8086,jvm,m68k,mips,mipse'+
-  'l,powerpc,powerpc64,sparc,x86_64)'#010+
+  'l,powerpc,powerpc64,sparc,x8','6_64)'#010+
   '**1R<x>_Assembler reading style:'#010+
   '**2Rdefault_Use default assembler for target'#010+
-  '3*2Ra','tt_Read AT&T style assembler'#010+
+  '3*2Ratt_Read AT&T style assembler'#010+
   '3*2Rintel_Read Intel style assembler'#010+
   '4*2Ratt_Read AT&T style assembler'#010+
   '4*2Rintel_Read Intel style assembler'#010+
-  '8*2Ratt_Read AT&T style assembler'#010+
+  '8*2Ratt_Read A','T&T style assembler'#010+
   '8*2Rintel_Read Intel style assembler'#010+
-  '6*2RMOT_Read Motorola style asse','mbler'#010+
+  '6*2RMOT_Read Motorola style assembler'#010+
   '**1S<x>_Syntax options:'#010+
   '**2S2_Same as -Mobjfpc'#010+
   '**2Sc_Support operators like C (*=,+=,/= and -=)'#010+
   '**2Sa_Turn on assertions'#010+
   '**2Sd_Same as -Mdelphi'#010+
-  '**2Se<x>_Error options. <x> is a combination of the following:'#010+
-  '**3*_<n> : Compiler halts a','fter the <n> errors (default is 1)'#010+
+  '*','*2Se<x>_Error options. <x> is a combination of the following:'#010+
+  '**3*_<n> : Compiler halts after the <n> errors (default is 1)'#010+
   '**3*_w : Compiler also halts after warnings'#010+
   '**3*_n : Compiler also halts after notes'#010+
-  '**3*_h : Compiler also halts after hints'#010+
+  '**3*_h : Compiler also halts af','ter hints'#010+
   '**2Sf_Enable certain features in compiler and RTL; see fpc -i or fpc -'+
-  'ir for po','ssible values)'#010+
+  'ir for possible values)'#010+
   '**2Sg_Enable LABEL and GOTO (default in -Mtp and -Mdelphi)'#010+
   '**2Sh_Use reference counted strings (ansistring by default) instead of'+
-  ' shortstrings'#010+
+  ' shorts','trings'#010+
   '**2Si_Turn on inlining of procedures/functions declared as "inline"'#010+
-  '**2Sj_Allows t','yped constants to be writeable (default in all modes)'#010+
+  '**2Sj_Allows typed constants to be writeable (default in all modes)'#010+
   '**2Sk_Load fpcylix unit'#010+
   '**2SI<x>_Set interface style to <x>'#010+
-  '**3SIcom_COM compatible interface (default)'#010+
+  '**3SIcom_COM compatible interface (de','fault)'#010+
   '**3SIcorba_CORBA compatible interface'#010+
-  '**2sT_Generate script only to link on target',#010+
+  '**2sT_Generate script only to link on target'#010+
   '**2Sm_Support macros like C (global)'#010+
   '**2So_Same as -Mtp'#010+
   '**2Sr_Transparent file names in ISO mode'#010+
-  '**2Ss_Constructor name must be init (destructor must be done)'#010+
+  '**2Ss_Constructor name must be init (destructor must ','be done)'#010+
   '**2Sv_Support vector processing (use CPU vector extensions if availabl'+
   'e)'#010+
-  '**2Sx_E','nable exception keywords (default in Delphi/ObjFPC modes)'#010+
+  '**2Sx_Enable exception keywords (default in Delphi/ObjFPC modes)'#010+
   '**2Sy_@<pointer> returns a typed pointer, same as $T+'#010+
   '**1s_Do not call assembler and linker'#010+
-  '**2sh_Generate script to link on host'#010+
-  '**2st_Generate script to assemble and link on target',#010+
+  '*','*2sh_Generate script to link on host'#010+
+  '**2st_Generate script to assemble and link on target'#010+
   '**2sr_Skip register allocation phase (use with -alr)'#010+
   '**1T<x>_Target operating system:'#010+
   '3*2Tandroid_Android'#010+
   '3*2Taros_AROS'#010+
   '3*2Tbeos_BeOS'#010+
-  '3*2Tdarwin_Darwin/Mac OS X'#010+
+  '3*2Tdarwin_Darwi','n/Mac OS X'#010+
   '3*2Tembedded_Embedded'#010+
   '3*2Temx_OS/2 via EMX (including EMX/RSX extender)'#010+
-  '3*2Tfr','eebsd_FreeBSD'#010+
+  '3*2Tfreebsd_FreeBSD'#010+
   '3*2Tgo32v2_Version 2 of DJ Delorie DOS extender'#010+
   '3*2Thaiku_Haiku'#010+
   '3*2Tiphonesim_iPhoneSimulator from iOS SDK 3.2+ (older versions: -Tdar'+
-  'win)'#010+
+  'win',')'#010+
   '3*2Tlinux_Linux'#010+
   '3*2Tnativent_Native NT API (experimental)'#010+
   '3*2Tnetbsd_NetBSD'#010+
-  '3*2Tnetware','_Novell Netware Module (clib)'#010+
+  '3*2Tnetware_Novell Netware Module (clib)'#010+
   '3*2Tnetwlibc_Novell Netware Module (libc)'#010+
   '3*2Topenbsd_OpenBSD'#010+
   '3*2Tos2_OS/2 / eComStation'#010+
   '3*2Tsymbian_Symbian OS'#010+
-  '3*2Tsolaris_Solaris'#010+
+  '3*2Tsolar','is_Solaris'#010+
   '3*2Twatcom_Watcom compatible DOS extender'#010+
   '3*2Twdosx_WDOSX DOS extender'#010+
-  '3*2Twin','32_Windows 32 Bit'#010+
+  '3*2Twin32_Windows 32 Bit'#010+
   '3*2Twince_Windows CE'#010+
   '4*2Tandroid_Android'#010+
   '4*2Taros_AROS'#010+
   '4*2Tdarwin_Darwin/Mac OS X'#010+
   '4*2Tdragonfly_DragonFly BSD'#010+
   '4*2Tembedded_Embedded'#010+
-  '4*2Tfreebsd_FreeBSD'#010+
+  '4','*2Tfreebsd_FreeBSD'#010+
   '4*2Thaiku_Haiku'#010+
   '4*2Tiphonesim_iPhoneSimulator'#010+
   '4*2Tlinux_Linux'#010+
-  '4*2Tnetb','sd_NetBSD'#010+
+  '4*2Tnetbsd_NetBSD'#010+
   '4*2Topenbsd_OpenBSD'#010+
   '4*2Tsolaris_Solaris'#010+
   '4*2Twin64_Win64 (64 bit Windows systems)'#010+
   '6*2Tamiga_Commodore Amiga'#010+
   '6*2Tatari_Atari ST/STe/TT'#010+
-  '6*2Tembedded_Embedded'#010+
+  '6*2Tembe','dded_Embedded'#010+
   '6*2Tlinux_Linux'#010+
   '6*2Tnetbsd_NetBSD'#010+
   '6*2Tmacosclassic_Classic Mac OS'#010+
-  '6*2Tpalmo','s_PalmOS'#010+
+  '6*2Tpalmos_PalmOS'#010+
   '6*2Tsinclairql_Sinclair QL'#010+
   '8*2Tembedded_Embedded'#010+
   '8*2Tmsdos_MS-DOS (and compatible)'#010+
   '8*2Twin16_Windows 16 Bit'#010+
   'A*2Tandroid_Android'#010+
-  'A*2Taros_AROS'#010+
+  'A*2Taros_AROS'#010,
   'A*2Tembedded_Embedded'#010+
   'A*2Tfreertos_FreeRTOS'#010+
   'A*2Tgba_Game Boy Advance'#010+
   'A*2Tios_iOS'#010+
-  'A*2Tlinu','x_Linux'#010+
+  'A*2Tlinux_Linux'#010+
   'A*2Tnds_Nintendo DS'#010+
   'A*2Tnetbsd_NetBSD'#010+
   'A*2Tpalmos_PalmOS'#010+
   'A*2Tsymbian_Symbian'#010+
   'A*2Twince_Windows CE'#010+
   'a*2Tandroid_Android'#010+
-  'a*2Tdarwin_Darwin/Mac OS X'#010+
+  'a*2Tdarwin_Darwin/Mac OS X',#010+
   'a*2Tios_iOS'#010+
   'a*2Tlinux_Linux'#010+
   'a*2Twin64_Windows 64'#010+
   'J*2Tandroid_Android'#010+
   'J*2Tjava_Java'#010+
-  'm*2Ta','ndroid_Android'#010+
+  'm*2Tandroid_Android'#010+
   'm*2Tembedded_Embedded'#010+
   'm*2Tlinux_Linux'#010+
   'M*2Tembedded_Embedded'#010+
@@ -1835,11 +1837,11 @@ const msgtxt : array[0..000363,1..240] of char=(
   'P*2Taix_AIX'#010+
   'P*2Tamiga_AmigaOS'#010+
   'P*2Tdarwin_Darwin/Mac OS X'#010+
-  'P*2Tembedded_Embedded'#010+
+  'P*2','Tembedded_Embedded'#010+
   'P*2Tlinux_Linux'#010+
   'P*2Tmacosclassic_Classic Mac OS'#010+
   'P*2Tmorphos_MorphOS'#010+
-  'P*','2Tnetbsd_NetBSD'#010+
+  'P*2Tnetbsd_NetBSD'#010+
   'P*2Twii_Wii'#010+
   'p*2Taix_AIX'#010+
   'p*2Tdarwin_Darwin/Mac OS X'#010+
@@ -1847,170 +1849,173 @@ const msgtxt : array[0..000363,1..240] of char=(
   'p*2Tlinux_Linux'#010+
   'R*2Tlinux_Linux'#010+
   'R*2Tembedded_Embedded'#010+
-  'r*2Tlinux_Linux'#010+
+  'r*2Tlinu','x_Linux'#010+
   'r*2Tembedded_Embedded'#010+
   'S*2Tlinux_Linux'#010+
   'S*2Tsolaris_Solaris'#010+
   's*2Tlinux_Linux'#010+
-  'V*2Temb','edded_Embedded'#010+
+  'V*2Tembedded_Embedded'#010+
   'x*2Tembedded_Embedded'#010+
   'x*2Tfreertos_FreeRTOS'#010+
   'x*2Tlinux_Linux'#010+
   'Z*2Tembedded_Embedded'#010+
   'Z*2Tzxspectrum_ZX Spectrum'#010+
   'Z*2Tmsxdos_MSX-DOS'#010+
-  'W*2Tembedded_Embedded'#010+
+  'W*2Tembe','dded_Embedded'#010+
   'W*2Twasi_The WebAssembly System Interface (WASI)'#010+
-  '**1u<x>_Undefines the symb','ol <x>'#010+
+  '**1u<x>_Undefines the symbol <x>'#010+
   '**1U_Unit options:'#010+
   '**2Un_Do not check where the unit name matches the file name'#010+
-  '**2Ur_Generate release unit files (never automatically recompiled)'#010+
+  '**2Ur_Generate release unit files (never automatically recompile','d)'#010+
   '**2Us_Compile a system unit'#010+
-  '**1v<x>_Be verbose. <x> is a combination of the following ','letters:'#010+
+  '**1v<x>_Be verbose. <x> is a combination of the following letters:'#010+
   '**2*_e : Show errors (default)       0 : Show nothing (except errors)'#010+
   '**2*_w : Show warnings               u : Show unit info'#010+
-  '**2*_n : Show notes                  t : Show tried/used files'#010+
-  '**2*_h : Show hints                  c : S','how conditionals'#010+
+  '**2*_n : Show no','tes                  t : Show tried/used files'#010+
+  '**2*_h : Show hints                  c : Show conditionals'#010+
   '**2*_i : Show general info           d : Show debug info'#010+
   '**2*_l : Show linenumbers            r : Rhide/GCC compatibility mode'#010+
-  '**2*_s : Show time stamps            q : Show message numbers'#010+
-  '**2*_a : Show everything          ','   x : Show info about invoked too'+
-  'ls'#010+
+  '**2*_s ',': Show time stamps            q : Show message numbers'#010+
+  '**2*_a : Show everything             x : Show info about invoked tools'+
+  #010+
   '**2*_b : Write file names messages   p : Write tree.log with parse tre'+
   'e'#010+
-  '**2*_    with full path              v : Write fpcdebug.txt with'#010+
+  '**2*_    with full path              v : W','rite fpcdebug.txt with'#010+
   '**2*_z : Write output to stderr          lots of debugging info'#010+
-  '**','2*_m<x>,<y> : Do not show messages numbered <x> and <y>'#010+
+  '**2*_m<x>,<y> : Do not show messages numbered <x> and <y>'#010+
   'F*1V<x>_Append '#039'-<x>'#039' to the used compiler binary name (e.g. f'+
   'or version)'#010+
-  '**1W<x>_Target-specific options (targets)'#010+
+  '**1W<x>_Target-specif','ic options (targets)'#010+
   '3*2WA_Specify native type application (Windows)'#010+
-  '4*2WA_Specify native',' type application (Windows)'#010+
+  '4*2WA_Specify native type application (Windows)'#010+
   'A*2WA_Specify native type application (Windows)'#010+
   '3*2Wb_Create a bundle instead of a library (Darwin)'#010+
-  'P*2Wb_Create a bundle instead of a library (Darwin)'#010+
+  'P*2Wb_Create a bundle i','nstead of a library (Darwin)'#010+
   'p*2Wb_Create a bundle instead of a library (Darwin)'#010+
-  'a*2Wb_Cr','eate a bundle instead of a library (Darwin)'#010+
+  'a*2Wb_Create a bundle instead of a library (Darwin)'#010+
   'A*2Wb_Create a bundle instead of a library (Darwin)'#010+
   '4*2Wb_Create a bundle instead of a library (Darwin)'#010+
-  '3*2WB_Create a relocatable image (Windows, Symbian)'#010+
-  '3*2WB<x>_Set image base to <x> (Windows,',' Symbian)'#010+
+  '3*2','WB_Create a relocatable image (Windows, Symbian)'#010+
+  '3*2WB<x>_Set image base to <x> (Windows, Symbian)'#010+
   '4*2WB_Create a relocatable image (Windows)'#010+
   '4*2WB<x>_Set image base to <x> (Windows)'#010+
   'A*2WB_Create a relocatable image (Windows, Symbian)'#010+
-  'A*2WB<x>_Set image base to <x> (Windows, Symbian)'#010+
-  'Z*2WB<x>_Set image base to <x> (ZX Spectrum)',#010+
+  'A*2WB','<x>_Set image base to <x> (Windows, Symbian)'#010+
+  'Z*2WB<x>_Set image base to <x> (ZX Spectrum)'#010+
   '3*2WC_Specify console type application (EMX, OS/2, Windows)'#010+
   '4*2WC_Specify console type application (Windows)'#010+
-  'A*2WC_Specify console type application (Windows)'#010+
+  'A*2WC_Specify console type application (W','indows)'#010+
   'P*2WC_Specify console type application (Classic Mac OS)'#010+
-  '3*2WD_Use DEFFILE to expo','rt functions of DLL or EXE (Windows)'#010+
+  '3*2WD_Use DEFFILE to export functions of DLL or EXE (Windows)'#010+
   '4*2WD_Use DEFFILE to export functions of DLL or EXE (Windows)'#010+
-  'A*2WD_Use DEFFILE to export functions of DLL or EXE (Windows)'#010+
+  'A*2WD_Use DEFFILE to export functions of DLL or EXE ','(Windows)'#010+
   '3*2We_Use external resources (Darwin)'#010+
   '4*2We_Use external resources (Darwin)'#010+
-  'a*2','We_Use external resources (Darwin)'#010+
+  'a*2We_Use external resources (Darwin)'#010+
   'A*2We_Use external resources (Darwin)'#010+
   'P*2We_Use external resources (Darwin)'#010+
   'p*2We_Use external resources (Darwin)'#010+
-  '3*2WF_Specify full-screen type application (EMX, OS/2)'#010+
-  '3*2WG_Specify graphic type applicati','on (EMX, OS/2, Windows)'#010+
+  '3*','2WF_Specify full-screen type application (EMX, OS/2)'#010+
+  '3*2WG_Specify graphic type application (EMX, OS/2, Windows)'#010+
   '4*2WG_Specify graphic type application (Windows)'#010+
   'A*2WG_Specify graphic type application (Windows)'#010+
-  'P*2WG_Specify graphic type application (Classic Mac OS)'#010+
+  'P*2WG_Specify graphic type ap','plication (Classic Mac OS)'#010+
   '3*2Wi_Use internal resources (Darwin)'#010+
-  '4*2Wi_Use internal resou','rces (Darwin)'#010+
+  '4*2Wi_Use internal resources (Darwin)'#010+
   'a*2Wi_Use internal resources (Darwin)'#010+
   'A*2Wi_Use internal resources (Darwin)'#010+
   'P*2Wi_Use internal resources (Darwin)'#010+
-  'p*2Wi_Use internal resources (Darwin)'#010+
+  'p*2Wi_Use internal reso','urces (Darwin)'#010+
   '3*2WI_Turn on/off the usage of import sections (Windows)'#010+
-  '4*2WI_Turn on/off',' the usage of import sections (Windows)'#010+
+  '4*2WI_Turn on/off the usage of import sections (Windows)'#010+
   'A*2WI_Turn on/off the usage of import sections (Windows)'#010+
-  '8*2Wh_Use huge code for units (ignored for models with CODE in a uniqu'+
-  'e segment)'#010+
+  '8*2Wh_Use huge code for units (ignored for models with',' CODE in a uni'+
+  'que segment)'#010+
   '8*2Wm<x>_Set memory model'#010+
   '8*3WmTiny_Tiny memory model'#010+
-  '8*3WmSma','ll_Small memory model (default)'#010+
+  '8*3WmSmall_Small memory model (default)'#010+
   '8*3WmMedium_Medium memory model'#010+
   '8*3WmCompact_Compact memory model'#010+
   '8*3WmLarge_Large memory model'#010+
-  '8*3WmHuge_Huge memory model'#010+
+  '8*3WmHuge_Huge memory m','odel'#010+
   '3*2WM<x>_Minimum Mac OS X deployment version: 10.4, 10.5.1, ... (Darwi'+
   'n)'#010+
-  '4*2WM<x>_Mi','nimum Mac OS X deployment version: 10.4, 10.5.1, ... (Dar'+
-  'win)'#010+
-  'p*2WM<x>_Minimum Mac OS X deployment version: 10.4, 10.5.1, ... (Darwi'+
+  '4*2WM<x>_Minimum Mac OS X deployment version: 10.4, 10.5.1, ... (Darwi'+
   'n)'#010+
-  'P*2WM<x>_Minimum Mac OS X deployment version: 10.4, 10.5.1, ... (Darwi'+
+  'p*2WM<x>_Minimum Mac OS X deployment version: 10.4, 10.5.1, ... (Darwi'+
   'n)'#010+
-  '3*2WN_Do not generate relocation',' code, needed for debugging (Windows'+
-  ')'#010+
+  'P*2WM<x>_Minimum',' Mac OS X deployment version: 10.4, 10.5.1, ... (Dar'+
+  'win)'#010+
+  '3*2WN_Do not generate relocation code, needed for debugging (Windows)'#010+
   '4*2WN_Do not generate relocation code, needed for debugging (Windows)'#010+
-  'A*2WN_Do not generate relocation code, needed for debugging (Windows)'#010+
-  'A*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu fo','r poss'+
-  'ible values'#010+
-  'm*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu for possib'+
+  'A*2WN_Do not generate relocation code, need','ed for debugging (Windows'+
+  ')'#010+
+  'A*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu for possib'+
   'le values'#010+
-  'R*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu for possib'+
+  'm*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu for possib'+
   'le values'#010+
-  'V*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu fo','r poss'+
+  'R*2Wp<x>_Specify the controller type; see fpc -i or f','pc -iu for poss'+
   'ible values'#010+
+  'V*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu for possib'+
+  'le values'#010+
   'x*2Wp<x>_Specify the controller type; see fpc -i or fpc -iu for possib'+
   'le values'#010+
-  '3*2WP<x>_Minimum iOS deployment version: 3.0, 5.0.1, ... (iphonesim)'#010+
+  '3*2WP<x>_Minimum iOS deployment version: 3.0, 5.0.1, ','... (iphonesim)'+
+  #010+
   '4*2WP<x>_Minimum iOS deployment version: 8.0, 8.0.2, ... (iphonesim)'#010+
-  'a*2W','P<x>_Minimum iOS deployment version: 7.0, 7.1.2, ... (Darwin)'#010+
+  'a*2WP<x>_Minimum iOS deployment version: 7.0, 7.1.2, ... (Darwin)'#010+
   'A*2WP<x>_Minimum iOS deployment version: 3.0, 5.0.1, ... (Darwin)'#010+
-  '3*2WR_Generate relocation code (Windows)'#010+
+  '3*2WR_Generate relocati','on code (Windows)'#010+
   '4*2WR_Generate relocation code (Windows)'#010+
-  'A*2WR_Generate relocation code',' (Windows)'#010+
+  'A*2WR_Generate relocation code (Windows)'#010+
   '8*2Wt<x>_Set the target executable format'#010+
   '8*3Wtexe_Create a DOS .EXE file (default)'#010+
-  '8*3Wtcom_Create a DOS .COM file (requires tiny memory model)'#010+
+  '8*3Wtcom_Create a DOS .COM file (requires tiny memory mo','del)'#010+
   'P*2WT_Specify MPW tool type application (Classic Mac OS)'#010+
-  '6*2WQ<x>_Set executable met','adata format (Sinclair QL)'#010+
+  '6*2WQ<x>_Set executable metadata format (Sinclair QL)'#010+
   '6*3WQqhdr_Set metadata to QDOS File Header style (default)'#010+
   '6*3WQxtcc_Set metadata to XTcc style'#010+
-  '**2WX_Enable executable stack (Linux)'#010+
+  '**2WX_Enable executable stac','k (Linux)'#010+
   '**1X_Executable options:'#010+
-  '**2X9_Generate linkerscript for GNU Binutils ld older ','than version 2'+
-  '.19.1 (Linux)'#010+
+  '**2X9_Generate linkerscript for GNU Binutils ld older than version 2.1'+
+  '9.1 (Linux)'#010+
   '**2Xa_Generate code which allows to use more than 2 GB static data on '+
   '64 Bit targets (Linux)'#010+
-  '**2Xc_Pass --shared/-dynamic to the linker (BeOS, Darwin, FreeBSD, Lin'+
-  'ux)'#010+
-  '**2Xd_Do not search default library path (som','etimes required for cro'+
-  'ss-compiling when not using -XR)'#010+
+  '**2Xc_Pass --shared/-dynamic t','o the linker (BeOS, Darwin, FreeBSD, L'+
+  'inux)'#010+
+  '**2Xd_Do not search default library path (sometimes required for cross'+
+  '-compiling when not using -XR)'#010+
   '**2Xe_Use external linker'#010+
   '**2Xf_Substitute pthread library name for linking (BSD)'#010+
-  '**2Xg_Create debuginfo in a separate file and add a debuglink section '+
-  'to executable'#010+
-  '**2XD_Try to link ','units dynamically      (defines FPC_LINK_DYNAMIC)'#010+
+  '**2Xg_Create ','debuginfo in a separate file and add a debuglink sectio'+
+  'n to executable'#010+
+  '**2XD_Try to link units dynamically      (defines FPC_LINK_DYNAMIC)'#010+
   '**2Xi_Use internal linker'#010+
   'L*2XlS<x>_LLVM utilties suffix (e.g. -7 in case clang is called clang-'+
   '7)'#010+
-  '**2XLA_Define library substitutions for linking'#010+
+  '**','2XLA_Define library substitutions for linking'#010+
   '**2XLO_Define order of library linking'#010+
-  '**2X','LD_Exclude default order of standard libraries'#010+
+  '**2XLD_Exclude default order of standard libraries'#010+
   '**2Xm_Generate link map'#010+
   '**2XM<x>_Set the name of the '#039'main'#039' program routine (default i'+
   's '#039'main'#039')'#010+
-  '**2Xn_Use target system native linker instead of GNU ld (Solaris, AIX)'+
-  #010+
-  'F*2Xp<x>_First search for ','the compiler binary in the directory <x>'#010+
+  '**2Xn_Us','e target system native linker instead of GNU ld (Solaris, AI'+
+  'X)'#010+
+  'F*2Xp<x>_First search for the compiler binary in the directory <x>'#010+
   '**2XP<x>_Prepend the binutils names with the prefix <x>'#010+
-  '**2Xr<x>_Set the linker'#039's rlink-path to <x> (needed for cross comp'+
-  'ile, see the ld manual for more information) (BeOS, Linux)'#010+
-  '**2XR<x>_Prepend <','x> to all linker search paths (BeOS, Darwin, FreeB'+
-  'SD, Linux, Mac OS, Solaris)'#010+
+  '**2Xr<x>_Set the linker'#039's rlink-path to <x> (needed fo','r cross co'+
+  'mpile, see the ld manual for more information) (BeOS, Linux)'#010+
+  '**2XR<x>_Prepend <x> to all linker search paths (BeOS, Darwin, FreeBSD'+
+  ', Linux, Mac OS, Solaris)'#010+
   '**2Xs_Strip all symbols from executable'#010+
-  '**2XS_Try to link units statically (default, defines FPC_LINK_STATIC)'#010+
-  '**2Xt_Link with static libraries (-static is passed ','to linker)'#010+
+  '**2XS_Try to link units staticall','y (default, defines FPC_LINK_STATIC'+
+  ')'#010+
+  '**2Xt_Link with static libraries (-static is passed to linker)'#010+
   '**2Xu_Generate executable in UF2 format  (embedded targets only)'#010+
   '**2Xv_Generate table for Virtual Entry calls'#010+
-  '**2XV_Use VLink as external linker       (default on Amiga, MorphOS)'#010+
-  '**2XX_Try to smartlink units             (defines ','FPC_LINK_SMART)'#010+
+  '**2XV_Use VLink as external li','nker       (default on Amiga, MorphOS)'+
+  #010+
+  '**2XX_Try to smartlink units             (defines FPC_LINK_SMART)'#010+
   '**1*_'#010+
   '**1?_Show this help'#010+
   '**1h_Shows this help without waiting'

+ 3 - 1
compiler/options.pas

@@ -1120,7 +1120,7 @@ begin
          (
           ((length(opt)>1) and (opt[2] in ['i','d','v','T','u','n','X','l','U'])) or
           ((length(opt)>3) and (opt[2]='F') and (opt[3]='e')) or
-          ((length(opt)>3) and (opt[2]='C') and (opt[3]='p')) or
+          ((length(opt)>3) and (opt[2]='C') and (opt[3] in ['a','f','p'])) or
           ((length(opt)>3) and (opt[2]='W') and (opt[3] in ['m','p']))
          )
         ) then
@@ -4496,6 +4496,8 @@ begin
       def_system_macro('CPUTHUMB');
       if not option.FPUSetExplicitly then
         init_settings.fputype:=fpu_soft;
+      if not(init_settings.fputype in [fpu_none,fpu_soft,fpu_libgcc]) then
+        Message2(option_unsupported_fpu,fputypestr[init_settings.fputype],'Thumb');
 {$if defined(FPC_ARMEL) or defined(FPC_ARMHF)}
       target_info.llvmdatalayout:='e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32-S64';
 {$else FPC_ARMAL or FPC_ARMHF}

+ 4 - 3
compiler/parser.pas

@@ -354,6 +354,10 @@ implementation
          exceptblockcounter:=0;
          current_settings.maxfpuregisters:=-1;
          current_settings.pmessage:=nil;
+
+         { Load current state from the init values }
+         current_settings:=init_settings;
+
        { reset the unit or create a new program }
          { a unit compiled at command line must be inside the loaded_unit list }
          if (compile_level=1) then
@@ -369,9 +373,6 @@ implementation
                 (current_module.state in [ms_compile,ms_second_compile])) then
            internalerror(200212281);
 
-         { Load current state from the init values }
-         current_settings:=init_settings;
-
          { load current asmdata from current_module }
          current_asmdata:=TAsmData(current_module.asmdata);
 

+ 0 - 1
compiler/sparc/cpuelf.pas

@@ -136,6 +136,5 @@ implementation
 initialization
   RegisterAssembler(as_sparc_elf32_info,TElfAssembler);
   ElfTarget:=elf_target_sparc;
-
 end.
 

+ 1 - 1
compiler/systems/i_linux.pas

@@ -679,7 +679,7 @@ unit i_linux;
             name         : 'Linux for ARMEL';
             shortname    : 'Linux';
             flags        : [tf_needs_symbol_size,tf_needs_symbol_type,tf_files_case_sensitive,
-                            tf_requires_proper_alignment,tf_safecall_exceptions,
+                            tf_needs_dwarf_cfi,tf_requires_proper_alignment,tf_safecall_exceptions,
 {$ifdef tls_threadvars}
                             tf_section_threadvars,
 {$endif tls_threadvars}

+ 1 - 2
packages/cocoaint/src/foundation/NSProcessInfo.inc

@@ -82,8 +82,7 @@ const
 {$ifdef CLASSES}
 
 type
-  NSProcessInfo_NSObject = objcclass external (NSObject)
-  public
+  NSProcessInfoActivity = objccategory external (NSProcessInfo)
     function beginActivityWithOptions_reason (options: NSActivityOptions; reason: NSString): NSObjectProtocol; message 'beginActivityWithOptions:reason:'; { available in 10_9, 7_0 }
     procedure endActivity (activity: NSObjectProtocol); message 'endActivity:'; { available in 10_9, 7_0 }
     procedure performActivityWithOptions_reason_usingBlock (options: NSActivityOptions; reason: NSString; block: OpaqueCBlock); message 'performActivityWithOptions:reason:usingBlock:'; { available in 10_9, 7_0 }

+ 1 - 0
packages/fcl-passrc/src/pasuseanalyzer.pas

@@ -2847,6 +2847,7 @@ begin
     begin
     // write without read
     if (vmExternal in El.VarModifiers)
+    or (El.ClassType=TPasProperty)
         or ((El.Parent is TPasClassType) and TPasClassType(El.Parent).IsExternal) then
       exit;
     if El.Visibility in [visPrivate,visStrictPrivate] then

+ 21 - 0
packages/fcl-passrc/tests/tcuseanalyzer.pas

@@ -114,6 +114,7 @@ type
     procedure TestM_Hint_InterfaceUnitVariableUsed;
     procedure TestM_Hint_ValueParameterIsAssignedButNeverUsed;
     procedure TestM_Hint_LocalVariableIsAssignedButNeverUsed;
+    procedure TestM_Hint_PropertyIsAssignedButNeverUsed;
     procedure TestM_Hint_LocalXYNotUsed;
     procedure TestM_Hint_PrivateFieldIsNeverUsed;
     procedure TestM_Hint_PrivateFieldIsAssignedButNeverUsed;
@@ -1917,6 +1918,26 @@ begin
   CheckUseAnalyzerUnexpectedHints;
 end;
 
+procedure TTestUseAnalyzer.TestM_Hint_PropertyIsAssignedButNeverUsed;
+begin
+  StartProgram(true);
+  Add([
+  'type',
+  '  TObject = class',
+  '  private',
+  '    FSize: word;',
+  '  public',
+  '    property ReadSize: word read FSize;',
+  '    property WriteSize: word write FSize;',
+  '  end;',
+  'var o: TObject;',
+  'begin',
+  '  o.WriteSize:=o.ReadSize;',
+  '']);
+  AnalyzeProgram;
+  CheckUseAnalyzerUnexpectedHints;
+end;
+
 procedure TTestUseAnalyzer.TestM_Hint_LocalXYNotUsed;
 begin
   StartProgram(true);

+ 6 - 6
rtl/linux/arm/sighnd.inc

@@ -20,7 +20,7 @@ begin
   result:=@HandleErrorAddrFrame;
 end;
 
-{$ifndef CPUTHUMB}
+{$if not(defined(CPUTHUMB)) and not(defined(CPUTHUMB2))}
 Procedure SignalToHandleErrorAddrFrame_ARM(Errno : longint;addr : CodePointer; frame : Pointer); nostackframe; assembler;
 asm
 {$if FPC_FULLVERSION >= 30200}
@@ -38,7 +38,7 @@ asm
   pop {r0,r1,r2,pc}
 .text
 end;
-{$endif not CPUTHUMB}
+{$endif not(defined(CPUTHUMB)) and not(defined(CPUTHUMB2))}
 
 {$if FPC_FULLVERSION >= 30200}
 Procedure SignalToHandleErrorAddrFrame_Thumb(Errno : longint;addr : CodePointer; frame : Pointer); nostackframe; assembler;
@@ -57,9 +57,9 @@ asm
   mov lr, r0
   pop {r0,r1,r2,pc}
 .text
-{$ifndef CPUTHUMB}
+{$if not(defined(CPUTHUMB)) and not(defined(CPUTHUMB2))}
 .code 32
-{$endif CPUTHUMB}
+{$endif not(defined(CPUTHUMB)) and not(defined(CPUTHUMB2))}
 end;
 {$endif}
 
@@ -102,13 +102,13 @@ begin
       ucontext^.uc_mcontext.arm_r1:=uContext^.uc_mcontext.arm_pc;
       ucontext^.uc_mcontext.arm_r2:=uContext^.uc_mcontext.arm_fp;
 {$if FPC_FULLVERSION >= 30200}
-{$ifndef CPUTHUMB}
+{$if not(defined(CPUTHUMB)) and not(defined(CPUTHUMB2))}
       if (ucontext^.uc_mcontext.arm_cpsr and (1 shl 5))=0 then
         begin
           ucontext^.uc_mcontext.arm_pc:=ptruint(@SignalToHandleErrorAddrFrame_ARM);
         end
       else
-{$endif not CPUTHUMB}
+{$endif not(defined(CPUTHUMB)) and not(defined(CPUTHUMB2))}
         begin
           ucontext^.uc_mcontext.arm_pc:=ptruint(@SignalToHandleErrorAddrFrame_Thumb);
         end;