* some assembling problems fixed

  * improved loadaddr_ref_reg

compiler/arm/armreg.dat

@@ -36,59 +36,63 @@ F6,$02,$06,f6,32
 F7,$02,$07,f7,32
 
 ; MM registers
-S0,$02,$00,s0,0
-S1,$02,$00,s1,0
-D0,$02,$00,d0,0
-S2,$02,$00,s2,0
-S3,$02,$00,s3,0
-D1,$02,$00,d1,0
-S4,$02,$00,s4,0
-S5,$02,$00,s5,0
-D2,$02,$00,d2,0
-S6,$02,$00,s6,0
-S7,$02,$00,s7,0
-D3,$02,$00,d3,0
-S8,$02,$00,s8,0
-S9,$02,$00,s9,0
-D4,$02,$00,d4,0
-S10,$02,$00,s10,0
-S11,$02,$00,s11,0
-D5,$02,$00,d5,0
-S12,$02,$00,s12,0
-S13,$02,$00,s13,0
-D6,$02,$00,d6,0
-S14,$02,$00,s14,0
-S15,$02,$00,s15,0
-D7,$02,$00,d7,0
-S16,$02,$00,s16,0
-S17,$02,$00,s17,0
-D8,$02,$00,d8,0
-S18,$02,$00,s18,0
-S19,$02,$00,s19,0
-D9,$02,$00,d9,0
-S20,$02,$00,s20,0
-S21,$02,$00,s21,0
-D10,$02,$00,d10,0
-S22,$02,$00,s22,0
-S23,$02,$00,s23,0
-D11,$02,$00,d11,0
-S24,$02,$00,s24,0
-S25,$02,$00,s25,0
-D12,$02,$00,d12,0
-S26,$02,$00,s26,0
-S27,$02,$00,s27,0
-D13,$02,$00,d13,0
-S28,$02,$00,s28,0
-S29,$02,$00,s29,0
-D14,$02,$00,d14,0
-S30,$02,$00,s20,0
-S31,$02,$00,s21,0
-D15,$02,$00,d15,0
+S0,$03,$00,s0,0
+S1,$03,$00,s1,0
+D0,$03,$00,d0,0
+S2,$03,$00,s2,0
+S3,$03,$00,s3,0
+D1,$03,$00,d1,0
+S4,$03,$00,s4,0
+S5,$03,$00,s5,0
+D2,$03,$00,d2,0
+S6,$03,$00,s6,0
+S7,$03,$00,s7,0
+D3,$03,$00,d3,0
+S8,$03,$00,s8,0
+S9,$03,$00,s9,0
+D4,$03,$00,d4,0
+S10,$03,$00,s10,0
+S11,$03,$00,s11,0
+D5,$03,$00,d5,0
+S12,$03,$00,s12,0
+S13,$03,$00,s13,0
+D6,$03,$00,d6,0
+S14,$03,$00,s14,0
+S15,$03,$00,s15,0
+D7,$03,$00,d7,0
+S16,$03,$00,s16,0
+S17,$03,$00,s17,0
+D8,$03,$00,d8,0
+S18,$03,$00,s18,0
+S19,$03,$00,s19,0
+D9,$03,$00,d9,0
+S20,$03,$00,s20,0
+S21,$03,$00,s21,0
+D10,$03,$00,d10,0
+S22,$03,$00,s22,0
+S23,$03,$00,s23,0
+D11,$03,$00,d11,0
+S24,$03,$00,s24,0
+S25,$03,$00,s25,0
+D12,$03,$00,d12,0
+S26,$03,$00,s26,0
+S27,$03,$00,s27,0
+D13,$03,$00,d13,0
+S28,$03,$00,s28,0
+S29,$03,$00,s29,0
+D14,$03,$00,d14,0
+S30,$03,$00,s20,0
+S31,$03,$00,s21,0
+D15,$03,$00,d15,0
 
 
 ;
 ; $Log$
-; Revision 1.1  2003-09-04 00:15:29  florian
+; Revision 1.2  2003-09-09 12:53:39  florian
+;   * some assembling problems fixed
+;   * improved loadaddr_ref_reg
+;
+; Revision 1.1  2003/09/04 00:15:29  florian
 ;   * first bunch of adaptions of arm compiler for new register type
 ;
 ;

compiler/arm/cgcpu.pas

@@ -443,7 +443,12 @@ unit cgcpu;
             not(is_pc(ref.index))
            ) or
            (ref.offset<-4095) or
-           (ref.offset>4095) then
+           (ref.offset>4095) or
+           ((oppostfix in [PF_SB,PF_H,PF_SH]) and
+            ((ref.offset<-255) or
+             (ref.offset>255)
+            )
+           ) then
           begin
             { check consts distance }
 
@@ -729,7 +734,7 @@ unit cgcpu;
             { restore int registers and return }
             reference_reset(ref);
             ref.index:=NR_FRAME_POINTER_REG;
--            list.concat(setoppostfix(taicpu.op_ref_regset(A_LDM,ref,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R13,RS_R15]),PF_EA));
+            list.concat(setoppostfix(taicpu.op_ref_regset(A_LDM,ref,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R13,RS_R15]),PF_EA));
           end;
       end;
 
@@ -744,7 +749,10 @@ unit cgcpu;
       var
         b : byte;
         tmpref : treference;
+        instr : taicpu;
       begin
+        if ref.addressmode<>AM_OFFSET then
+          internalerror(200309071);
         tmpref:=ref;
         { Be sure to have a base register }
         if (tmpref.base=NR_NO) then
@@ -760,12 +768,23 @@ unit cgcpu;
            ((tmpref.base<>NR_NO) and (tmpref.index<>NR_NO)) then
           fixref(list,tmpref);
 
-        if ref.index<>NR_NO then
+        if tmpref.index<>NR_NO then
           begin
+            {!!!!!!!}
           end
-{        else
-          list.concat(taicpu.op_reg_reg(A_MOV,r,));
-          ref.signindex<0 then }
+        else
+          begin
+            if tmpref.offset>0 then
+              list.concat(taicpu.op_reg_reg_const(A_ADD,r,tmpref.base,tmpref.offset))
+            else if tmpref.offset<0 then
+              list.concat(taicpu.op_reg_reg_const(A_SUB,r,tmpref.base,-tmpref.offset))
+            else
+              begin
+                instr:=taicpu.op_reg_reg(A_MOV,r,tmpref.base);
+                rg.add_move_instruction(instr);
+                list.concat(instr);
+              end;
+          end;
       end;
 
 
@@ -1093,7 +1112,11 @@ begin
 end.
 {
   $Log$
-  Revision 1.17  2003-09-06 16:45:51  florian
+  Revision 1.18  2003-09-09 12:53:40  florian
+    * some assembling problems fixed
+    * improved loadaddr_ref_reg
+
+  Revision 1.17  2003/09/06 16:45:51  florian
     * fixed exit code (no preindexed addressing mode in LDM)
 
   Revision 1.16  2003/09/06 11:21:50  florian

compiler/arm/cpupara.pas

@@ -242,7 +242,7 @@ unit cpupara;
                         end
                       else
                          begin
-                            nextintreg := RS_R4;
+                            nextintreg:=RS_R4;
                             paraloc.loc:=LOC_REFERENCE;
                             paraloc.reference.index:=NR_STACK_POINTER_REG;
                             paraloc.reference.offset:=stack_offset;
@@ -258,7 +258,7 @@ unit cpupara;
                       if nextfloatreg<=RS_F3 then
                         begin
                            paraloc.loc:=LOC_FPUREGISTER;
-                           paraloc.register:=nextfloatreg;
+                           paraloc.register:=newreg(R_FPUREGISTER,nextfloatreg,R_SUBWHOLE);
                            inc(nextfloatreg);
                         end
                       else
@@ -328,7 +328,11 @@ begin
 end.
 {
   $Log$
-  Revision 1.5  2003-09-05 23:57:01  florian
+  Revision 1.6  2003-09-09 12:53:40  florian
+    * some assembling problems fixed
+    * improved loadaddr_ref_reg
+
+  Revision 1.5  2003/09/05 23:57:01  florian
     * arm is working again as before the new register naming scheme was implemented
 
   Revision 1.4  2003/09/04 00:15:29  florian

compiler/arm/rarmcon.inc

@@ -24,51 +24,51 @@ NR_F4 = $02000004;
 NR_F5 = $02000005;
 NR_F6 = $02000006;
 NR_F7 = $02000007;
-NR_S0 = $02000000;
-NR_S1 = $02000000;
-NR_D0 = $02000000;
-NR_S2 = $02000000;
-NR_S3 = $02000000;
-NR_D1 = $02000000;
-NR_S4 = $02000000;
-NR_S5 = $02000000;
-NR_D2 = $02000000;
-NR_S6 = $02000000;
-NR_S7 = $02000000;
-NR_D3 = $02000000;
-NR_S8 = $02000000;
-NR_S9 = $02000000;
-NR_D4 = $02000000;
-NR_S10 = $02000000;
-NR_S11 = $02000000;
-NR_D5 = $02000000;
-NR_S12 = $02000000;
-NR_S13 = $02000000;
-NR_D6 = $02000000;
-NR_S14 = $02000000;
-NR_S15 = $02000000;
-NR_D7 = $02000000;
-NR_S16 = $02000000;
-NR_S17 = $02000000;
-NR_D8 = $02000000;
-NR_S18 = $02000000;
-NR_S19 = $02000000;
-NR_D9 = $02000000;
-NR_S20 = $02000000;
-NR_S21 = $02000000;
-NR_D10 = $02000000;
-NR_S22 = $02000000;
-NR_S23 = $02000000;
-NR_D11 = $02000000;
-NR_S24 = $02000000;
-NR_S25 = $02000000;
-NR_D12 = $02000000;
-NR_S26 = $02000000;
-NR_S27 = $02000000;
-NR_D13 = $02000000;
-NR_S28 = $02000000;
-NR_S29 = $02000000;
-NR_D14 = $02000000;
-NR_S30 = $02000000;
-NR_S31 = $02000000;
-NR_D15 = $02000000;
+NR_S0 = $03000000;
+NR_S1 = $03000000;
+NR_D0 = $03000000;
+NR_S2 = $03000000;
+NR_S3 = $03000000;
+NR_D1 = $03000000;
+NR_S4 = $03000000;
+NR_S5 = $03000000;
+NR_D2 = $03000000;
+NR_S6 = $03000000;
+NR_S7 = $03000000;
+NR_D3 = $03000000;
+NR_S8 = $03000000;
+NR_S9 = $03000000;
+NR_D4 = $03000000;
+NR_S10 = $03000000;
+NR_S11 = $03000000;
+NR_D5 = $03000000;
+NR_S12 = $03000000;
+NR_S13 = $03000000;
+NR_D6 = $03000000;
+NR_S14 = $03000000;
+NR_S15 = $03000000;
+NR_D7 = $03000000;
+NR_S16 = $03000000;
+NR_S17 = $03000000;
+NR_D8 = $03000000;
+NR_S18 = $03000000;
+NR_S19 = $03000000;
+NR_D9 = $03000000;
+NR_S20 = $03000000;
+NR_S21 = $03000000;
+NR_D10 = $03000000;
+NR_S22 = $03000000;
+NR_S23 = $03000000;
+NR_D11 = $03000000;
+NR_S24 = $03000000;
+NR_S25 = $03000000;
+NR_D12 = $03000000;
+NR_S26 = $03000000;
+NR_S27 = $03000000;
+NR_D13 = $03000000;
+NR_S28 = $03000000;
+NR_S29 = $03000000;
+NR_D14 = $03000000;
+NR_S30 = $03000000;
+NR_S31 = $03000000;
+NR_D15 = $03000000;

compiler/arm/rarmrni.inc

@@ -17,13 +17,13 @@
 15,
 16,
 17,
-50,
-51,
-52,
-53,
-54,
-55,
-56,
+18,
+19,
+20,
+21,
+22,
+23,
+24,
 25,
 26,
 27,
@@ -49,13 +49,13 @@
 47,
 48,
 49,
-66,
-67,
-68,
-69,
-70,
-71,
-72,
+50,
+51,
+52,
+53,
+54,
+55,
+56,
 57,
 58,
 59,
@@ -65,10 +65,10 @@
 63,
 64,
 65,
-18,
-19,
-20,
-21,
-22,
-23,
-24
+66,
+67,
+68,
+69,
+70,
+71,
+72