+ added test tlea2.pp, which tests the LEA instruction with a 64-bit, 32-bit and

  16-bit operand size on x86_64

git-svn-id: trunk@25810 -

.gitattributes

@@ -11431,6 +11431,7 @@ tests/test/tisorec1.pp svneol=native#text/pascal
 tests/test/tisorec2.pp svneol=native#text/pascal
 tests/test/tisorec3.pp svneol=native#text/pascal
 tests/test/tlea1.pp svneol=native#text/plain
+tests/test/tlea2.pp svneol=native#text/plain
 tests/test/tlib1a.pp svneol=native#text/plain
 tests/test/tlib1b.pp svneol=native#text/plain
 tests/test/tlib2a.pp svneol=native#text/plain

tests/test/tlea2.pp

@@ -0,0 +1,66 @@
+{ %cpu=x86_64 }
+
+program tlea2;
+
+{$ASMMODE intel}
+
+procedure Fail;
+begin
+  Writeln('Error!');
+  Halt(1);
+end;
+
+procedure TestO64A64;
+var
+  res: QWord;
+begin
+  Writeln('Testing LEA with 64-bit operand size and 64-bit address size...');
+  asm
+    mov rcx, 0deadbeefdeadbeefh
+    mov rdi, 0abcdefedcbabcdefh
+    mov rbx, 05566778899aabbcch
+    lea rbx, [rcx + rdi * 8 + 12345678h]
+    mov res, rbx
+  end ['RBX', 'RCX', 'RDI'];
+  if res <> $3D1D3E5E4E4084DF then
+    Fail;
+end;
+
+procedure TestO32A64;
+var
+  res: QWord;
+begin
+  Writeln('Testing LEA with 32-bit operand size and 64-bit address size...');
+  asm
+    mov rcx, 0deadbeefdeadbeefh
+    mov rdi, 0abcdefedcbabcdefh
+    mov rbx, 05566778899aabbcch
+    lea ebx, [rcx + rdi * 8 + 12345678h]
+    mov res, rbx
+  end ['RBX', 'RCX', 'RDI'];
+  if res <> $4E4084DF then
+    Fail;
+end;
+
+procedure TestO16A64;
+var
+  res: QWord;
+begin
+  Writeln('Testing LEA with 16-bit operand size and 64-bit address size...');
+  asm
+    mov rcx, 0deadbeefdeadbeefh
+    mov rdi, 0abcdefedcbabcdefh
+    mov rbx, 05566778899aabbcch
+    lea bx, [rcx + rdi * 8 + 12345678h]
+    mov res, rbx
+  end ['RBX', 'RCX', 'RDI'];
+  if res <> $5566778899AA84DF then
+    Fail;
+end;
+
+begin
+  TestO64A64;
+  TestO32A64;
+  TestO16A64;
+  Writeln('Success!');
+end.