* fixed sparc bootstrap

  * use -Av9 assembler option so it accepts the memory barrier opcodes

git-svn-id: trunk@8244 -

compiler/options.pas

@@ -2049,6 +2049,7 @@ begin
 {$ifdef powerpc64}
   def_system_macro('FPC_HAS_LWSYNC');
 {$endif}
+  def_system_macro('FPC_HAS_MEMBAR');
 
 {$if defined(x86) or defined(arm)}
   def_system_macro('INTERNAL_BACKTRACE');

compiler/sparc/cpugas.pas

@@ -224,7 +224,7 @@ implementation
            id     : as_ggas;
            idtxt  : 'GAS';
            asmbin : 'gas';
-           asmcmd : '-o $OBJ $ASM';
+           asmcmd : '-Av9 -o $OBJ $ASM';
            supported_target : system_any;
            flags : [af_allowdirect,af_needar,af_smartlink_sections];
            labelprefix : '.L';

rtl/sparc/sparc.inc

@@ -522,9 +522,11 @@ const
 
 procedure ReadBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
 asm
+{$ifdef FPC_HAS_MEMBAR}
   ba,pt .L1
   membar LoadLoad
 .L1:
+{$endif}
 end;
 
 procedure ReadDependencyBarrier;{$ifdef SYSTEMINLINE}inline;{$endif}
@@ -534,16 +536,20 @@ end;
 
 procedure ReadWriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
 asm
+{$ifdef FPC_HAS_MEMBAR}
   ba,pt .L1
   membar LoadLoad + LoadStore + StoreLoad + StoreStore
 .L1:
+{$endif}
 end;
 
 procedure WriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
 asm
+{$ifdef FPC_HAS_MEMBAR}
   ba,pt .L1
   stbar
 .L1:
+{$endif}
 end;
 
 {$endif}