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@@ -451,7 +451,7 @@ const
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{$q-}
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{$define overflowon}
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{$endif}
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- a_op_const_reg_reg(list,op,size,aword(-a),src,dst);
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+ a_op_const_reg_reg(list,OP_ADD,size,aword(-a),src,dst);
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{$ifdef overflowon}
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{$q+}
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{$undef overflowon}
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@@ -482,11 +482,13 @@ const
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end
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else if (longint(a) >= 0) and
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(longint(a) <= high(word)) and
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- (op <> OP_ADD) and
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((op <> OP_AND) or
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not gotrlwi) then
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begin
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- list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
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+ if (op = OP_ADD) then
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+ list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)))
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+ else
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+ list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
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exit;
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end;
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{ all basic constant instructions also have a shifted form that }
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@@ -711,9 +713,8 @@ const
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{ left }
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testbit := (32 - testbit) and 31;
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{ extract bit }
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- if testbit <> 0 then
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- list.concat(taicpu.op_reg_reg_const_const_const(
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- A_RLWINM,reg,reg,testbit,31,31));
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+ list.concat(taicpu.op_reg_reg_const_const_const(
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+ A_RLWINM,reg,reg,testbit,31,31));
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{ if we need the inverse, xor with 1 }
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if not bitvalue then
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list.concat(taicpu.op_reg_reg_const(A_XORI,reg,reg,1));
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@@ -1445,7 +1446,11 @@ begin
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end.
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{
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$Log$
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- Revision 1.34 2002-08-05 08:58:53 jonas
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+ Revision 1.35 2002-08-06 07:12:05 jonas
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+ * fixed bug in g_flags2reg()
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+ * and yet more constant operation fixes :)
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+
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+ Revision 1.34 2002/08/05 08:58:53 jonas
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* fixed compilation problems
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Revision 1.33 2002/08/04 12:57:55 jonas
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