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@@ -1495,6 +1495,7 @@ end;
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Y := Y + YOffset; { adjust pixel for correct virtual page }
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Y := Y + YOffset; { adjust pixel for correct virtual page }
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{ }
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{ }
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offs := longint(y) * BytesPerLine + (x div 8);
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offs := longint(y) * BytesPerLine + (x div 8);
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+ SetReadBank(smallint(offs shr 16));
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SetWriteBank(smallint(offs shr 16));
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SetWriteBank(smallint(offs shr 16));
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PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes }
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PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes }
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@@ -1503,7 +1504,7 @@ end;
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Port[$3ce] := 8; { Index 08 : Bitmask register. }
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Port[$3ce] := 8; { Index 08 : Bitmask register. }
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Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify }
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Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify }
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- dummy := Mem[WinWriteSeg: word(offs)]; { Latch the data into host space. }
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+ dummy := Mem[WinReadSeg: word(offs)]; { Latch the data into host space. }
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Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory }
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Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory }
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PortW[$3ce] := $ff08; { Enable all bit planes. }
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PortW[$3ce] := $ff08; { Enable all bit planes. }
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PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. }
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PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. }
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@@ -1568,6 +1569,7 @@ end;
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end;
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end;
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Y := Y + YOffset;
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Y := Y + YOffset;
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offs := longint(y) * BytesPerLine + (x div 8);
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offs := longint(y) * BytesPerLine + (x div 8);
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+ SetReadBank(smallint(offs shr 16));
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SetWriteBank(smallint(offs shr 16));
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SetWriteBank(smallint(offs shr 16));
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PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes }
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PortW[$3ce] := $0f01; { Index 01 : Enable ops on all 4 planes }
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PortW[$3ce] := color shl 8; { Index 00 : Enable correct plane and write color }
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PortW[$3ce] := color shl 8; { Index 00 : Enable correct plane and write color }
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@@ -1575,7 +1577,7 @@ end;
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Port[$3ce] := 8; { Index 08 : Bitmask register. }
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Port[$3ce] := 8; { Index 08 : Bitmask register. }
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Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify }
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Port[$3cf] := $80 shr (x and $7); { Select correct bits to modify }
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- dummy := Mem[WinWriteSeg: word(offs)]; { Latch the data into host space. }
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+ dummy := Mem[WinReadSeg: word(offs)]; { Latch the data into host space. }
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Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory }
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Mem[WinWriteSeg: word(offs)] := dummy; { Write the data into video memory }
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PortW[$3ce] := $ff08; { Enable all bit planes. }
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PortW[$3ce] := $ff08; { Enable all bit planes. }
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PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. }
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PortW[$3ce] := $0001; { Index 01 : Disable ops on all four planes. }
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