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m68k: handle operand type correctly for 3 operand mul/div

git-svn-id: trunk@36334 -
Károly Balogh 8 years ago
parent
commit
e9ff684ff0
1 changed files with 5 additions and 1 deletions
  1. 5 1
      compiler/m68k/aasmcpu.pas

+ 5 - 1
compiler/m68k/aasmcpu.pas

@@ -466,10 +466,14 @@ type
           A_ADD, A_ADDQ, A_ADDX, A_SUB, A_SUBQ, A_SUBX,
           A_AND, A_LSR, A_LSL, A_ASR, A_ASL, A_EOR, A_EORI, A_OR,
           A_ROL, A_ROR, A_ROXL, A_ROXR,
-          A_MULS, A_MULU, A_DIVS, A_DIVU, A_DIVSL, A_DIVUL, A_REMS, A_REMU,
           A_BSET, A_BCLR:
             if opnr=1 then
               result:=operand_readwrite;
+          A_MULS, A_MULU, A_DIVS, A_DIVU, A_DIVSL, A_DIVUL, A_REMS, A_REMU:
+            { FIXME: actually, one of the operand of the 3 op DIV/MUL is write only,
+                     but we can't handle it easily... }
+            if opnr>0 then
+              result:=operand_readwrite;
           A_DBRA:
             if opnr=0 then
               result:=operand_readwrite;