* moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for

    future use by high level code generator targets
   o this in turn required that all a_load*_loc* methods are called via
     hlcg rather than via cg, since a location can be a subsetref/reg and
     and those are no longer handled in tcg
   o that then required moving several force_location_* routines into
     thlcg because they use a_load_loc*, but did not take tdef size
     parameters (which are required by the thlcg a_load_loc* routines)
   o the only practical consequence is that from now on, you have to
     use hlcg.location_force_mem/reg() (fpureg not yet) and
     hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
     and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
     might be involved

git-svn-id: trunk@21287 -

.gitattributes

@@ -499,6 +499,7 @@ compiler/ppcavr.lpi svneol=native#text/plain
 compiler/ppcgen/aasmcpu.pas svneol=native#text/plain
 compiler/ppcgen/agppcgas.pas svneol=native#text/plain
 compiler/ppcgen/cgppc.pas svneol=native#text/plain
+compiler/ppcgen/hlcgppc.pas svneol=native#text/plain
 compiler/ppcgen/ngppcadd.pas svneol=native#text/plain
 compiler/ppcgen/ngppccnv.pas svneol=native#text/plain
 compiler/ppcgen/ngppcinl.pas svneol=native#text/plain

compiler/arm/narmcnv.pas

@@ -65,7 +65,7 @@ implementation
       ncon,ncal,
       ncgutil,
       cpubase,cpuinfo,aasmcpu,
-      rgobj,tgobj,cgobj,cgcpu;
+      rgobj,tgobj,cgobj,hlcgobj,cgcpu;
 
 
 {*****************************************************************************
@@ -145,7 +145,7 @@ implementation
             begin
               { convert first to double to avoid precision loss }
               location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
-              location_force_reg(current_asmdata.CurrAsmList,left.location,OS_32,true);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
               location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
               instr:=taicpu.op_reg_reg(A_FLT,location.register,left.location.register);
               if is_signed(left.resultdef) then
@@ -242,7 +242,7 @@ implementation
               { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
               if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
                  ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
-                location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
               else
                 location.size:=newsize;
               current_procinfo.CurrTrueLabel:=oldTrueLabel;
@@ -268,7 +268,7 @@ implementation
                  end
                 else
                  begin
-                   location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+                   hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                    tcgarm(cg).cgsetflags:=true;
                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
                    tcgarm(cg).cgsetflags:=false;

compiler/arm/narmmat.pas

@@ -50,7 +50,7 @@ implementation
       cutils,verbose,globals,constexp,
       aasmbase,aasmcpu,aasmtai,aasmdata,
       defutil,
-      cgbase,cgobj,cgutils,
+      cgbase,cgobj,hlcgobj,cgutils,
       pass_2,procinfo,
       ncon,
       cpubase,cpuinfo,
@@ -194,7 +194,7 @@ implementation
            not(is_64bitint(resultdef)) then
           begin
             size:=def_cgsize(left.resultdef);
-            location_force_reg(current_asmdata.CurrAsmList,left.location,size,true);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
 
             location_copy(location,left.location);
             location.loc := LOC_REGISTER;
@@ -213,7 +213,7 @@ implementation
               end
             else
               begin
-                location_force_reg(current_asmdata.CurrAsmList,right.location,size,true);
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,left.resultdef,true);
 
                 if is_signed(left.resultdef) or
                    is_signed(right.resultdef) then
@@ -228,8 +228,8 @@ implementation
 
             { put numerator in register }
             size:=def_cgsize(left.resultdef);
-            location_force_reg(current_asmdata.CurrAsmList,left.location,
-              size,true);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+              left.resultdef,left.resultdef,true);
             location_copy(location,left.location);
             numerator:=location.register;
             resultreg:=location.register;
@@ -299,7 +299,7 @@ implementation
               LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE,
               LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF :
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                   current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMP,left.location.register,0));
                   location_reset(location,LOC_FLAGS,OS_NO);
                   location.resflags:=F_EQ;

compiler/avr/navrmat.pas

@@ -45,7 +45,7 @@ implementation
       cutils,verbose,globals,constexp,
       aasmbase,aasmcpu,aasmtai,aasmdata,
       defutil,
-      cgbase,cgobj,cgutils,
+      cgbase,cgobj,hlcgobj,cgutils,
       pass_2,procinfo,
       ncon,
       cpubase,
@@ -168,8 +168,8 @@ implementation
 {
         { put numerator in register }
         size:=def_cgsize(left.resultdef);
-        location_force_reg(current_asmdata.CurrAsmList,left.location,
-          size,true);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+          left.resultdef,left.resultdef,true);
         location_copy(location,left.location);
         numerator:=location.register;
         resultreg:=location.register;
@@ -241,7 +241,7 @@ implementation
               LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE,
               LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF :
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                   current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CPI,left.location.register,0));
                   tmpreg:=left.location.register;
 

compiler/cg64f32.pas

@@ -313,9 +313,9 @@ unit cg64f32;
             tmpsref.ref.index:=tmpreg;
           end;
         tmpsref.bitlen:=32;
-        cg.a_load_subsetref_reg(list,OS_32,OS_32,tmpsref,destreg.reglo);
+        hlcg.a_load_subsetref_reg(list,u32inttype,u32inttype,tmpsref,destreg.reglo);
         inc(tmpsref.ref.offset,4);
-        cg.a_load_subsetref_reg(list,OS_32,OS_32,tmpsref,destreg.reghi);
+        hlcg.a_load_subsetref_reg(list,u32inttype,u32inttype,tmpsref,destreg.reghi);
       end;
 
 
@@ -342,9 +342,9 @@ unit cg64f32;
           end;
         tmpsref:=sref;
         tmpsref.bitlen:=32;
-        cg.a_load_reg_subsetref(list,OS_32,OS_32,fromreg.reglo,tmpsref);
+        hlcg.a_load_reg_subsetref(list,u32inttype,u32inttype,fromreg.reglo,tmpsref);
         inc(tmpsref.ref.offset,4);
-        cg.a_load_reg_subsetref(list,OS_32,OS_32,fromreg.reghi,tmpsref);
+        hlcg.a_load_reg_subsetref(list,u32inttype,u32inttype,fromreg.reghi,tmpsref);
       end;
 
 
@@ -360,9 +360,9 @@ unit cg64f32;
           swap64(a);
         tmpsref := sref;
         tmpsref.bitlen := 32;
-        cg.a_load_const_subsetref(list,OS_32,aint(lo(a)),tmpsref);
+        hlcg.a_load_const_subsetref(list,u32inttype,aint(lo(a)),tmpsref);
         inc(tmpsref.ref.offset,4);
-        cg.a_load_const_subsetref(list,OS_32,aint(hi(a)),tmpsref);
+        hlcg.a_load_const_subsetref(list,u32inttype,aint(hi(a)),tmpsref);
       end;
 
 

compiler/hlcg2ll.pas

@@ -172,46 +172,8 @@ unit hlcg2ll;
           procedure a_load_ref_ref(list : TAsmList;fromsize, tosize : tdef;const sref : treference;const dref : treference);override;
           procedure a_load_loc_reg(list : TAsmList;fromsize, tosize : tdef; const loc: tlocation; reg : tregister);override;
           procedure a_load_loc_ref(list : TAsmList;fromsize, tosize: tdef; const loc: tlocation; const ref : treference);override;
-          procedure a_load_loc_subsetreg(list : TAsmList;fromsize, tosize, tosubsetsize: tdef; const loc: tlocation; const sreg : tsubsetregister);override;
-          procedure a_load_loc_subsetref(list : TAsmList;fromsize, tosize, tosubsetsize: tdef; const loc: tlocation; const sref : tsubsetreference);override;
           procedure a_loadaddr_ref_reg(list : TAsmList;fromsize, tosize : tdef;const ref : treference;r : tregister);override;
 
-          procedure a_load_subsetreg_reg(list : TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister); override;
-          procedure a_load_reg_subsetreg(list : TAsmList; fromsize, tosize, tosubsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister); override;
-          procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize : tdef; const fromsreg, tosreg: tsubsetregister); override;
-          procedure a_load_subsetreg_ref(list : TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; const destref: treference); override;
-          procedure a_load_ref_subsetreg(list : TAsmList; fromsize, tosize,tosubsetsize: tdef; const fromref: treference; const sreg: tsubsetregister); override;
-          procedure a_load_const_subsetreg(list: TAsmlist; tosize, tosubsetsize: tdef; a: aint; const sreg: tsubsetregister); override;
-          procedure a_load_subsetreg_loc(list: TAsmlist; fromsize, fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; const loc: tlocation); override;
-
-          procedure a_load_subsetref_reg(list : TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sref: tsubsetreference; destreg: tregister); override;
-          procedure a_load_reg_subsetref(list : TAsmList; fromsize, tosubsetsize, tosize: tdef; fromreg: tregister; const sref: tsubsetreference);override;
-          procedure a_load_subsetref_subsetref(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize : tdef; const fromsref, tosref: tsubsetreference); override;
-          procedure a_load_subsetref_ref(list : TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sref: tsubsetreference; const destref: treference); override;
-          procedure a_load_ref_subsetref(list : TAsmList; fromsize, tosize, tosubsetsize: tdef; const fromref: treference; const sref: tsubsetreference); override;
-          procedure a_load_const_subsetref(list: TAsmlist; tosize, tosubsetsize: tdef; a: aint; const sref: tsubsetreference); override;
-          procedure a_load_subsetref_loc(list: TAsmlist; fromsize, fromsubsetsize, tosize: tdef; const sref: tsubsetreference; const loc: tlocation); override;
-          procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize : tdef; const fromsref: tsubsetreference; const tosreg: tsubsetregister); override;
-          procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize : tdef; const fromsreg: tsubsetregister; const tosref: tsubsetreference); override;
-
-          { bit test instructions }
-          procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tdef;bitnumber,value,destreg: tregister); override;
-          procedure a_bit_test_const_ref_reg(list: TAsmList; fromsize, destsize: tdef; bitnumber: aint; const ref: treference; destreg: tregister); override;
-          procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tdef; bitnumber: aint; setreg, destreg: tregister); override;
-          procedure a_bit_test_const_subsetreg_reg(list: TAsmList; fromsize, fromsubsetsize, destsize: tdef; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); override;
-          procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, refsize, destsize: tdef; bitnumber: tregister; const ref: treference; destreg: tregister); override;
-          procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, locsize, destsize: tdef; bitnumber: tregister; const loc: tlocation; destreg: tregister);override;
-          procedure a_bit_test_const_loc_reg(list: TAsmList; locsize, destsize: tdef; bitnumber: aint; const loc: tlocation; destreg: tregister);override;
-
-          { bit set/clear instructions }
-          procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tdef; bitnumber,dest: tregister); override;
-          procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tdef; bitnumber: aint; const ref: treference); override;
-          procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; destreg: tregister); override;
-          procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize, destsubsetsize: tdef; bitnumber: aint; const destreg: tsubsetregister); override;
-          procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; fromsize, tosize: tdef; bitnumber: tregister; const ref: treference); override;
-          procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; fromsize, tosize: tdef; bitnumber: tregister; const loc: tlocation);override;
-          procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; tosize: tdef; bitnumber: aint; const loc: tlocation);override;
-
           { bit scan instructions }
           procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: tdef; src, dst: tregister); override;
 
@@ -231,7 +193,9 @@ unit hlcg2ll;
           procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tdef;reg1, reg2: tregister;shuffle : pmmshuffle); override;
           procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tdef;const ref: treference; reg: tregister;shuffle : pmmshuffle); override;
           procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tdef;reg: tregister; const ref: treference;shuffle : pmmshuffle); override;
-          procedure a_loadmm_loc_reg(list: TAsmList; fromsize, tosize: tdef; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);override;
+}
+          procedure a_loadmm_loc_reg(list: TAsmList; fromsize, tosize: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);override;
+{
           procedure a_loadmm_reg_loc(list: TAsmList; fromsize, tosize: tdef; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);override;
           procedure a_loadmm_reg_cgpara(list: TAsmList; fromsize: tdef; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); override;
           procedure a_loadmm_ref_cgpara(list: TAsmList; fromsize: tdef; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); override;
@@ -252,14 +216,10 @@ unit hlcg2ll;
           { destination (JM)                                                    }
           procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; reg: TRegister); override;
           procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference); override;
-          procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : tdef; a : aint; const sreg: tsubsetregister); override;
-          procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : tdef; a : aint; const sref: tsubsetreference); override;
           procedure a_op_const_loc(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; const loc: tlocation);override;
           procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: tdef; reg1, reg2: TRegister); override;
           procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: tdef; reg: TRegister; const ref: TReference); override;
           procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: tdef; const ref: TReference; reg: TRegister); override;
-          procedure a_op_reg_subsetreg(list: TAsmList; Op: TOpCG; opsize, destsize, destsubsetsize: tdef; reg: TRegister; const sreg: tsubsetregister); override;
-          procedure a_op_reg_subsetref(list: TAsmList; Op: TOpCG; opsize, destsize, destsubsetsize: tdef; reg: TRegister; const sref: tsubsetreference); override;
           procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; size: tdef; reg: tregister; const loc: tlocation);override;
           procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; size: tdef; const ref: TReference; const loc: tlocation);override;
 
@@ -281,11 +241,8 @@ unit hlcg2ll;
           procedure a_cmp_reg_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
           procedure a_cmp_ref_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); override;
           procedure a_cmp_reg_ref_label(list : TAsmList;size : tdef;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); override;
-          procedure a_cmp_subsetreg_reg_label(list: TAsmList; fromsize, fromsubsetsize, cmpsize: tdef; cmp_op: topcmp; const sreg: tsubsetregister; reg: tregister; l: tasmlabel); override;
-          procedure a_cmp_subsetref_reg_label(list: TAsmList; fromsize, fromsubsetsize, cmpsize: tdef; cmp_op: topcmp; const sref: tsubsetreference; reg: tregister; l: tasmlabel); override;
 
           procedure a_cmp_loc_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);override;
-          procedure a_cmp_reg_loc_label(list : TAsmList;size : tdef;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);override;
           procedure a_cmp_ref_loc_label(list: TAsmList; size: tdef;cmp_op: topcmp; const ref: treference; const loc: tlocation; l : tasmlabel);override;
 
           procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
@@ -391,6 +348,10 @@ unit hlcg2ll;
           procedure maketojumpbool(list:TAsmList; p : tnode);override;
 
           procedure gen_load_para_value(list:TAsmList);override;
+         protected
+          procedure gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation;const cgpara: tcgpara;locintsize: longint);override;
+         public
+
 
           procedure gen_load_loc_cgpara(list: TAsmList; vardef: tdef; const l: tlocation; const cgpara: tcgpara); override;
           procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean); override;
@@ -547,7 +508,13 @@ implementation
 
   procedure thlcg2ll.a_load_const_loc(list: TAsmList; tosize: tdef; a: aint; const loc: tlocation);
     begin
-      cg.a_load_const_loc(list,a,loc);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_load_const_loc(list,a,loc);
+      end;
     end;
 
   procedure thlcg2ll.a_load_reg_ref(list: TAsmList; fromsize, tosize: tdef; register: tregister; const ref: treference);
@@ -567,7 +534,16 @@ implementation
 
   procedure thlcg2ll.a_load_reg_loc(list: TAsmList; fromsize, tosize: tdef; reg: tregister; const loc: tlocation);
     begin
-      cg.a_load_reg_loc(list,def_cgsize(fromsize),reg,loc);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited;
+        else
+          { fromsize can be a floatdef (in case the destination is an
+            MMREGISTER) -> use int_cgsize rather than def_cgsize to get the
+            corresponding integer cgsize of the def }
+          cg.a_load_reg_loc(list,int_cgsize(fromsize.size),reg,loc);
+      end;
     end;
 
   procedure thlcg2ll.a_load_ref_reg(list: TAsmList; fromsize, tosize: tdef; const ref: treference; register: tregister);
@@ -587,179 +563,31 @@ implementation
 
   procedure thlcg2ll.a_load_loc_reg(list: TAsmList; fromsize, tosize: tdef; const loc: tlocation; reg: tregister);
     begin
-      cg.a_load_loc_reg(list,def_cgsize(tosize),loc,reg);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_load_loc_reg(list,def_cgsize(tosize),loc,reg);
+      end;
     end;
 
   procedure thlcg2ll.a_load_loc_ref(list: TAsmList; fromsize, tosize: tdef; const loc: tlocation; const ref: treference);
     begin
-      cg.a_load_loc_ref(list,def_cgsize(tosize),loc,ref);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_load_loc_ref(list,def_cgsize(tosize),loc,ref);
+      end;
     end;
 
-  procedure thlcg2ll.a_load_loc_subsetreg(list: TAsmList; fromsize, tosize, tosubsetsize: tdef; const loc: tlocation; const sreg: tsubsetregister);
-    begin
-      cg.a_load_loc_subsetreg(list,def_cgsize(tosubsetsize),loc,sreg);
-    end;
-
-  procedure thlcg2ll.a_load_loc_subsetref(list: TAsmList; fromsize, tosize, tosubsetsize: tdef; const loc: tlocation; const sref: tsubsetreference);
-    begin
-      cg.a_load_loc_subsetref(list,def_cgsize(tosubsetsize),loc,sref);
-    end;
-
-procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; const ref: treference; r: tregister);
+  procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; const ref: treference; r: tregister);
     begin
       cg.a_loadaddr_ref_reg(list,ref,r);
     end;
 
-  procedure thlcg2ll.a_load_subsetreg_reg(list: TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister);
-    begin
-      cg.a_load_subsetreg_reg(list,def_cgsize(fromsubsetsize),def_cgsize(tosize),sreg,destreg);
-    end;
-
-  procedure thlcg2ll.a_load_reg_subsetreg(list: TAsmList; fromsize, tosize, tosubsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister);
-    begin
-      cg.a_load_reg_subsetreg(list,def_cgsize(fromsize),def_cgsize(tosubsetsize),fromreg,sreg);
-    end;
-
-  procedure thlcg2ll.a_load_subsetreg_subsetreg(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize: tdef; const fromsreg, tosreg: tsubsetregister);
-    begin
-      cg.a_load_subsetreg_subsetreg(list,def_cgsize(fromsubsetsize),def_cgsize(tosubsetsize),fromsreg,tosreg);
-    end;
-
-  procedure thlcg2ll.a_load_subsetreg_ref(list: TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; const destref: treference);
-    begin
-      cg.a_load_subsetreg_ref(list,def_cgsize(fromsubsetsize),def_cgsize(tosize),sreg,destref);
-    end;
-
-  procedure thlcg2ll.a_load_ref_subsetreg(list: TAsmList; fromsize, tosize, tosubsetsize: tdef; const fromref: treference; const sreg: tsubsetregister);
-    begin
-      cg.a_load_ref_subsetreg(list,def_cgsize(fromsize),def_cgsize(tosubsetsize),fromref,sreg);
-    end;
-
-  procedure thlcg2ll.a_load_const_subsetreg(list: TAsmlist; tosize, tosubsetsize: tdef; a: aint; const sreg: tsubsetregister);
-    begin
-      cg.a_load_const_subsetreg(list,def_cgsize(tosubsetsize),a,sreg);
-    end;
-
-  procedure thlcg2ll.a_load_subsetreg_loc(list: TAsmlist; fromsize, fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; const loc: tlocation);
-    begin
-      cg.a_load_subsetreg_loc(list,def_cgsize(fromsubsetsize),sreg,loc);
-    end;
-
-  procedure thlcg2ll.a_load_subsetref_reg(list: TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sref: tsubsetreference; destreg: tregister);
-    begin
-      cg.a_load_subsetref_reg(list,def_cgsize(fromsubsetsize),def_cgsize(tosize),sref,destreg);
-    end;
-
-  procedure thlcg2ll.a_load_reg_subsetref(list: TAsmList; fromsize, tosubsetsize, tosize: tdef; fromreg: tregister; const sref: tsubsetreference);
-    begin
-      cg.a_load_reg_subsetref(list,def_cgsize(fromsize),def_cgsize(tosubsetsize),fromreg,sref);
-    end;
-
-  procedure thlcg2ll.a_load_subsetref_subsetref(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize: tdef; const fromsref, tosref: tsubsetreference);
-    begin
-       cg.a_load_subsetref_subsetref(list,def_cgsize(fromsubsetsize),def_cgsize(tosubsetsize),fromsref,tosref);
-    end;
-
-  procedure thlcg2ll.a_load_subsetref_ref(list: TAsmList; fromsize, fromsubsetsize, tosize: tdef; const sref: tsubsetreference; const destref: treference);
-    begin
-      cg.a_load_subsetref_ref(list,def_cgsize(fromsubsetsize),def_cgsize(tosize),sref,destref);
-    end;
-
-  procedure thlcg2ll.a_load_ref_subsetref(list: TAsmList; fromsize, tosize, tosubsetsize: tdef; const fromref: treference; const sref: tsubsetreference);
-    begin
-      cg.a_load_ref_subsetref(list,def_cgsize(fromsize),def_cgsize(tosubsetsize),fromref,sref);
-    end;
-
-  procedure thlcg2ll.a_load_const_subsetref(list: TAsmlist; tosize, tosubsetsize: tdef; a: aint; const sref: tsubsetreference);
-    begin
-      cg.a_load_const_subsetref(list,def_cgsize(tosubsetsize),a,sref);
-    end;
-
-  procedure thlcg2ll.a_load_subsetref_loc(list: TAsmlist; fromsize, fromsubsetsize, tosize: tdef; const sref: tsubsetreference; const loc: tlocation);
-    begin
-      cg.a_load_subsetref_loc(list,def_cgsize(fromsubsetsize),sref,loc);
-    end;
-
-  procedure thlcg2ll.a_load_subsetref_subsetreg(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize: tdef; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
-    begin
-      cg.a_load_subsetref_subsetreg(list,def_cgsize(fromsubsetsize),def_cgsize(tosubsetsize),fromsref,tosreg);
-    end;
-
-  procedure thlcg2ll.a_load_subsetreg_subsetref(list: TAsmlist; fromsize, fromsubsetsize, tosize, tosubsetsize: tdef; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
-    begin
-      cg.a_load_subsetreg_subsetref(list,def_cgsize(fromsubsetsize),def_cgsize(tosubsetsize),fromsreg,tosref);
-    end;
-
-  procedure thlcg2ll.a_bit_test_reg_reg_reg(list: TAsmList; bitnumbersize, valuesize, destsize: tdef; bitnumber, value, destreg: tregister);
-    begin
-      cg.a_bit_test_reg_reg_reg(list,def_cgsize(bitnumbersize),def_cgsize(valuesize),def_cgsize(destsize),bitnumber,value,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_test_const_ref_reg(list: TAsmList; fromsize, destsize: tdef; bitnumber: aint; const ref: treference; destreg: tregister);
-    begin
-      cg.a_bit_test_const_ref_reg(list,def_cgsize(destsize),bitnumber,ref,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tdef; bitnumber: aint; setreg, destreg: tregister);
-    begin
-      cg.a_bit_test_const_reg_reg(list,def_cgsize(setregsize),def_cgsize(destsize),bitnumber,setreg,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_test_const_subsetreg_reg(list: TAsmList; fromsize, fromsubsetsize, destsize: tdef; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
-    begin
-      cg.a_bit_test_const_subsetreg_reg(list,def_cgsize(fromsubsetsize),def_cgsize(destsize),bitnumber,setreg,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, refsize, destsize: tdef; bitnumber: tregister; const ref: treference; destreg: tregister);
-    begin
-      cg.a_bit_test_reg_ref_reg(list,def_cgsize(bitnumbersize),def_cgsize(destsize),bitnumber,ref,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, locsize, destsize: tdef; bitnumber: tregister; const loc: tlocation; destreg: tregister);
-    begin
-      cg.a_bit_test_reg_loc_reg(list,def_cgsize(bitnumbersize),def_cgsize(destsize),bitnumber,loc,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_test_const_loc_reg(list: TAsmList; locsize, destsize: tdef; bitnumber: aint; const loc: tlocation; destreg: tregister);
-    begin
-      cg.a_bit_test_const_loc_reg(list,def_cgsize(destsize),bitnumber,loc,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_set_reg_reg(list: TAsmList; doset: boolean; bitnumbersize, destsize: tdef; bitnumber, dest: tregister);
-    begin
-      cg.a_bit_set_reg_reg(list,doset,def_cgsize(bitnumbersize),def_cgsize(destsize),bitnumber,dest);
-    end;
-
-  procedure thlcg2ll.a_bit_set_const_ref(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; const ref: treference);
-    begin
-      cg.a_bit_set_const_ref(list,doset,def_cgsize(destsize),bitnumber,ref);
-    end;
-
-  procedure thlcg2ll.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; destreg: tregister);
-    begin
-      cg.a_bit_set_const_reg(list,doset,def_cgsize(destsize),bitnumber,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize, destsubsetsize: tdef; bitnumber: aint; const destreg: tsubsetregister);
-    begin
-      cg.a_bit_set_const_subsetreg(list,doset,def_cgsize(destsubsetsize),bitnumber,destreg);
-    end;
-
-  procedure thlcg2ll.a_bit_set_reg_ref(list: TAsmList; doset: boolean; fromsize, tosize: tdef; bitnumber: tregister; const ref: treference);
-    begin
-      cg.a_bit_set_reg_ref(list,doset,def_cgsize(fromsize),bitnumber,ref);
-    end;
-
-  procedure thlcg2ll.a_bit_set_reg_loc(list: TAsmList; doset: boolean; fromsize, tosize: tdef; bitnumber: tregister; const loc: tlocation);
-    begin
-      cg.a_bit_set_reg_loc(list,doset,def_cgsize(fromsize),bitnumber,loc);
-    end;
-
-  procedure thlcg2ll.a_bit_set_const_loc(list: TAsmList; doset: boolean; tosize: tdef; bitnumber: aint; const loc: tlocation);
-    begin
-      cg.a_bit_set_const_loc(list,doset,bitnumber,loc);
-    end;
-
   procedure thlcg2ll.a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: tdef; src, dst: tregister);
     begin
       cg.a_bit_scan_reg_reg(list,reverse,def_cgsize(size),src,dst);
@@ -821,6 +649,23 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
       cg.a_loadfpu_ref_cgpara(list,def_cgsize(fromsize),ref,cgpara);
     end;
 
+  procedure thlcg2ll.a_loadmm_loc_reg(list: TAsmList; fromsize, tosize: tcgsize; const loc: tlocation; const reg: tregister; shuffle: pmmshuffle);
+    var
+      tmpreg: tregister;
+    begin
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          begin
+            tmpreg:=cg.getintregister(list,loc.size);
+            a_load_loc_reg(list,tcgsize2orddef(fromsize),tcgsize2orddef(fromsize),loc,tmpreg);
+            cg.a_loadmm_intreg_reg(list,loc.size,tosize,tmpreg,reg,shuffle);
+          end
+        else
+          cg.a_loadmm_loc_reg(list,tosize,loc,reg,shuffle);
+      end;
+    end;
+
 (*
   procedure thlcg2ll.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tdef; reg1, reg2: tregister; shuffle: pmmshuffle);
     begin
@@ -901,23 +746,19 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
       cg.a_op_const_ref(list,op,def_cgsize(size),a,ref);
     end;
 
-  procedure thlcg2ll.a_op_const_subsetreg(list: TAsmList; Op: TOpCG; size, subsetsize: tdef; a: aint; const sreg: tsubsetregister);
-    begin
-      cg.a_op_const_subsetreg(list,op,def_cgsize(size),def_cgsize(subsetsize),a,sreg);
-    end;
-
-  procedure thlcg2ll.a_op_const_subsetref(list: TAsmList; Op: TOpCG; size, subsetsize: tdef; a: aint; const sref: tsubsetreference);
-    begin
-      cg.a_op_const_subsetref(list,op,def_cgsize(size),def_cgsize(subsetsize),a,sref);
-    end;
-
   procedure thlcg2ll.a_op_const_loc(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const loc: tlocation);
     begin
 {$ifdef extdebug}
       if def_cgsize(size)<>loc.size then
         internalerror(2010112106);
 {$endif}
-      cg.a_op_const_loc(list,op,a,loc);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_op_const_loc(list,op,a,loc);
+      end;
     end;
 
   procedure thlcg2ll.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: tdef; reg1, reg2: TRegister);
@@ -935,23 +776,19 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
       cg.a_op_ref_reg(list,op,def_cgsize(size),ref,reg);
     end;
 
-  procedure thlcg2ll.a_op_reg_subsetreg(list: TAsmList; Op: TOpCG; opsize, destsize, destsubsetsize: tdef; reg: TRegister; const sreg: tsubsetregister);
-    begin
-      cg.a_op_reg_subsetreg(list,op,def_cgsize(opsize),def_cgsize(destsubsetsize),reg,sreg);
-    end;
-
-  procedure thlcg2ll.a_op_reg_subsetref(list: TAsmList; Op: TOpCG; opsize, destsize, destsubsetsize: tdef; reg: TRegister; const sref: tsubsetreference);
-    begin
-      cg.a_op_reg_subsetref(list,op,def_cgsize(opsize),def_cgsize(destsubsetsize),reg,sref);
-    end;
-
   procedure thlcg2ll.a_op_reg_loc(list: TAsmList; Op: TOpCG; size: tdef; reg: tregister; const loc: tlocation);
     begin
 {$ifdef extdebug}
       if def_cgsize(size)<>loc.size then
         internalerror(2010112107);
 {$endif}
-      cg.a_op_reg_loc(list,op,reg,loc)
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_op_reg_loc(list,op,reg,loc)
+      end;
     end;
 
   procedure thlcg2ll.a_op_ref_loc(list: TAsmList; Op: TOpCG; size: tdef; const ref: TReference; const loc: tlocation);
@@ -960,7 +797,13 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
       if def_cgsize(size)<>loc.size then
         internalerror(2010112101);
 {$endif}
-      cg.a_op_ref_loc(list,op,ref,loc);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_op_ref_loc(list,op,ref,loc);
+      end;
     end;
 
   procedure thlcg2ll.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister);
@@ -995,7 +838,13 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
 
   procedure thlcg2ll.a_cmp_const_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const loc: tlocation; l: tasmlabel);
     begin
-      cg.a_cmp_const_loc_label(list,def_cgsize(size),cmp_op,a,loc,l);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_cmp_const_loc_label(list,def_cgsize(size),cmp_op,a,loc,l);
+      end;
     end;
 
   procedure thlcg2ll.a_cmp_reg_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; reg1, reg2: tregister; l: tasmlabel);
@@ -1013,29 +862,26 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
       cg.a_cmp_reg_ref_label(list,def_cgsize(size),cmp_op,reg,ref,l);
     end;
 
-  procedure thlcg2ll.a_cmp_subsetreg_reg_label(list: TAsmList; fromsize, fromsubsetsize, cmpsize: tdef; cmp_op: topcmp; const sreg: tsubsetregister; reg: tregister; l: tasmlabel);
-    begin
-      cg.a_cmp_subsetreg_reg_label(list,def_cgsize(fromsubsetsize),def_cgsize(cmpsize),cmp_op,sreg,reg,l);
-    end;
-
-  procedure thlcg2ll.a_cmp_subsetref_reg_label(list: TAsmList; fromsize, fromsubsetsize, cmpsize: tdef; cmp_op: topcmp; const sref: tsubsetreference; reg: tregister; l: tasmlabel);
-    begin
-      cg.a_cmp_subsetref_reg_label(list,def_cgsize(fromsubsetsize),def_cgsize(cmpsize),cmp_op,sref,reg,l);
-    end;
-
   procedure thlcg2ll.a_cmp_loc_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; const loc: tlocation; reg: tregister; l: tasmlabel);
     begin
-      cg.a_cmp_loc_reg_label(list,def_cgsize(size),cmp_op,loc,reg,l);
-    end;
-
-  procedure thlcg2ll.a_cmp_reg_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; reg: tregister; const loc: tlocation; l: tasmlabel);
-    begin
-      cg.a_cmp_reg_loc_label(list,def_cgsize(size),cmp_op,reg,loc,l);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_cmp_loc_reg_label(list,def_cgsize(size),cmp_op,loc,reg,l);
+      end;
     end;
 
   procedure thlcg2ll.a_cmp_ref_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; const ref: treference; const loc: tlocation; l: tasmlabel);
     begin
-      cg.a_cmp_ref_loc_label(list,def_cgsize(size),cmp_op,ref,loc,l);
+      case loc.loc of
+        LOC_SUBSETREG,LOC_CSUBSETREG,
+        LOC_SUBSETREF,LOC_CSUBSETREF:
+          inherited
+        else
+          cg.a_cmp_ref_loc_label(list,def_cgsize(size),cmp_op,ref,loc,l);
+      end;
     end;
 
   procedure thlcg2ll.a_jmp_always(list: TAsmList; l: tasmlabel);
@@ -1161,8 +1007,192 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
     end;
 
   procedure thlcg2ll.location_force_reg(list: TAsmList; var l: tlocation; src_size, dst_size: tdef; maybeconst: boolean);
-    begin
-      ncgutil.location_force_reg(list,l,def_cgsize(dst_size),maybeconst);
+    var
+{$ifndef cpu64bitalu}
+      hregisterhi,
+{$endif}
+      hregister : tregister;
+{$ifndef cpu64bitalu}
+      hreg64 : tregister64;
+{$endif}
+      hl: tasmlabel;
+      oldloc : tlocation;
+      const_location: boolean;
+      dst_cgsize: tcgsize;
+    begin
+      oldloc:=l;
+      dst_cgsize:=def_cgsize(dst_size);
+{$ifndef cpu64bitalu}
+      { handle transformations to 64bit separate }
+      if dst_cgsize in [OS_64,OS_S64] then
+       begin
+         if not (l.size in [OS_64,OS_S64]) then
+          begin
+            { load a smaller size to OS_64 }
+            if l.loc=LOC_REGISTER then
+             begin
+{$ifdef AVR}
+               { on avr, we cannot change the size of a register
+                 due to the nature how register with size > OS8 are handled
+               }
+               hregister:=cg.getintregister(list,OS_32);
+{$else AVR}
+               hregister:=cg.makeregsize(list,l.register64.reglo,OS_32);
+{$endif AVR}
+               cg.a_load_reg_reg(list,l.size,OS_32,l.register64.reglo,hregister);
+             end
+            else
+             hregister:=cg.getintregister(list,OS_32);
+            { load value in low register }
+            case l.loc of
+{$ifdef cpuflags}
+              LOC_FLAGS :
+                cg.g_flags2reg(list,OS_INT,l.resflags,hregister);
+{$endif cpuflags}
+              LOC_JUMP :
+                begin
+                  cg.a_label(list,current_procinfo.CurrTrueLabel);
+                  cg.a_load_const_reg(list,OS_INT,1,hregister);
+                  current_asmdata.getjumplabel(hl);
+                  cg.a_jmp_always(list,hl);
+                  cg.a_label(list,current_procinfo.CurrFalseLabel);
+                  cg.a_load_const_reg(list,OS_INT,0,hregister);
+                  cg.a_label(list,hl);
+                end;
+              else
+                a_load_loc_reg(list,src_size,osuinttype,l,hregister);
+            end;
+            { reset hi part, take care of the signed bit of the current value }
+            hregisterhi:=cg.getintregister(list,OS_32);
+            if (l.size in [OS_S8,OS_S16,OS_S32]) then
+             begin
+               if l.loc=LOC_CONSTANT then
+                begin
+                  if (longint(l.value)<0) then
+                   cg.a_load_const_reg(list,OS_32,aint($ffffffff),hregisterhi)
+                  else
+                   cg.a_load_const_reg(list,OS_32,0,hregisterhi);
+                end
+               else
+                begin
+                  cg.a_op_const_reg_reg(list,OP_SAR,OS_32,31,hregister,
+                    hregisterhi);
+                end;
+             end
+            else
+             cg.a_load_const_reg(list,OS_32,0,hregisterhi);
+            location_reset(l,LOC_REGISTER,dst_cgsize);
+            l.register64.reglo:=hregister;
+            l.register64.reghi:=hregisterhi;
+          end
+         else
+          begin
+            { 64bit to 64bit }
+            if ((l.loc=LOC_CREGISTER) and maybeconst) then
+             begin
+               hregister:=l.register64.reglo;
+               hregisterhi:=l.register64.reghi;
+               const_location := true;
+             end
+            else
+             begin
+               hregister:=cg.getintregister(list,OS_32);
+               hregisterhi:=cg.getintregister(list,OS_32);
+               const_location := false;
+             end;
+            hreg64.reglo:=hregister;
+            hreg64.reghi:=hregisterhi;
+            { load value in new register }
+            cg64.a_load64_loc_reg(list,l,hreg64);
+            if not const_location then
+              location_reset(l,LOC_REGISTER,dst_cgsize)
+            else
+              location_reset(l,LOC_CREGISTER,dst_cgsize);
+            l.register64.reglo:=hregister;
+            l.register64.reghi:=hregisterhi;
+          end;
+       end
+      else
+{$endif cpu64bitalu}
+        begin
+          {Do not bother to recycle the existing register. The register
+           allocator eliminates unnecessary moves, so it's not needed
+           and trying to recycle registers can cause problems because
+           the registers changes size and may need aditional constraints.
+
+           Not if it's about LOC_CREGISTER's (JM)
+           }
+          const_location :=
+             (maybeconst) and
+             (l.loc = LOC_CREGISTER) and
+             (TCGSize2Size[l.size] = TCGSize2Size[dst_cgsize]) and
+             ((l.size = dst_cgsize) or
+              (TCGSize2Size[l.size] = sizeof(aint)));
+          if not const_location then
+            hregister:=cg.getintregister(list,dst_cgsize)
+          else
+            hregister := l.register;
+          { load value in new register }
+          case l.loc of
+{$ifdef cpuflags}
+            LOC_FLAGS :
+              cg.g_flags2reg(list,dst_cgsize,l.resflags,hregister);
+{$endif cpuflags}
+            LOC_JUMP :
+              begin
+                cg.a_label(list,current_procinfo.CurrTrueLabel);
+                cg.a_load_const_reg(list,dst_cgsize,1,hregister);
+                current_asmdata.getjumplabel(hl);
+                cg.a_jmp_always(list,hl);
+                cg.a_label(list,current_procinfo.CurrFalseLabel);
+                cg.a_load_const_reg(list,dst_cgsize,0,hregister);
+                cg.a_label(list,hl);
+              end;
+            else
+              begin
+                { load_loc_reg can only handle size >= l.size, when the
+                  new size is smaller then we need to adjust the size
+                  of the orignal and maybe recalculate l.register for i386 }
+                if (TCGSize2Size[dst_cgsize]<TCGSize2Size[l.size]) then
+                 begin
+                   if (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
+                     l.register:=cg.makeregsize(list,l.register,dst_cgsize);
+                   { for big endian systems, the reference's offset must }
+                   { be increased in this case, since they have the      }
+                   { MSB first in memory and e.g. byte(word_var) should  }
+                   { return  the second byte in this case (JM)           }
+                   if (target_info.endian = ENDIAN_BIG) and
+                      (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
+                     begin
+                       inc(l.reference.offset,TCGSize2Size[l.size]-TCGSize2Size[dst_cgsize]);
+                       l.reference.alignment:=newalignment(l.reference.alignment,TCGSize2Size[l.size]-TCGSize2Size[dst_cgsize]);
+                     end;
+{$ifdef x86}
+                   if not (l.loc in [LOC_SUBSETREG,LOC_CSUBSETREG]) then
+                     begin
+                       l.size:=dst_cgsize;
+                       src_size:=dst_size;
+                     end;
+{$endif x86}
+                 end;
+                a_load_loc_reg(list,src_size,dst_size,l,hregister);
+                if (TCGSize2Size[dst_cgsize]<TCGSize2Size[l.size])
+{$ifdef x86}
+                   and (l.loc in [LOC_SUBSETREG,LOC_CSUBSETREG])
+{$endif x86}
+                  then
+                    l.size:=dst_cgsize;
+              end;
+          end;
+          if not const_location then
+            location_reset(l,LOC_REGISTER,dst_cgsize)
+          else
+            location_reset(l,LOC_CREGISTER,dst_cgsize);
+          l.register:=hregister;
+        end;
+      { Release temp when it was a reference }
+      if oldloc.loc=LOC_REFERENCE then
+          location_freetemp(list,oldloc);
     end;
 
   procedure thlcg2ll.location_force_fpureg(list: TAsmList; var l: tlocation; size: tdef; maybeconst: boolean);
@@ -1171,8 +1201,46 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
     end;
 
   procedure thlcg2ll.location_force_mem(list: TAsmList; var l: tlocation; size: tdef);
-    begin
-      ncgutil.location_force_mem(list,l);
+    var
+      r: treference;
+    begin
+      case l.loc of
+        LOC_FPUREGISTER,
+        LOC_CFPUREGISTER :
+          begin
+            { implement here using tcg because some platforms store records
+              in fpu registers in some cases, and a_loadfpu* can't deal with
+              record "size" parameters }
+            tg.gethltemp(list,size,size.size,tt_normal,r);
+            cg.a_loadfpu_reg_ref(list,l.size,l.size,l.register,r);
+            location_reset_ref(l,LOC_REFERENCE,l.size,0);
+            l.reference:=r;
+          end;
+        LOC_MMREGISTER,
+        LOC_CMMREGISTER:
+          begin
+            tg.gethltemp(list,size,size.size,tt_normal,r);
+            cg.a_loadmm_reg_ref(list,l.size,l.size,l.register,r,mms_movescalar);
+            location_reset_ref(l,LOC_REFERENCE,l.size,0);
+            l.reference:=r;
+          end;
+        LOC_CONSTANT,
+        LOC_REGISTER,
+        LOC_CREGISTER :
+          begin
+            tg.gethltemp(list,size,size.size,tt_normal,r);
+{$ifndef cpu64bitalu}
+            if l.size in [OS_64,OS_S64] then
+              cg64.a_load64_loc_ref(list,l,r)
+            else
+{$endif not cpu64bitalu}
+              a_load_loc_ref(list,size,size,l,r);
+            location_reset_ref(l,LOC_REFERENCE,l.size,0);
+            l.reference:=r;
+          end;
+        else
+          inherited;
+      end;
     end;
 (*
   procedure thlcg2ll.location_force_mmregscalar(list: TAsmList; var l: tlocation; size: tdef; maybeconst: boolean);
@@ -1197,9 +1265,172 @@ procedure thlcg2ll.a_loadaddr_ref_reg(list: TAsmList; fromsize, tosize: tdef; co
       ncgutil.gen_load_para_value(list);
     end;
 
-  procedure thlcg2ll.gen_load_loc_cgpara(list: TAsmList; vardef: tdef; const l: tlocation; const cgpara: tcgpara);
+  procedure thlcg2ll.gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint);
+    var
+      locsize : tcgsize;
+      tmploc : tlocation;
     begin
-      ncgutil.gen_load_loc_cgpara(list,vardef,l,cgpara);
+      if not(l.size in [OS_32,OS_S32,OS_64,OS_S64,OS_128,OS_S128]) then
+        locsize:=l.size
+      else
+        locsize:=int_float_cgsize(tcgsize2size[l.size]);
+      case l.loc of
+        LOC_MMREGISTER,
+        LOC_CMMREGISTER:
+          case cgpara.location^.loc of
+            LOC_REFERENCE,
+            LOC_CREFERENCE,
+            LOC_MMREGISTER,
+            LOC_CMMREGISTER,
+            LOC_REGISTER,
+            LOC_CREGISTER :
+              cg.a_loadmm_reg_cgpara(list,locsize,l.register,cgpara,mms_movescalar);
+            LOC_FPUREGISTER,
+            LOC_CFPUREGISTER:
+              begin
+                tmploc:=l;
+                location_force_fpureg(list,tmploc,size,false);
+                cg.a_loadfpu_reg_cgpara(list,tmploc.size,tmploc.register,cgpara);
+              end;
+            else
+              internalerror(200204249);
+          end;
+        LOC_FPUREGISTER,
+        LOC_CFPUREGISTER:
+          case cgpara.location^.loc of
+            LOC_MMREGISTER,
+            LOC_CMMREGISTER:
+              begin
+                tmploc:=l;
+                location_force_mmregscalar(list,tmploc,false);
+                cg.a_loadmm_reg_cgpara(list,tmploc.size,tmploc.register,cgpara,mms_movescalar);
+              end;
+            { Some targets pass floats in normal registers }
+            LOC_REGISTER,
+            LOC_CREGISTER,
+            LOC_REFERENCE,
+            LOC_CREFERENCE,
+            LOC_FPUREGISTER,
+            LOC_CFPUREGISTER:
+              cg.a_loadfpu_reg_cgpara(list,locsize,l.register,cgpara);
+            else
+              internalerror(2002042433);
+          end;
+        LOC_REFERENCE,
+        LOC_CREFERENCE:
+          case cgpara.location^.loc of
+            LOC_MMREGISTER,
+            LOC_CMMREGISTER:
+              cg.a_loadmm_ref_cgpara(list,locsize,l.reference,cgpara,mms_movescalar);
+            { Some targets pass floats in normal registers }
+            LOC_REGISTER,
+            LOC_CREGISTER,
+            LOC_REFERENCE,
+            LOC_CREFERENCE,
+            LOC_FPUREGISTER,
+            LOC_CFPUREGISTER:
+              cg.a_loadfpu_ref_cgpara(list,locsize,l.reference,cgpara);
+            else
+              internalerror(2002042431);
+          end;
+        LOC_REGISTER,
+        LOC_CREGISTER :
+          begin
+{$ifndef cpu64bitalu}
+             { Only a_load_ref_cgpara supports multiple locations, when the
+               value is still a const or in a register then write it
+               to a reference first. This situation can be triggered
+               by typecasting an int64 constant to a record of 8 bytes }
+             if locsize = OS_F64 then
+               begin
+                 tmploc:=l;
+                 location_force_mem(list,tmploc,size);
+                 cg.a_load_loc_cgpara(list,tmploc,cgpara);
+                 location_freetemp(list,tmploc);
+               end
+             else
+{$endif not cpu64bitalu}
+               cg.a_load_loc_cgpara(list,l,cgpara);
+          end;
+        else
+          internalerror(2002042432);
+      end;
+    end;
+
+  procedure thlcg2ll.gen_load_loc_cgpara(list: TAsmList; vardef: tdef; const l: tlocation; const cgpara: tcgpara);
+{$ifndef cpu64bitalu}
+    var
+      tmploc: tlocation;
+{$endif not cpu64bitalu}
+    begin
+      { Handle Floating point types differently
+
+        This doesn't depend on emulator settings, emulator settings should
+        be handled by cpupara }
+      if (vardef.typ=floatdef) or
+         { some ABIs return certain records in an fpu register }
+         (l.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) or
+         (assigned(cgpara.location) and
+          (cgpara.Location^.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER])) then
+        begin
+          gen_loadfpu_loc_cgpara(list,vardef,l,cgpara,vardef.size);
+          exit;
+        end;
+
+      case l.loc of
+        LOC_CONSTANT,
+        LOC_REGISTER,
+        LOC_CREGISTER,
+        LOC_REFERENCE,
+        LOC_CREFERENCE :
+          begin
+{$ifndef cpu64bitalu}
+            { use cg64 only for int64, not for 8 byte records }
+            if is_64bit(vardef) then
+              cg64.a_load64_loc_cgpara(list,l,cgpara)
+            else
+{$endif not cpu64bitalu}
+              begin
+{$ifndef cpu64bitalu}
+                { Only a_load_ref_cgpara supports multiple locations, when the
+                  value is still a const or in a register then write it
+                  to a reference first. This situation can be triggered
+                  by typecasting an int64 constant to a record of 8 bytes }
+                if l.size in [OS_64,OS_S64] then
+                  begin
+                    tmploc:=l;
+                    location_force_mem(list,tmploc,vardef);
+                    a_load_loc_cgpara(list,vardef,tmploc,cgpara);
+                    { do not free the tmploc in case the original value was
+                      already in memory, because the caller (ncgcal) will then
+                      free it again later }
+                    if not(l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
+                      location_freetemp(list,tmploc);
+                  end
+                else
+{$endif not cpu64bitalu}
+                  a_load_loc_cgpara(list,vardef,l,cgpara);
+              end;
+          end;
+        LOC_MMREGISTER,
+        LOC_CMMREGISTER:
+          begin
+            case l.size of
+              OS_F32,
+              OS_F64:
+                cg.a_loadmm_loc_cgpara(list,l,cgpara,mms_movescalar);
+              else
+                cg.a_loadmm_loc_cgpara(list,l,cgpara,nil);
+            end;
+          end;
+{$ifdef SUPPORT_MMX}
+        LOC_MMXREGISTER,
+        LOC_CMMXREGISTER:
+          cg.a_loadmm_reg_cgpara(list,OS_M64,l.register,cgpara,nil);
+{$endif SUPPORT_MMX}
+        else
+          internalerror(200204241);
+      end;
     end;
 
   procedure thlcg2ll.gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);

compiler/i386/hlcgcpu.pas

@@ -28,18 +28,153 @@ unit hlcgcpu;
 
 interface
 
+  uses
+    aasmdata,
+    symtype,parabase,
+    cgutils,
+    hlcgobj, hlcgx86;
+
+
+  type
+    thlcgcpu = class(thlcgx86)
+     protected
+      procedure gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint); override;
+    end;
+
   procedure create_hlcodegen;
 
 implementation
 
   uses
-    hlcgobj, hlcgx86,
-    cgcpu;
+    globtype,verbose,
+    paramgr,
+    cgbase,
+    cpubase,tgobj,cgobj,cgcpu;
+
+  { thlcgcpu }
+
+  procedure thlcgcpu.gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint);
+    var
+      locsize : tcgsize;
+      locdef : tdef;
+      tmploc : tlocation;
+      href   : treference;
+      stacksize   : longint;
+    begin
+      if not(l.size in [OS_32,OS_S32,OS_64,OS_S64,OS_128,OS_S128]) then
+        locsize:=l.size
+      else
+        locsize:=int_float_cgsize(tcgsize2size[l.size]);
+      case l.loc of
+        LOC_FPUREGISTER,
+        LOC_CFPUREGISTER:
+          begin
+            case cgpara.location^.loc of
+              LOC_REFERENCE:
+                begin
+                  stacksize:=align(locintsize,cgpara.alignment);
+                  if (not paramanager.use_fixed_stack) and
+                     (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
+                    begin
+                      cg.g_stackpointer_alloc(list,stacksize);
+                      reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
+                    end
+                  else
+                    reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
+                  cg.a_loadfpu_reg_ref(list,locsize,locsize,l.register,href);
+                end;
+              LOC_FPUREGISTER:
+                begin
+                  cg.a_loadfpu_reg_reg(list,locsize,cgpara.location^.size,l.register,cgpara.location^.register);
+                end;
+              { can happen if a record with only 1 "single field" is
+                returned in a floating point register and then is directly
+                passed to a regcall parameter }
+              LOC_REGISTER:
+                begin
+                  tmploc:=l;
+                  location_force_mem(list,tmploc,size);
+                  case locsize of
+                    OS_F32:
+                      tmploc.size:=OS_32;
+                    OS_F64:
+                      tmploc.size:=OS_64;
+                    else
+                      internalerror(2010053116);
+                  end;
+                  cg.a_load_loc_cgpara(list,tmploc,cgpara);
+                  location_freetemp(list,tmploc);
+                end
+              else
+                internalerror(2010053003);
+            end;
+          end;
+        LOC_MMREGISTER,
+        LOC_CMMREGISTER:
+          begin
+            case cgpara.location^.loc of
+              LOC_REFERENCE:
+                begin
+                  { can't use TCGSize2Size[l.size], because the size of an
+                    80 bit extended parameter can be either 10 or 12 bytes }
+                  stacksize:=align(locintsize,cgpara.alignment);
+                  if (not paramanager.use_fixed_stack) and
+                     (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
+                    begin
+                      cg.g_stackpointer_alloc(list,stacksize);
+                      reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
+                    end
+                  else
+                    reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
+                  cg.a_loadmm_reg_ref(list,locsize,locsize,l.register,href,mms_movescalar);
+                end;
+              LOC_FPUREGISTER:
+                begin
+                  tmploc:=l;
+                  location_force_mem(list,tmploc,size);
+                  cg.a_loadfpu_ref_cgpara(list,tmploc.size,tmploc.reference,cgpara);
+                  location_freetemp(list,tmploc);
+                end;
+              else
+                internalerror(2010053004);
+            end;
+          end;
+        LOC_REFERENCE,
+        LOC_CREFERENCE :
+          begin
+            case cgpara.location^.loc of
+              LOC_REFERENCE:
+                begin
+                  stacksize:=align(locintsize,cgpara.alignment);
+                  if (not paramanager.use_fixed_stack) and
+                     (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
+                    cg.a_load_ref_cgpara(list,locsize,l.reference,cgpara)
+                  else
+                    begin
+                      reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
+                      cg.g_concatcopy(list,l.reference,href,stacksize);
+                    end;
+                end;
+              LOC_FPUREGISTER:
+                begin
+                  cg.a_loadfpu_ref_cgpara(list,locsize,l.reference,cgpara);
+                end;
+              else
+                internalerror(2010053005);
+            end;
+          end;
+        else
+          internalerror(2002042430);
+      end;
+    end;
+
 
   procedure create_hlcodegen;
     begin
-      hlcg:=thlcgx86.create;
+      hlcg:=thlcgcpu.create;
       create_codegen;
     end;
 
+
+
 end.

compiler/i386/n386add.pas

@@ -46,7 +46,8 @@ interface
       aasmbase,aasmtai,aasmdata,aasmcpu,
       cgbase,procinfo,
       ncon,nset,cgutils,tgobj,
-      cga,ncgutil,cgobj,cg64f32,cgx86;
+      cga,ncgutil,cgobj,cg64f32,cgx86,
+      hlcgobj;
 
 {*****************************************************************************
                                 use_generic_mul32to64
@@ -399,12 +400,12 @@ interface
         begin
           {LOC_CONSTANT for example.}
           reg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-          cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,left.location,reg);
+          hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,osuinttype,left.location,reg);
         end;
       {Allocate EAX.}
       cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
       {Load the right value.}
-      cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,right.location,NR_EAX);
+      hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,NR_EAX);
       {Also allocate EDX, since it is also modified by a mul (JM).}
       cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
       if use_ref then

compiler/i386/n386mat.pas

@@ -54,7 +54,8 @@ implementation
       cgbase,pass_2,
       ncon,
       cpubase,cpuinfo,
-      cga,ncgutil,cgobj,cgutils;
+      cga,ncgutil,cgobj,cgutils,
+      hlcgobj;
 
 {*****************************************************************************
                              TI386MODDIVNODE
@@ -94,7 +95,7 @@ implementation
           internalerror(200109052);
         { put numerator in register }
         location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
-        location_force_reg(current_asmdata.CurrAsmList,left.location,location.size,false);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
         hreg1:=left.location.register;
 
         if (nodetype=divn) and (right.nodetype=ordconstn) then
@@ -336,7 +337,7 @@ implementation
             else
               begin
                 hreg1:=cg.getintregister(current_asmdata.CurrAsmList,right.location.size);
-                cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,right.location,hreg1);
+                hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u32inttype,right.location,hreg1);
                 emit_reg(op,S_L,hreg1);
               end;
 
@@ -371,7 +372,7 @@ implementation
         location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
 
         { load left operator in a register }
-        location_force_reg(current_asmdata.CurrAsmList,left.location,location.size,false);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
         hreg64hi:=left.location.register64.reghi;
         hreg64lo:=left.location.register64.reglo;
 
@@ -416,7 +417,7 @@ implementation
           begin
             { load right operators in a register }
             cg.getcpuregister(current_asmdata.CurrAsmList,NR_ECX);
-            cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,right.location,NR_ECX);
+            hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u32inttype,right.location,NR_ECX);
 
             { left operator is already in a register }
             { hence are both in a register }

compiler/m68k/n68kadd.pas

@@ -53,7 +53,7 @@ implementation
       cgbase,cpuinfo,pass_1,pass_2,regvars,
       cpupara,cgutils,procinfo,
       ncon,nset,
-      ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
+      ncgutil,tgobj,rgobj,rgcpu,cgobj,hlcgobj,cg64f32;
 
 {*****************************************************************************
                                   Helpers
@@ -385,7 +385,7 @@ implementation
             secondpass(left);
             if left.location.loc in [LOC_FLAGS,LOC_JUMP] then begin
 //             writeln('ajjaj');
-             location_force_reg(current_asmdata.CurrAsmList,left.location,cgsize,false);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(cgsize),false);
 //             writeln('reccs?');
             end;
             if isjump then
@@ -404,7 +404,7 @@ implementation
               end;
             secondpass(right);
             if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
-             location_force_reg(current_asmdata.CurrAsmList,right.location,cgsize,false);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,hlcg.tcgsize2orddef(cgsize),false);
             if isjump then
              begin
                current_procinfo.CurrTrueLabel:=otl;

compiler/m68k/n68kcnv.pas

@@ -47,7 +47,7 @@ implementation
       ncon,ncal,
       ncgutil,
       cpubase,aasmcpu,
-      rgobj,tgobj,cgobj,cgutils,globtype,cgcpu;
+      rgobj,tgobj,cgobj,hlcgobj,cgutils,globtype,cgcpu;
 
 
 {*****************************************************************************
@@ -134,7 +134,7 @@ implementation
 
         location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,opsize);
         if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
-          location_force_reg(current_asmdata.CurrAsmList,left.location,OS_INT,false);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,osuinttype,false);
         case left.location.loc of
           LOC_REGISTER, LOC_CREGISTER:
             begin
@@ -175,7 +175,7 @@ implementation
               { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
               if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
                  ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
-                location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
               else
                 location.size:=newsize;
 {   ACTIVATE when loc_jump support is added

compiler/m68k/n68kmat.pas

@@ -56,7 +56,7 @@ implementation
       pass_1,pass_2,procinfo,
       ncon,
       cpuinfo,paramgr,defutil,parabase,
-      tgobj,ncgutil,cgobj,cgutils,rgobj,rgcpu,cgcpu,cg64f32;
+      tgobj,ncgutil,cgobj,hlcgobj,cgutils,rgobj,rgcpu,cgcpu,cg64f32;
 
 
 
@@ -104,7 +104,7 @@ implementation
               LOC_REFERENCE,
               LOC_CREFERENCE :
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(resultdef),true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
                   current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,tcgsize2opsize[opsize],left.location.register));
 //                  location_release(current_asmdata.CurrAsmList,left.location);
                   location_reset(location,LOC_FLAGS,OS_NO);
@@ -118,14 +118,14 @@ implementation
            begin
               secondpass(left);
               location_copy(location,left.location);
-              location_force_reg(current_asmdata.CurrAsmList,location,OS_64,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,u64inttype,false);
               cg64.a_op64_loc_reg(current_asmdata.CurrAsmList,OP_NOT,OS_64,location,
                 joinreg64(location.register64.reglo,location.register64.reghi));
            end
          else
           begin
              secondpass(left);
-             location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),false);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
              location_copy(location,left.location);
              if location.loc=LOC_CREGISTER then
               location.register := cg.getintregister(current_asmdata.CurrAsmList,opsize);
@@ -275,7 +275,7 @@ implementation
             location_reset(location,LOC_REGISTER,OS_64);
 
             { load left operator in a register }
-            location_force_reg(current_asmdata.CurrAsmList,left.location,OS_64,false);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u64inttype,false);
             hreg64hi:=left.location.register64.reghi;
             hreg64lo:=left.location.register64.reglo;
 
@@ -322,7 +322,7 @@ implementation
         else
           begin
             { load left operators in a register }
-            location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
             location_copy(location,left.location);
             resultreg := location.register;
             hregister1 := location.register;
@@ -346,7 +346,7 @@ implementation
             else
               begin
                 { load shift count in a register if necessary }
-                location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(right.resultdef),true);
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
                 cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,OS_32,right.location.register,hregister1,resultreg);
               end;
           end;

compiler/mips/ncpucnv.pas

@@ -62,7 +62,8 @@ uses
   ncon, ncal,
   ncgutil,
   cpubase, aasmcpu,
-  tgobj, cgobj;
+  tgobj, cgobj,
+  hlcgobj;
 
 
 {*****************************************************************************
@@ -113,7 +114,7 @@ procedure tMIPSELtypeconvnode.second_int_to_real;
 
   procedure loadsigned;
   begin
-    location_force_mem(current_asmdata.CurrAsmList, left.location);
+    hlcg.location_force_mem(current_asmdata.CurrAsmList, left.location, left.resultdef);
     location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, location.size);
     { Load memory in fpu register }
     cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, OS_F32, OS_F32, left.location.reference, location.Register);
@@ -144,7 +145,7 @@ begin
     current_asmdata.getjumplabel(l2);
     reference_reset_symbol(href, l1, 0, sizeof(aint));
     hregister := cg.getintregister(current_asmdata.CurrAsmList, OS_32);
-    cg.a_load_loc_reg(current_asmdata.CurrAsmList, OS_32, left.location, hregister);
+    hlcg.a_load_loc_reg(current_asmdata.CurrAsmList, left.resultdef, u32inttype, left.location, hregister);
 
     loadsigned;
 

compiler/mips/ncpumat.pas

@@ -50,11 +50,11 @@ implementation
 uses
   globtype, systems,
   cutils, verbose, globals,
-  symconst,
+  symconst, symdef,
   aasmbase, aasmcpu, aasmtai, aasmdata,
   defutil,
   procinfo,
-  cgbase, cgobj, pass_2,
+  cgbase, cgobj, hlcgobj, pass_2,
   ncon,
   cpubase,
   ncgutil, cgcpu, cgutils;
@@ -73,7 +73,7 @@ begin
   location_copy(location, left.location);
 
   { put numerator in register }
-  location_force_reg(current_asmdata.CurrAsmList, left.location, def_cgsize(left.resultdef), True);
+  hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
   location_copy(location, left.location);
   numerator := location.Register;
 
@@ -104,8 +104,8 @@ begin
   else
   begin
     { load divider in a register if necessary }
-    location_force_reg(current_asmdata.CurrAsmList, right.location,
-      def_cgsize(right.resultdef), True);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList, right.location,
+      right.resultdef, right.resultdef, True);
     divider := right.location.Register;
 
 
@@ -171,7 +171,7 @@ begin
     location_reset(location, LOC_REGISTER, OS_64);
 
     { load left operator in a register }
-    location_force_reg(current_asmdata.CurrAsmList, left.location, OS_64, False);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, u64inttype, False);
 
 
     hreg64hi := left.location.register64.reghi;
@@ -219,7 +219,7 @@ begin
   else
   begin
     { load left operators in a register }
-    location_force_reg(current_asmdata.CurrAsmList, left.location, def_cgsize(left.resultdef), True);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
     location_copy(location, left.location);
     resultreg  := location.Register;
     hregister1 := location.Register;
@@ -243,7 +243,7 @@ begin
     else
     begin
       { load shift count in a register if necessary }
-      location_force_reg(current_asmdata.CurrAsmList, right.location, def_cgsize(right.resultdef), True);
+      hlcg.location_force_reg(current_asmdata.CurrAsmList, right.location, right.resultdef, right.resultdef, True);
       cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList, op, OS_32, right.location.Register, hregister1, resultreg);
     end;
   end;
@@ -283,7 +283,7 @@ begin
       end;
       LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_CREFERENCE:
       begin
-        location_force_reg(current_asmdata.CurrAsmList, left.location, def_cgsize(left.resultdef), True);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True);
         current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SEQ, NR_TCR0, left.location.Register, NR_R0));
         location_reset(location, LOC_REGISTER, OS_INT);
         location.Register := NR_TCR0;

compiler/ncgadd.pas

@@ -122,7 +122,7 @@ interface
         if (left.location.loc=LOC_FPUREGISTER) and
            (node_resources_fpu(right)>=maxfpuregs) then
           begin
-            location_force_mem(current_asmdata.CurrAsmList,left.location);
+            hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
             pushedfpu:=true;
           end;
 {$endif x86}
@@ -149,7 +149,7 @@ interface
             if use_vectorfpu(left.resultdef) then
               begin
                 tmpreg := cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
-                cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg,mms_movescalar);
+                hlcg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location.size,left.location,tmpreg,mms_movescalar);
                 location_freetemp(current_asmdata.CurrAsmList,left.location);
                 location_reset(left.location,LOC_MMREGISTER,left.location.size);
                 left.location.register:=tmpreg;
@@ -635,7 +635,7 @@ interface
               else
                 begin
                   // const64 - reg64
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                   cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
                     right.location.register64,left.location.register64,
                     location.register64,

compiler/ncgcal.pas

@@ -417,7 +417,7 @@ implementation
                    (location.loc=LOC_REGISTER) and
                    (current_settings.fputype in [fpu_fpa,fpu_fpa10,fpu_fpa11]) then
                   begin
-                    location_force_mem(current_asmdata.CurrAsmList,location);
+                    hlcg.location_force_mem(current_asmdata.CurrAsmList,location,resultdef);
                   end;
 {$endif arm}
               end;
@@ -445,7 +445,7 @@ implementation
                     cg64.a_load64_reg_loc(current_asmdata.CurrAsmList,location.register64,funcretnode.location)
                   else
 {$endif}
-                    cg.a_load_reg_loc(current_asmdata.CurrAsmList,location.size,location.register,funcretnode.location);
+                    hlcg.a_load_reg_loc(current_asmdata.CurrAsmList,resultdef,resultdef,location.register,funcretnode.location);
                   location_free(current_asmdata.CurrAsmList,location);
                 end;
               LOC_REFERENCE:
@@ -791,7 +791,8 @@ implementation
                  else
                    begin
                      { Load VMT value in register }
-                     location_force_reg(current_asmdata.CurrAsmList,methodpointer.location,OS_ADDR,false);
+                     { todo: fix vmt type for high level cg }
+                     hlcg.location_force_reg(current_asmdata.CurrAsmList,methodpointer.location,voidpointertype,voidpointertype,false);
                      vmtreg:=methodpointer.location.register;
                    end;
 
@@ -882,11 +883,12 @@ implementation
               secondpass(right);
 
               pvreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
-              { Only load OS_ADDR from the reference }
+              { Only load OS_ADDR from the reference (when converting to hlcg:
+                watch out with procedure of object) }
               if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
                 cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,right.location.reference,pvreg)
               else
-                cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,right.location,pvreg);
+                hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,right.resultdef,right.location,pvreg);
               location_freetemp(current_asmdata.CurrAsmList,right.location);
 
               { Load parameters that are in temporary registers in the

compiler/ncgcnv.pas

@@ -116,7 +116,7 @@ interface
                   end;
               end
             else
-              location_force_reg(current_asmdata.CurrAsmList,location,newsize,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,false);
           end
         else
           begin
@@ -168,7 +168,7 @@ interface
              { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
              if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
                 ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
-               location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+               hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
              else
                location.size:=newsize;
              current_procinfo.CurrTrueLabel:=oldTrueLabel;
@@ -198,7 +198,7 @@ interface
                end
               else
                begin
-                 location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                  cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
                end;
             end;
@@ -368,7 +368,7 @@ interface
            st_shortstring :
              begin
                tg.gethltemp(current_asmdata.CurrAsmList,cshortstringtype,256,tt_normal,location.reference);
-               cg.a_load_loc_ref(current_asmdata.CurrAsmList,left.location.size,left.location,
+               hlcg.a_load_loc_ref(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,
                  location.reference);
                location_freetemp(current_asmdata.CurrAsmList,left.location);
              end;
@@ -435,7 +435,7 @@ interface
                  if expectloc=LOC_MMREGISTER then
                    begin
                      location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
-                     cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,location.size,left.location,location.register,mms_movescalar)
+                     hlcg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location,location.register,mms_movescalar)
                    end
                   else
                     begin
@@ -560,7 +560,7 @@ interface
             ((newsize<>left.location.size) and
              ((left.resultdef.size<>resultdef.size) or
               not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]))) then
-           location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
          else
            { may differ in sign, e.g. bytebool -> byte   }
            location.size:=newsize;
@@ -721,7 +721,7 @@ interface
             (left.resultdef.typ=floatdef) xor
             (resultdef.typ=floatdef)
            ) then
-          location_force_mem(current_asmdata.CurrAsmList,location);
+          hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef);
 
         { but use the new size, but we don't know the size of all arrays }
         newsize:=def_cgsize(resultdef);

compiler/ncgflw.pas

@@ -519,12 +519,9 @@ implementation
            LOC_REGISTER,
            LOC_CREGISTER:
              hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,left.resultdef,right.location,left.location.register);
-{$ifndef cpuhighleveltarget}
-           { still have to figure out how to handle the subset sizes }
            LOC_SUBSETREG,
            LOC_CSUBSETREG :
-             cg.a_load_loc_subsetreg(current_asmdata.CurrAsmList,left.location.size,right.location,left.location.sreg);
-{$endif}
+             hlcg.a_load_loc_subsetreg(current_asmdata.CurrAsmList,right.resultdef,left.resultdef,right.location,left.location.sreg);
            else
              internalerror(200501311);
          end;

compiler/ncginl.pas

@@ -356,7 +356,7 @@ implementation
         else
          begin
            { length in ansi/wide strings is at offset -sizeof(pint) }
-           location_force_reg(current_asmdata.CurrAsmList,left.location,OS_ADDR,false);
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
            current_asmdata.getjumplabel(lengthlab);
            cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_ADDR,OC_EQ,0,left.location.register,lengthlab);
            if is_widestring(left.resultdef) and (tf_winlikewidestring in target_info.flags) then
@@ -540,15 +540,15 @@ implementation
 
           if elepara.location.loc=LOC_CONSTANT then
             begin
-              cg.a_bit_set_const_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
-                elepara.location.value-tsetdef(setpara.resultdef).setbase,setpara.location);
+              hlcg.a_bit_set_const_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
+                setpara.resultdef,elepara.location.value-tsetdef(setpara.resultdef).setbase,setpara.location);
             end
           else
             begin
-              location_force_reg(current_asmdata.CurrAsmList,elepara.location,OS_INT,true);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,elepara.location,elepara.resultdef,u32inttype,true);
               register_maybe_adjust_setbase(current_asmdata.CurrAsmList,elepara.location,tsetdef(setpara.resultdef).setbase);
-              cg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
-                elepara.location.size,elepara.location.register,setpara.location);
+              hlcg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
+                u32inttype,setpara.resultdef,elepara.location.register,setpara.location);
             end;
         end;
 
@@ -677,7 +677,7 @@ implementation
             use_frame_pointer:=true
           else
             begin
-              location_force_reg(current_asmdata.currasmlist,left.location,OS_ADDR,false);
+              hlcg.location_force_reg(current_asmdata.currasmlist,left.location,left.resultdef,voidpointertype,false);
               frame_reg:=left.location.register;
               use_frame_pointer:=false;
             end
@@ -748,7 +748,7 @@ implementation
           in_rol_x_y:
             op:=OP_ROL;
         end;
-        location_force_reg(current_asmdata.CurrAsmList,location,location.size,false);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,location,op1.resultdef,resultdef,false);
 
         if (left.nodetype=callparan) and
            assigned(tcallparanode(left).right) then
@@ -760,7 +760,7 @@ implementation
                  tordconstnode(op2).value.uvalue and (resultdef.size*8-1),location.register)
              else
                begin
-                 location_force_reg(current_asmdata.CurrAsmList,op2.location,location.size,false);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,op2.resultdef,resultdef,false);
                  { do modulo 2 operation }
                  cg.a_op_reg_reg(current_asmdata.CurrAsmList,op,location.size,op2.location.register,location.register);
                end;
@@ -824,7 +824,7 @@ implementation
 
       if (left.location.loc <> LOC_REGISTER) or
          (left.location.size <> opsize) then
-        location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(opsize),true);
 
       location_reset(location,LOC_REGISTER,opsize);
       location.register := cg.getintregister(current_asmdata.CurrAsmList,opsize);

compiler/ncgld.pas

@@ -470,7 +470,8 @@ implementation
 
                      { load class instance/classrefdef address }
                      if left.location.loc=LOC_CONSTANT then
-                       location_force_reg(current_asmdata.CurrAsmList,left.location,OS_ADDR,false);
+                       { todo: exact type for hlcg (can't use left.resultdef, because can be TP-style object, which is not pointer-sized) }
+                       hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,voidpointertype,false);
                      case left.location.loc of
                         LOC_CREGISTER,
                         LOC_REGISTER:
@@ -802,7 +803,7 @@ implementation
                       end;
                     LOC_SUBSETREG,
                     LOC_CSUBSETREG:
-                      cg.a_load_ref_subsetreg(current_asmdata.CurrAsmList,right.location.size,left.location.size,right.location.reference,left.location.sreg);
+                      hlcg.a_load_ref_subsetreg(current_asmdata.CurrAsmList,right.resultdef,left.resultdef,right.location.reference,left.location.sreg);
                     LOC_SUBSETREF,
                     LOC_CSUBSETREF:
 {$ifndef cpu64bitalu}
@@ -810,7 +811,7 @@ implementation
                        cg64.a_load64_ref_subsetref(current_asmdata.CurrAsmList,right.location.reference,left.location.sref)
                       else
 {$endif not cpu64bitalu}
-                       cg.a_load_ref_subsetref(current_asmdata.CurrAsmList,right.location.size,left.location.size,right.location.reference,left.location.sref);
+                       hlcg.a_load_ref_subsetref(current_asmdata.CurrAsmList,right.resultdef,left.resultdef,right.location.reference,left.location.sref);
                     else
                       internalerror(200203284);
                   end;
@@ -887,8 +888,8 @@ implementation
               LOC_SUBSETREG,
               LOC_CSUBSETREG:
                 begin
-                  cg.a_load_subsetreg_loc(current_asmdata.CurrAsmList,
-                      right.location.size,right.location.sreg,left.location);
+                  hlcg.a_load_subsetreg_loc(current_asmdata.CurrAsmList,
+                      right.resultdef,left.resultdef,right.location.sreg,left.location);
                 end;
               LOC_SUBSETREF,
               LOC_CSUBSETREF:
@@ -898,8 +899,8 @@ implementation
                    cg64.a_load64_subsetref_loc(current_asmdata.CurrAsmList,right.location.sref,left.location)
                   else
 {$endif not cpu64bitalu}
-                  cg.a_load_subsetref_loc(current_asmdata.CurrAsmList,
-                      right.location.size,right.location.sref,left.location);
+                  hlcg.a_load_subsetref_loc(current_asmdata.CurrAsmList,
+                      right.resultdef,left.resultdef,right.location.sref,left.location);
                 end;
               LOC_JUMP :
                 begin
@@ -969,7 +970,7 @@ implementation
                           begin
                             r:=cg.getintregister(current_asmdata.CurrAsmList,left.location.size);
                             cg.g_flags2reg(current_asmdata.CurrAsmList,left.location.size,right.location.resflags,r);
-                            cg.a_load_reg_loc(current_asmdata.CurrAsmList,left.location.size,r,left.location);
+                            hlcg.a_load_reg_loc(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,r,left.location);
                           end;
                         else
                           internalerror(200203273);
@@ -994,7 +995,7 @@ implementation
                           r:=cg.getintregister(current_asmdata.CurrAsmList,left.location.size);
                           cg.g_flags2reg(current_asmdata.CurrAsmList,left.location.size,right.location.resflags,r);
                           cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,left.location.size,r,r);
-                          cg.a_load_reg_loc(current_asmdata.CurrAsmList,left.location.size,r,left.location);
+                          hlcg.a_load_reg_loc(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,r,left.location);
                         end
                     end;
                 end;
@@ -1231,13 +1232,14 @@ implementation
                  inc(href.offset,sizeof(pint));
                  if vaddr then
                   begin
-                    location_force_mem(current_asmdata.CurrAsmList,hp.left.location);
+                    hlcg.location_force_mem(current_asmdata.CurrAsmList,hp.left.location,hp.left.resultdef);
                     tmpreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
                     cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,hp.left.location.reference,tmpreg);
                     cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpreg,href);
                   end
                  else
-                  cg.a_load_loc_ref(current_asmdata.CurrAsmList,OS_ADDR,hp.left.location,href);
+                  { todo: proper type information for hlcg }
+                  hlcg.a_load_loc_ref(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,hp.left.location,href);
                  { update href to the vtype field and write it }
                  dec(href.offset,sizeof(pint));
                  cg.a_load_const_ref(current_asmdata.CurrAsmList, OS_INT,vtype,href);

compiler/ncgmat.pas

@@ -299,6 +299,7 @@ implementation
          hl : tasmlabel;
          paraloc1 : tcgpara;
          opsize : tcgsize;
+         opdef : tdef;
       begin
          secondpass(left);
          if codegenerror then
@@ -311,17 +312,17 @@ implementation
 {$ifndef cpu64bitalu}
          if is_64bit(resultdef) then
            begin
-              if is_signed(left.resultdef) then
-                opsize:=OS_S64
-              else
-                opsize:=OS_64;
+             if is_signed(left.resultdef) then
+               opdef:=s64inttype
+             else
+               opdef:=u64inttype;
 
              { this code valid for 64-bit cpu's only ,
                otherwise helpers are called in pass_1
              }
-             location_force_reg(current_asmdata.CurrAsmList,location,opsize,false);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,opdef,false);
              location_copy(location,left.location);
-             location_force_reg(current_asmdata.CurrAsmList,right.location,opsize,false);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,false);
              emit64_div_reg_reg(is_signed(left.resultdef),
                joinreg64(right.location.register64.reglo,right.location.register64.reghi),
                joinreg64(location.register64.reglo,location.register64.reghi));
@@ -330,12 +331,18 @@ implementation
 {$endif not cpu64bitalu}
            begin
               if is_signed(left.resultdef) then
-                opsize:=OS_SINT
+                begin
+                  opsize:=OS_SINT;
+                  opdef:=ossinttype;
+                end
               else
-                opsize:=OS_INT;
+                begin
+                  opsize:=OS_INT;
+                  opdef:=osuinttype;
+                end;
 
               { put numerator in register }
-              location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
               hreg1:=left.location.register;
 
               if (nodetype=divn) and
@@ -366,7 +373,7 @@ implementation
                   { only used for temporary }
                   { purposes                }
                   hdenom := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-                  cg.a_load_loc_reg(current_asmdata.CurrAsmList,right.location.size,right.location,hdenom);
+                  hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hdenom);
                   { verify if the divisor is zero, if so return an error
                     immediately
                   }
@@ -408,6 +415,7 @@ implementation
     procedure tcgshlshrnode.second_integer;
       var
          op : topcg;
+         opdef : tdef;
          hcountreg : tregister;
          opsize : tcgsize;
       begin
@@ -418,15 +426,22 @@ implementation
          end;
 {$ifdef cpunodefaultint}
         opsize:=left.location.size;
+        opdef:=left.resultdef;
 {$else cpunodefaultint}
          { load left operators in a register }
          if is_signed(left.resultdef) then
-           opsize:=OS_SINT
+           begin
+             opsize:=OS_SINT;
+             opdef:=ossinttype
+           end
          else
-           opsize:=OS_INT;
+           begin
+             opsize:=OS_INT;
+             opdef:=osuinttype;
+           end;
 {$endif cpunodefaultint}
 
-         location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+         hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
          location_reset(location,LOC_REGISTER,opsize);
          location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
 
@@ -453,7 +468,7 @@ implementation
               if right.location.loc<>LOC_REGISTER then
                 begin
                   hcountreg:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
-                  cg.a_load_loc_reg(current_asmdata.CurrAsmList,right.location.size,right.location,hcountreg);
+                  hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,opdef,right.location,hcountreg);
                 end
               else
                 hcountreg:=right.location.register;
@@ -483,7 +498,7 @@ implementation
     procedure tcgnotnode.second_64bit;
       begin
         secondpass(left);
-        location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),false);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
         location_copy(location,left.location);
         { perform the NOT operation }
         cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,left.location.register64,location.register64);

compiler/ncgmem.pas

@@ -163,7 +163,7 @@ implementation
             hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
             if not assigned(hsym) then
               internalerror(200309281);
-            cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,hsym.localloc,location.register);
+            hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,hsym.localloc,location.register);
             { walk parents }
             while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
               begin
@@ -201,7 +201,7 @@ implementation
              we have to force the data into memory, see also tw14388.pp
            }
            if nf_internal in flags then
-             location_force_mem(current_asmdata.CurrAsmList,left.location)
+             hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
            else
              internalerror(2006111510);
          cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
@@ -224,7 +224,7 @@ implementation
          else
            location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
          if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
-           location_force_reg(current_asmdata.CurrAsmList,left.location,OS_ADDR,true);
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
          case left.location.loc of
             LOC_CREGISTER,
             LOC_REGISTER:
@@ -245,7 +245,7 @@ implementation
             LOC_REFERENCE:
               begin
                  location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
-                 cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,left.location,location.reference.base);
+                 hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
               end;
             LOC_CONSTANT:
               begin
@@ -368,7 +368,7 @@ implementation
                    if not tstoreddef(left.resultdef).is_intregable or
                       not tstoreddef(resultdef).is_intregable or
                       (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER]) then
-                     location_force_mem(current_asmdata.CurrAsmList,location)
+                     hlcg.location_force_mem(current_asmdata.CurrAsmList,location,resultdef)
                    else
                      begin
                        if (left.location.loc = LOC_REGISTER) then
@@ -658,7 +658,7 @@ implementation
                else
                  begin
                    hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-                   cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,right.location,hreg);
+                   hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
                  end;
                current_asmdata.getjumplabel(neglabel);
                current_asmdata.getjumplabel(poslabel);
@@ -828,7 +828,7 @@ implementation
               case left.location.loc of
                 LOC_REGISTER,
                 LOC_MMREGISTER:
-                  location_force_mem(current_asmdata.CurrAsmList,left.location);
+                  hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
               end;
              location_copy(location,left.location);
            end;
@@ -959,7 +959,7 @@ implementation
               secondpass(right);
 
               { if mulsize = 1, we won't have to modify the index }
-              location_force_reg(current_asmdata.CurrAsmList,right.location,OS_ADDR,true);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
 
               if isjump then
                begin

compiler/ncgset.pas

@@ -100,7 +100,7 @@ implementation
        { load first value in 32bit register }
          secondpass(left);
          if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
-           location_force_reg(current_asmdata.CurrAsmList,left.location,OS_32,false);
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,false);
 
        { also a second value ? }
          if assigned(right) then
@@ -109,7 +109,7 @@ implementation
              if codegenerror then
                exit;
              if right.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
-              location_force_reg(current_asmdata.CurrAsmList,right.location,OS_32,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,false);
            end;
 
          { we doesn't modify the left side, we check only the type }
@@ -377,16 +377,16 @@ implementation
                {****************************  SMALL SET **********************}
                if left.location.loc=LOC_CONSTANT then
                 begin
-                  cg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,location.size,
+                  hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,resultdef,
                     left.location.value-setbase,right.location,
                     location.register);
                 end
                else
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
                   register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
-                  cg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,left.location.size,
-                    location.size,left.location.register,right.location,location.register);
+                  hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,left.resultdef,
+                    right.resultdef,resultdef,left.location.register,right.location,location.register);
                 end;
              end
             else
@@ -401,7 +401,7 @@ implementation
                   { assumption (other cases will be caught by range checking) (JM)  }
 
                   { load left in register }
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,location.size,true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
                   register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
                   { emit bit test operation -- warning: do not use
                     location_force_reg() to force a set into a register, except
@@ -413,8 +413,8 @@ implementation
 
                    a_bit_test_reg_loc_reg() properly takes into account the
                    size of the set to adjust the register index to test }
-                  cg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
-                    left.location.size,location.size,
+                  hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
+                    left.resultdef,right.resultdef,resultdef,
                     left.location.register,right.location,location.register);
 
                   { now zero the result if left > nr_of_bits_in_right_register }
@@ -435,12 +435,12 @@ implementation
                     {should be caught earlier }
                     internalerror(2007020402);
 
-                  cg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,location.size,left.location.value-setbase,
+                  hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.value-setbase,
                     right.location,location.register);
                 end
                else
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList, left.location, opsize, true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
                   register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
                   pleftreg := left.location.register;
 
@@ -464,7 +464,7 @@ implementation
                       cg.a_label(current_asmdata.CurrAsmList, l);
                     end;
 
-                  cg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,left.location.size,location.size,
+                  hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,left.resultdef,right.resultdef,resultdef,
                     pleftreg,right.location,location.register);
 
                   if needslabel then

compiler/ncgutil.pas

@@ -60,15 +60,11 @@ interface
     procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
 //    procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
 
-    procedure location_force_reg(list:TAsmList;var l:tlocation;dst_size:TCGSize;maybeconst:boolean);
     procedure location_force_fpureg(list:TAsmList;var l: tlocation;maybeconst:boolean);
-    procedure location_force_mem(list:TAsmList;var l:tlocation);
     procedure location_force_mmregscalar(list:TAsmList;var l: tlocation;maybeconst:boolean);
     procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
     procedure location_allocate_register(list:TAsmList;out l: tlocation;def: tdef;constant: boolean);
 
-    { load a tlocation into a cgpara }
-    procedure gen_load_loc_cgpara(list: TAsmList; vardef: tdef; const l: tlocation; const cgpara: tcgpara);
     { loads a cgpara into a tlocation; assumes that loc.loc is already
       initialised }
     procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
@@ -316,7 +312,7 @@ implementation
                      LOC_SUBSETREF,LOC_CSUBSETREF:
                        begin
                          tmpreg := cg.getintregister(list,OS_INT);
-                         cg.a_load_loc_reg(list,OS_INT,p.location,tmpreg);
+                         hlcg.a_load_loc_reg(list,p.resultdef,osuinttype,p.location,tmpreg);
                          cg.a_cmp_const_reg_label(list,OS_INT,OC_NE,0,tmpreg,current_procinfo.CurrTrueLabel);
                          cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
                        end;
@@ -325,7 +321,7 @@ implementation
 {$ifndef cpu64bitalu}
                          if opsize in [OS_64,OS_S64] then
                            begin
-                             location_force_reg(list,p.location,opsize,true);
+                             hlcg.location_force_reg(list,p.location,p.resultdef,hlcg.tcgsize2orddef(opsize),true);
                              tmpreg:=cg.getintregister(list,OS_32);
                              cg.a_op_reg_reg_reg(list,OP_OR,OS_32,p.location.register64.reglo,p.location.register64.reghi,tmpreg);
                              location_reset(p.location,LOC_REGISTER,OS_32);
@@ -473,190 +469,6 @@ implementation
                                      TLocation
 *****************************************************************************}
 
-    procedure location_force_reg(list:TAsmList;var l:tlocation;dst_size:TCGSize;maybeconst:boolean);
-      var
-        hregister,
-        hregisterhi : tregister;
-        hreg64 : tregister64;
-        hl : tasmlabel;
-        oldloc : tlocation;
-        const_location: boolean;
-     begin
-        oldloc:=l;
-        if dst_size=OS_NO then
-          internalerror(200309144);
-{$ifndef cpu64bitalu}
-        { handle transformations to 64bit separate }
-        if dst_size in [OS_64,OS_S64] then
-         begin
-           if not (l.size in [OS_64,OS_S64]) then
-            begin
-              { load a smaller size to OS_64 }
-              if l.loc=LOC_REGISTER then
-               begin
-{$ifdef AVR}
-                 { on avr, we cannot change the size of a register
-                   due to the nature how register with size > OS8 are handled
-                 }
-                 hregister:=cg.getintregister(list,OS_32);
-{$else AVR}
-                 hregister:=cg.makeregsize(list,l.register64.reglo,OS_32);
-{$endif AVR}
-                 cg.a_load_reg_reg(list,l.size,OS_32,l.register64.reglo,hregister);
-               end
-              else
-               hregister:=cg.getintregister(list,OS_32);
-              { load value in low register }
-              case l.loc of
-{$ifdef cpuflags}
-                LOC_FLAGS :
-                  cg.g_flags2reg(list,OS_INT,l.resflags,hregister);
-{$endif cpuflags}
-                LOC_JUMP :
-                  begin
-                    cg.a_label(list,current_procinfo.CurrTrueLabel);
-                    cg.a_load_const_reg(list,OS_INT,1,hregister);
-                    current_asmdata.getjumplabel(hl);
-                    cg.a_jmp_always(list,hl);
-                    cg.a_label(list,current_procinfo.CurrFalseLabel);
-                    cg.a_load_const_reg(list,OS_INT,0,hregister);
-                    cg.a_label(list,hl);
-                  end;
-                else
-                  cg.a_load_loc_reg(list,OS_INT,l,hregister);
-              end;
-              { reset hi part, take care of the signed bit of the current value }
-              hregisterhi:=cg.getintregister(list,OS_32);
-              if (l.size in [OS_S8,OS_S16,OS_S32]) then
-               begin
-                 if l.loc=LOC_CONSTANT then
-                  begin
-                    if (longint(l.value)<0) then
-                     cg.a_load_const_reg(list,OS_32,aint($ffffffff),hregisterhi)
-                    else
-                     cg.a_load_const_reg(list,OS_32,0,hregisterhi);
-                  end
-                 else
-                  begin
-                    cg.a_op_const_reg_reg(list,OP_SAR,OS_32,31,hregister,
-                      hregisterhi);
-                  end;
-               end
-              else
-               cg.a_load_const_reg(list,OS_32,0,hregisterhi);
-              location_reset(l,LOC_REGISTER,dst_size);
-              l.register64.reglo:=hregister;
-              l.register64.reghi:=hregisterhi;
-            end
-           else
-            begin
-              { 64bit to 64bit }
-              if ((l.loc=LOC_CREGISTER) and maybeconst) then
-               begin
-                 hregister:=l.register64.reglo;
-                 hregisterhi:=l.register64.reghi;
-                 const_location := true;
-               end
-              else
-               begin
-                 hregister:=cg.getintregister(list,OS_32);
-                 hregisterhi:=cg.getintregister(list,OS_32);
-                 const_location := false;
-               end;
-              hreg64.reglo:=hregister;
-              hreg64.reghi:=hregisterhi;
-              { load value in new register }
-              cg64.a_load64_loc_reg(list,l,hreg64);
-              if not const_location then
-                location_reset(l,LOC_REGISTER,dst_size)
-              else
-                location_reset(l,LOC_CREGISTER,dst_size);
-              l.register64.reglo:=hregister;
-              l.register64.reghi:=hregisterhi;
-            end;
-         end
-        else
-{$endif cpu64bitalu}
-         begin
-           {Do not bother to recycle the existing register. The register
-            allocator eliminates unnecessary moves, so it's not needed
-            and trying to recycle registers can cause problems because
-            the registers changes size and may need aditional constraints.
-
-            Not if it's about LOC_CREGISTER's (JM)
-            }
-           const_location :=
-              (maybeconst) and
-              (l.loc = LOC_CREGISTER) and
-              (TCGSize2Size[l.size] = TCGSize2Size[dst_size]) and
-              ((l.size = dst_size) or
-               (TCGSize2Size[l.size] = sizeof(aint)));
-           if not const_location then
-             hregister:=cg.getintregister(list,dst_size)
-           else
-             hregister := l.register;
-           { load value in new register }
-           case l.loc of
-{$ifdef cpuflags}
-             LOC_FLAGS :
-               cg.g_flags2reg(list,dst_size,l.resflags,hregister);
-{$endif cpuflags}
-             LOC_JUMP :
-               begin
-                 cg.a_label(list,current_procinfo.CurrTrueLabel);
-                 cg.a_load_const_reg(list,dst_size,1,hregister);
-                 current_asmdata.getjumplabel(hl);
-                 cg.a_jmp_always(list,hl);
-                 cg.a_label(list,current_procinfo.CurrFalseLabel);
-                 cg.a_load_const_reg(list,dst_size,0,hregister);
-                 cg.a_label(list,hl);
-               end;
-             else
-               begin
-                 { load_loc_reg can only handle size >= l.size, when the
-                   new size is smaller then we need to adjust the size
-                   of the orignal and maybe recalculate l.register for i386 }
-                 if (TCGSize2Size[dst_size]<TCGSize2Size[l.size]) then
-                  begin
-                    if (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
-                      l.register:=cg.makeregsize(list,l.register,dst_size);
-                    { for big endian systems, the reference's offset must }
-                    { be increased in this case, since they have the      }
-                    { MSB first in memory and e.g. byte(word_var) should  }
-                    { return  the second byte in this case (JM)           }
-                    if (target_info.endian = ENDIAN_BIG) and
-                       (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
-                      begin
-                        inc(l.reference.offset,TCGSize2Size[l.size]-TCGSize2Size[dst_size]);
-                        l.reference.alignment:=newalignment(l.reference.alignment,TCGSize2Size[l.size]-TCGSize2Size[dst_size]);
-                      end;
-{$ifdef x86}
-                    if not (l.loc in [LOC_SUBSETREG,LOC_CSUBSETREG]) then
-                      l.size:=dst_size;
-{$endif x86}
-                  end;
-                 cg.a_load_loc_reg(list,dst_size,l,hregister);
-                 if (TCGSize2Size[dst_size]<TCGSize2Size[l.size])
-{$ifdef x86}
-                    and (l.loc in [LOC_SUBSETREG,LOC_CSUBSETREG])
-{$endif x86}
-                   then
-                     l.size:=dst_size;
-               end;
-           end;
-           if not const_location then
-             location_reset(l,LOC_REGISTER,dst_size)
-           else
-             location_reset(l,LOC_CREGISTER,dst_size);
-           l.register:=hregister;
-         end;
-       { Release temp when it was a reference }
-       if oldloc.loc=LOC_REFERENCE then
-         location_freetemp(list,oldloc);
-     end;
-
-
-
 
     procedure location_force_fpureg(list:TAsmList;var l: tlocation;maybeconst:boolean);
       var
@@ -721,7 +533,7 @@ implementation
                  else
                    newsize:=l.size;
                  reg:=cg.getmmregister(list,newsize);
-                 cg.a_loadmm_loc_reg(list,newsize,l,reg,mms_movescalar);
+                 hlcg.a_loadmm_loc_reg(list,l.size,newsize,l,reg,mms_movescalar);
                  l.size:=newsize;
                end;
             location_freetemp(list,l);
@@ -731,284 +543,6 @@ implementation
       end;
 
 
-    procedure gen_loadfpu_loc_cgpara(list: TAsmList; const l: tlocation;const cgpara: tcgpara;locintsize: longint);
-    var
-{$ifdef i386}
-        href   : treference;
-        size   : longint;
-{$endif i386}
-        locsize : tcgsize;
-        tmploc : tlocation;
-      begin
-           if not(l.size in [OS_32,OS_S32,OS_64,OS_S64,OS_128,OS_S128]) then
-             locsize:=l.size
-           else
-             locsize:=int_float_cgsize(tcgsize2size[l.size]);
-{$ifdef i386}
-           case l.loc of
-             LOC_FPUREGISTER,
-             LOC_CFPUREGISTER:
-               begin
-                 case cgpara.location^.loc of
-                   LOC_REFERENCE:
-                     begin
-                       size:=align(locintsize,cgpara.alignment);
-                       if (not paramanager.use_fixed_stack) and
-                          (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
-                         begin
-                           cg.g_stackpointer_alloc(list,size);
-                           reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
-                         end
-                       else
-                         reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
-                       cg.a_loadfpu_reg_ref(list,locsize,locsize,l.register,href);
-                     end;
-                   LOC_FPUREGISTER:
-                     begin
-                       cg.a_loadfpu_reg_reg(list,locsize,cgpara.location^.size,l.register,cgpara.location^.register);
-                     end;
-                   { can happen if a record with only 1 "single field" is
-                     returned in a floating point register and then is directly
-                     passed to a regcall parameter }
-                   LOC_REGISTER:
-                     begin
-                       tmploc:=l;
-                       location_force_mem(list,tmploc);
-                       case locsize of
-                         OS_F32:
-                           tmploc.size:=OS_32;
-                         OS_F64:
-                           tmploc.size:=OS_64;
-                         else
-                           internalerror(2010053116);
-                       end;
-                       cg.a_load_loc_cgpara(list,tmploc,cgpara);
-                       location_freetemp(list,tmploc);
-                     end
-                   else
-                     internalerror(2010053003);
-                 end;
-               end;
-             LOC_MMREGISTER,
-             LOC_CMMREGISTER:
-               begin
-                 case cgpara.location^.loc of
-                   LOC_REFERENCE:
-                     begin
-                       { can't use TCGSize2Size[l.size], because the size of an
-                         80 bit extended parameter can be either 10 or 12 bytes }
-                       size:=align(locintsize,cgpara.alignment);
-                       if (not paramanager.use_fixed_stack) and
-                          (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
-                         begin
-                           cg.g_stackpointer_alloc(list,size);
-                           reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
-                         end
-                       else
-                         reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
-                       cg.a_loadmm_reg_ref(list,locsize,locsize,l.register,href,mms_movescalar);
-                     end;
-                   LOC_FPUREGISTER:
-                     begin
-                       tmploc:=l;
-                       location_force_mem(list,tmploc);
-                       cg.a_loadfpu_ref_cgpara(list,tmploc.size,tmploc.reference,cgpara);
-                       location_freetemp(list,tmploc);
-                     end;
-                   else
-                     internalerror(2010053004);
-                 end;
-               end;
-             LOC_REFERENCE,
-             LOC_CREFERENCE :
-               begin
-                 case cgpara.location^.loc of
-                   LOC_REFERENCE:
-                     begin
-                       size:=align(locintsize,cgpara.alignment);
-                       if (not paramanager.use_fixed_stack) and
-                          (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
-                         cg.a_load_ref_cgpara(list,locsize,l.reference,cgpara)
-                       else
-                         begin
-                           reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
-                           cg.g_concatcopy(list,l.reference,href,size);
-                         end;
-                     end;
-                   LOC_FPUREGISTER:
-                     begin
-                       cg.a_loadfpu_ref_cgpara(list,locsize,l.reference,cgpara);
-                     end;
-                   else
-                     internalerror(2010053005);
-                 end;
-               end;
-             else
-               internalerror(2002042430);
-           end;
-{$else i386}
-           case l.loc of
-             LOC_MMREGISTER,
-             LOC_CMMREGISTER:
-               case cgpara.location^.loc of
-                 LOC_REFERENCE,
-                 LOC_CREFERENCE,
-                 LOC_MMREGISTER,
-                 LOC_CMMREGISTER,
-                 LOC_REGISTER,
-                 LOC_CREGISTER :
-                   cg.a_loadmm_reg_cgpara(list,locsize,l.register,cgpara,mms_movescalar);
-                 LOC_FPUREGISTER,
-                 LOC_CFPUREGISTER:
-                   begin
-                     tmploc:=l;
-                     location_force_fpureg(list,tmploc,false);
-                     cg.a_loadfpu_reg_cgpara(list,tmploc.size,tmploc.register,cgpara);
-                   end;
-                 else
-                   internalerror(200204249);
-               end;
-             LOC_FPUREGISTER,
-             LOC_CFPUREGISTER:
-               case cgpara.location^.loc of
-                 LOC_MMREGISTER,
-                 LOC_CMMREGISTER:
-                   begin
-                     tmploc:=l;
-                     location_force_mmregscalar(list,tmploc,false);
-                     cg.a_loadmm_reg_cgpara(list,tmploc.size,tmploc.register,cgpara,mms_movescalar);
-                   end;
-                 { Some targets pass floats in normal registers }
-                 LOC_REGISTER,
-                 LOC_CREGISTER,
-                 LOC_REFERENCE,
-                 LOC_CREFERENCE,
-                 LOC_FPUREGISTER,
-                 LOC_CFPUREGISTER:
-                   cg.a_loadfpu_reg_cgpara(list,locsize,l.register,cgpara);
-                 else
-                   internalerror(2002042433);
-               end;
-             LOC_REFERENCE,
-             LOC_CREFERENCE:
-               case cgpara.location^.loc of
-                 LOC_MMREGISTER,
-                 LOC_CMMREGISTER:
-                   cg.a_loadmm_ref_cgpara(list,locsize,l.reference,cgpara,mms_movescalar);
-                 { Some targets pass floats in normal registers }
-                 LOC_REGISTER,
-                 LOC_CREGISTER,
-                 LOC_REFERENCE,
-                 LOC_CREFERENCE,
-                 LOC_FPUREGISTER,
-                 LOC_CFPUREGISTER:
-                   cg.a_loadfpu_ref_cgpara(list,locsize,l.reference,cgpara);
-                 else
-                   internalerror(2002042431);
-               end;
-             LOC_REGISTER,
-             LOC_CREGISTER :
-               begin
-{$ifndef cpu64bitalu}
-                  { Only a_load_ref_cgpara supports multiple locations, when the
-                    value is still a const or in a register then write it
-                    to a reference first. This situation can be triggered
-                    by typecasting an int64 constant to a record of 8 bytes }
-                  if locsize = OS_F64 then
-                    begin
-                      tmploc:=l;
-                      location_force_mem(list,tmploc);
-                      cg.a_load_loc_cgpara(list,tmploc,cgpara);
-                      location_freetemp(list,tmploc);
-                    end
-                  else
-{$endif not cpu64bitalu}
-                    cg.a_load_loc_cgpara(list,l,cgpara);
-               end;
-             else
-               internalerror(2002042432);
-           end;
-{$endif i386}
-      end;
-
-
-    procedure gen_load_loc_cgpara(list: TAsmList; vardef: tdef; const l: tlocation; const cgpara: tcgpara);
-{$ifndef cpu64bitalu}
-      var
-        tmploc: tlocation;
-{$endif not cpu64bitalu}
-      begin
-        { Handle Floating point types differently
-
-          This doesn't depend on emulator settings, emulator settings should
-          be handled by cpupara }
-        if (vardef.typ=floatdef) or
-           { some ABIs return certain records in an fpu register }
-           (l.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) or
-           (assigned(cgpara.location) and
-            (cgpara.Location^.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER])) then
-          begin
-            gen_loadfpu_loc_cgpara(list,l,cgpara,vardef.size);
-            exit;
-          end;
-
-        case l.loc of
-          LOC_CONSTANT,
-          LOC_REGISTER,
-          LOC_CREGISTER,
-          LOC_REFERENCE,
-          LOC_CREFERENCE :
-            begin
-{$ifndef cpu64bitalu}
-              { use cg64 only for int64, not for 8 byte records }
-              if is_64bit(vardef) then
-                cg64.a_load64_loc_cgpara(list,l,cgpara)
-              else
-{$endif not cpu64bitalu}
-                begin
-{$ifndef cpu64bitalu}
-                  { Only a_load_ref_cgpara supports multiple locations, when the
-                    value is still a const or in a register then write it
-                    to a reference first. This situation can be triggered
-                    by typecasting an int64 constant to a record of 8 bytes }
-                  if l.size in [OS_64,OS_S64] then
-                    begin
-                      tmploc:=l;
-                      location_force_mem(list,tmploc);
-                      cg.a_load_loc_cgpara(list,tmploc,cgpara);
-                      { do not free the tmploc in case the original value was
-                        already in memory, because the caller (ncgcal) will then
-                        free it again later }
-                      if not(l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
-                        location_freetemp(list,tmploc);
-                    end
-                  else
-{$endif not cpu64bitalu}
-                    cg.a_load_loc_cgpara(list,l,cgpara);
-                end;
-            end;
-          LOC_MMREGISTER,
-          LOC_CMMREGISTER:
-            begin
-              case l.size of
-                OS_F32,
-                OS_F64:
-                  cg.a_loadmm_loc_cgpara(list,l,cgpara,mms_movescalar);
-                else
-                  cg.a_loadmm_loc_cgpara(list,l,cgpara,nil);
-              end;
-            end;
-{$ifdef SUPPORT_MMX}
-          LOC_MMXREGISTER,
-          LOC_CMMXREGISTER:
-            cg.a_loadmm_reg_cgpara(list,OS_M64,l.register,cgpara,nil);
-{$endif SUPPORT_MMX}
-          else
-            internalerror(200204241);
-        end;
-      end;
-
-
     procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
       var
         tmpreg: tregister;
@@ -1043,7 +577,7 @@ implementation
            ((l.loc<>LOC_CMMREGISTER) or (not maybeconst)) then
           begin
             reg:=cg.getmmregister(list,OS_VECTOR);
-            cg.a_loadmm_loc_reg(list,OS_VECTOR,l,reg,nil);
+            hlcg.a_loadmm_loc_reg(list,l.size,OS_VECTOR,l,reg,nil);
             location_freetemp(list,l);
             location_reset(l,LOC_MMREGISTER,OS_VECTOR);
             l.register:=reg;
@@ -1093,59 +627,6 @@ implementation
       end;
 
 
-    procedure location_force_mem(list:TAsmList;var l:tlocation);
-      var
-        r : treference;
-      begin
-        case l.loc of
-          LOC_FPUREGISTER,
-          LOC_CFPUREGISTER :
-            begin
-              tg.GetTemp(list,TCGSize2Size[l.size],TCGSize2Size[l.size],tt_normal,r);
-              cg.a_loadfpu_reg_ref(list,l.size,l.size,l.register,r);
-              location_reset_ref(l,LOC_REFERENCE,l.size,0);
-              l.reference:=r;
-            end;
-          LOC_MMREGISTER,
-          LOC_CMMREGISTER:
-            begin
-              tg.GetTemp(list,TCGSize2Size[l.size],TCGSize2Size[l.size],tt_normal,r);
-              cg.a_loadmm_reg_ref(list,l.size,l.size,l.register,r,mms_movescalar);
-              location_reset_ref(l,LOC_REFERENCE,l.size,0);
-              l.reference:=r;
-            end;
-          LOC_CONSTANT,
-          LOC_REGISTER,
-          LOC_CREGISTER :
-            begin
-              tg.GetTemp(list,TCGSize2Size[l.size],TCGSize2Size[l.size],tt_normal,r);
-{$ifndef cpu64bitalu}
-              if l.size in [OS_64,OS_S64] then
-                cg64.a_load64_loc_ref(list,l,r)
-              else
-{$endif not cpu64bitalu}
-                cg.a_load_loc_ref(list,l.size,l,r);
-              location_reset_ref(l,LOC_REFERENCE,l.size,0);
-              l.reference:=r;
-            end;
-          LOC_SUBSETREG,
-          LOC_CSUBSETREG,
-          LOC_SUBSETREF,
-          LOC_CSUBSETREF:
-            begin
-              tg.GetTemp(list,TCGSize2Size[l.size],TCGSize2Size[l.size],tt_normal,r);
-              cg.a_load_loc_ref(list,l.size,l,r);
-              location_reset_ref(l,LOC_REFERENCE,l.size,0);
-              l.reference:=r;
-            end;
-          LOC_CREFERENCE,
-          LOC_REFERENCE : ;
-          else
-            internalerror(200203219);
-        end;
-      end;
-
-
 {****************************************************************************
                             Init/Finalize Code
 ****************************************************************************}
@@ -1158,6 +639,7 @@ implementation
         hsym : tparavarsym;
         l    : longint;
         localcopyloc : tlocation;
+        sizedef : tdef;
       begin
         list:=TAsmList(arg);
         if (tsym(p).typ=paravarsym) and
@@ -1182,7 +664,8 @@ implementation
                     else
                       internalerror(2006080401);
 //                      cg.g_copyvaluepara_packedopenarray(list,href,hsym.intialloc,tarraydef(tparavarsym(p).vardef).elepackedbitsize,hreg);
-                    cg.a_load_reg_loc(list,OS_ADDR,hreg,tparavarsym(p).initialloc);
+                    sizedef:=getpointerdef(tparavarsym(p).vardef);
+                    hlcg.a_load_reg_loc(list,sizedef,sizedef,hreg,tparavarsym(p).initialloc);
                   end;
               end
             else
@@ -2591,7 +2074,8 @@ implementation
               LOC_REFERENCE:
                 begin
                   reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
-                  cg.a_load_loc_reg(list,OS_ADDR,selfloc,href.base);
+                  { todo: pass actual vmt pointer type to hlcg }
+                  hlcg.a_load_loc_reg(list,voidpointertype,voidpointertype,selfloc,href.base);
                 end;
               else
                 internalerror(200305057);

compiler/powerpc/cgcpu.pas

@@ -53,10 +53,6 @@ unit cgcpu;
         procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
         procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
 
-        procedure a_load_subsetreg_reg(list : TAsmList; subsetsize: tcgsize;
-          tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); override;
-        procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize: tcgsize; const fromsreg, tosreg: tsubsetregister); override;
-
         {  comparison operations }
         procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
           l : tasmlabel);override;
@@ -79,8 +75,6 @@ unit cgcpu;
         { that's the case, we can use rlwinm to do an AND operation        }
         function get_rlwi_const(a: aint; var l1, l2: longint): boolean;
 
-      protected
-       procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); override;
       private
 
         (* NOT IN USE: *)
@@ -344,62 +338,6 @@ const
        end;
 
 
-     procedure tcgppc.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
-
-       begin
-         if (sreg.bitlen > 32) then
-           internalerror(2008020701);
-         if (sreg.bitlen <> 32) then
-           begin
-             list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,destreg,
-               sreg.subsetreg,(32-sreg.startbit) and 31,32-sreg.bitlen,31));
-             { types with a negative lower bound are always a base type (8, 16, 32 bits) }
-             if (subsetsize in [OS_S8..OS_S128]) then
-               if ((sreg.bitlen mod 8) = 0) then
-                 begin
-                   a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,destreg,destreg);
-                   a_load_reg_reg(list,subsetsize,tosize,destreg,destreg);
-                 end
-               else
-                 begin
-                   a_op_const_reg(list,OP_SHL,OS_INT,32-sreg.bitlen,destreg);
-                   a_op_const_reg(list,OP_SAR,OS_INT,32-sreg.bitlen,destreg);
-                 end;
-           end
-         else
-           a_load_reg_reg(list,subsetsize,tosize,sreg.subsetreg,destreg);
-       end;
-
-
-     procedure tcgppc.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
-
-       begin
-         if (slopt in [SL_SETZERO,SL_SETMAX]) then
-           inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
-         else if (sreg.bitlen>32) then
-           internalerror(2008020702)
-         else if (sreg.bitlen <> 32) then
-           list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,sreg.subsetreg,fromreg,
-             sreg.startbit,32-sreg.startbit-sreg.bitlen,31-sreg.startbit))
-         else
-           a_load_reg_reg(list,fromsize,subsetsize,fromreg,sreg.subsetreg);
-       end;
-
-
-       procedure tcgppc.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize: tcgsize; const fromsreg, tosreg: tsubsetregister);
-
-         begin
-           if (tosreg.bitlen>32) or (tosreg.startbit>31) then
-             internalerror(2008020703);
-           if (fromsreg.bitlen >= tosreg.bitlen) then
-             list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,tosreg.subsetreg, fromsreg.subsetreg,
-                (tosreg.startbit-fromsreg.startbit) and 31,
-                32-tosreg.startbit-tosreg.bitlen,31-tosreg.startbit))
-           else
-             inherited a_load_subsetreg_subsetreg(list,fromsubsetsize,tosubsetsize,fromsreg,tosreg);
-         end;
-
-
      procedure tcgppc.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
 
        begin

compiler/powerpc/hlcgcpu.pas

@@ -2,8 +2,7 @@
     Copyright (c) 1998-2010 by Florian Klaempfl and Jonas Maebe
     Member of the Free Pascal development team
 
-    This unit contains routines to create a pass-through high-level code
-    generator. This is used by most regular code generators.
+    This unit contains high-level code generator support for ppc32
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -28,18 +27,96 @@ unit hlcgcpu;
 
 interface
 
+  uses
+    aasmdata,
+    symtype,
+    cgbase,cgutils,hlcgobj,hlcgppc;
+
+  type
+    thlcgcpu = class(thlcgppcgen)
+     procedure a_load_subsetreg_reg(list: TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister); override;
+     procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize: tdef; const fromsreg, tosreg: tsubsetregister); override;
+    protected
+     procedure a_load_regconst_subsetreg_intern(list: TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); override;
+    end;
+
   procedure create_hlcodegen;
 
 implementation
 
   uses
-    hlcgobj, hlcg2ll,
-    cgcpu;
+    verbose,
+    cpubase,aasmcpu,
+    defutil,
+    cgobj,cgcpu;
+
+  { thlcgppc }
+
+  procedure thlcgcpu.a_load_subsetreg_reg(list: TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister);
+    var
+      cgsubsetsize,
+      cgtosize: tcgsize;
+    begin
+      if (sreg.bitlen > 32) then
+        internalerror(2008020701);
+      cgsubsetsize:=def_cgsize(subsetsize);
+      cgtosize:=def_cgsize(tosize);
+      if (sreg.bitlen <> 32) then
+        begin
+          list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,destreg,
+            sreg.subsetreg,(32-sreg.startbit) and 31,32-sreg.bitlen,31));
+          { types with a negative lower bound are always a base type (8, 16, 32 bits) }
+          if (cgsubsetsize in [OS_S8..OS_S128]) then
+            if ((sreg.bitlen mod 8) = 0) then
+              begin
+                cg.a_load_reg_reg(list,tcgsize2unsigned[cgsubsetsize],cgsubsetsize,destreg,destreg);
+                cg.a_load_reg_reg(list,cgsubsetsize,cgtosize,destreg,destreg);
+              end
+            else
+              begin
+                cg.a_op_const_reg(list,OP_SHL,OS_INT,32-sreg.bitlen,destreg);
+                cg.a_op_const_reg(list,OP_SAR,OS_INT,32-sreg.bitlen,destreg);
+              end;
+        end
+      else
+        cg.a_load_reg_reg(list,cgsubsetsize,cgtosize,sreg.subsetreg,destreg);
+    end;
+
+
+  procedure thlcgcpu.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize: tdef; const fromsreg, tosreg: tsubsetregister);
+    begin
+      if (tosreg.bitlen>32) or (tosreg.startbit>31) then
+        internalerror(2008020703);
+      if (fromsreg.bitlen>=tosreg.bitlen) then
+        list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,tosreg.subsetreg, fromsreg.subsetreg,
+           (tosreg.startbit-fromsreg.startbit) and 31,
+           32-tosreg.startbit-tosreg.bitlen,31-tosreg.startbit))
+      else
+        inherited a_load_subsetreg_subsetreg(list,fromsubsetsize,tosubsetsize,fromsreg,tosreg);
+    end;
+
+
+  procedure thlcgcpu.a_load_regconst_subsetreg_intern(list: TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
+    begin
+      if (slopt in [SL_SETZERO,SL_SETMAX]) then
+        inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
+      else if (sreg.bitlen>32) then
+        internalerror(2008020702)
+      else if (sreg.bitlen<>32) then
+        list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,sreg.subsetreg,fromreg,
+          sreg.startbit,32-sreg.startbit-sreg.bitlen,31-sreg.startbit))
+      else
+        cg.a_load_reg_reg(list,def_cgsize(fromsize),def_cgsize(subsetsize),fromreg,sreg.subsetreg);
+    end;
+
+
 
   procedure create_hlcodegen;
     begin
-      hlcg:=thlcg2ll.create;
+      hlcg:=thlcgcpu.create;
       create_codegen;
     end;
 
+
 end.
+

compiler/powerpc/nppcadd.pas

@@ -51,7 +51,7 @@ interface
       cgbase,cpuinfo,pass_1,pass_2,regvars,
       cpupara,cgcpu,cgutils,procinfo,
       ncon,nset,
-      ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
+      ncgutil,tgobj,rgobj,rgcpu,cgobj,hlcgobj,cg64f32;
 
 
 {*****************************************************************************
@@ -436,8 +436,8 @@ interface
                       else
                         begin
                           // const32 - reg64
-                          location_force_reg(current_asmdata.CurrAsmList,left.location,
-                            OS_32,true);
+                          hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+                            left.resultdef,u32inttype,true);
                           current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBC,
                             location.register64.reglo,left.location.register64.reglo,
                             right.location.register64.reglo));
@@ -451,7 +451,7 @@ interface
                       current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SUBFIC,
                         location.register64.reglo,right.location.register64.reglo,0));
                       left.location.value64 := left.location.value64 shr 32;
-                      location_force_reg(current_asmdata.CurrAsmList,left.location,OS_32,true);
+                      hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
                       current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBFE,
                         location.register64.reghi,right.location.register64.reghi,
                         left.location.register));
@@ -459,8 +459,8 @@ interface
                   else
                     begin
                       // const64 - reg64
-                      location_force_reg(current_asmdata.CurrAsmList,left.location,
-                        def_cgsize(left.resultdef),false);
+                      hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+                        left.resultdef,left.resultdef,false);
                       cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,location.size,
                         right.location.register64,left.location.register64,
                         location.register64);

compiler/powerpc/nppccnv.pas

@@ -63,7 +63,7 @@ implementation
       ncon,ncal,
       ncgutil,procinfo,
       cpubase,aasmcpu,
-      rgobj,tgobj,cgobj;
+      rgobj,tgobj,cgobj,hlcgobj;
 
 
 {*****************************************************************************
@@ -167,7 +167,7 @@ implementation
           internalerror(200110011);
 
         if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
-          location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
         case left.location.loc of
           LOC_REGISTER:
             begin

compiler/powerpc/nppcmat.pas

@@ -53,10 +53,10 @@ implementation
     uses
       globtype,systems,constexp,
       cutils,verbose,globals,
-      symconst,
+      symconst,symdef,
       aasmbase,aasmcpu,aasmtai,aasmdata,
       defutil,
-      cgbase,cgutils,cgobj,pass_2,
+      cgbase,cgutils,cgobj,hlcgobj,pass_2,
       ncon,procinfo,
       cpubase,
       ncgutil,cgcpu;
@@ -289,8 +289,8 @@ end;
 
          { put numerator in register }
          size:=def_cgsize(left.resultdef);
-         location_force_reg(current_asmdata.CurrAsmList,left.location,
-           size,true);
+         hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+           left.resultdef,left.resultdef,true);
          location_copy(location,left.location);
          numerator := location.register;
          resultreg := location.register;
@@ -315,8 +315,8 @@ end;
 
          if (not done) then begin
              { load divider in a register if necessary }
-             location_force_reg(current_asmdata.CurrAsmList,right.location,
-               def_cgsize(right.resultdef),true);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,
+               right.resultdef,right.resultdef,true);
              if (right.nodetype <> ordconstn) then
                current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_CMPWI,NR_CR1,
                  right.location.register,0));
@@ -379,8 +379,8 @@ end;
 
          if is_64bitint(left.resultdef) then
            begin
-             location_force_reg(current_asmdata.CurrAsmList,left.location,
-               def_cgsize(left.resultdef),true);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+               left.resultdef,left.resultdef,true);
              location_copy(location,left.location);
              hreg64hi := location.register64.reghi;
              hreg64lo := location.register64.reglo;
@@ -449,7 +449,7 @@ end;
              else
                { no constant shiftcount }
                begin
-                 location_force_reg(current_asmdata.CurrAsmList,right.location,OS_S32,true);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,s32inttype,true);
                  hregister1 := right.location.register;
                  if nodetype = shln then
                    begin
@@ -498,7 +498,7 @@ end;
          else
            begin
              { load left operators in a register }
-             location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
              location_copy(location,left.location);
              resultreg := location.register;
              hregister1 := location.register;
@@ -519,7 +519,7 @@ end;
              else
                begin
                  { load shift count in a register if necessary }
-                 location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(right.resultdef),true);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
                  hregister2 := right.location.register;
 
                  cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,hregister2,
@@ -543,7 +543,7 @@ end;
          secondpass(left);
          if is_64bit(left.resultdef) then
            begin
-             location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
              location_copy(location,left.location);
              if (location.loc = LOC_CREGISTER) then
                begin
@@ -563,7 +563,7 @@ end;
          else
            begin
               if left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF] then
-                location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
               location_copy(location,left.location);
               location.loc:=LOC_REGISTER;
               case left.location.loc of
@@ -667,7 +667,7 @@ end;
                   LOC_SUBSETREG, LOC_CSUBSETREG, 
                   LOC_SUBSETREF, LOC_CSUBSETREF:
                     begin
-                      location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+                      hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                       tmpreg:=left.location.register;
 {$ifndef cpu64bitalu}
                       { 64 bit pascal booleans have their truth value stored in
@@ -692,7 +692,7 @@ end;
          else if is_64bitint(left.resultdef) then
            begin
              secondpass(left);
-             location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),false);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
              location_copy(location,left.location);
              { perform the NOT operation }
              current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_NOT,location.register64.reghi,
@@ -703,7 +703,7 @@ end;
          else
            begin
              secondpass(left);
-             location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
              location_copy(location,left.location);
              location.loc := LOC_REGISTER;
              location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);

compiler/powerpc64/cgcpu.pas

@@ -59,9 +59,6 @@ type
     procedure a_load_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1,
       reg2: tregister); override;
 
-    procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); override;
-    procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); override;
-
     {  comparison operations }
     procedure a_cmp_const_reg_label(list: TAsmList; size: tcgsize; cmp_op:
       topcmp; a: aint; reg: tregister;
@@ -102,8 +99,6 @@ type
 
   private
 
-    procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); override;
-
     procedure maybeadjustresult(list: TAsmList; op: TOpCg; size: tcgsize; dst: tregister);
 
     { returns whether a reference can be used immediately in a powerpc }
@@ -664,59 +659,6 @@ begin
   rg[R_INTREGISTER].add_move_instruction(instr);
 end;
 
-procedure tcgppc.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
-begin
-  {$ifdef extdebug}
-  list.concat(tai_comment.create(strpnew('a_load_subsetreg_reg subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(subsetsize) + ' startbit = ' + intToStr(sreg.startbit) + ' tosize = ' + cgsize2string(tosize))));
-  {$endif}
-  { do the extraction if required and then extend the sign correctly. (The latter is actually required only for signed subsets
-  and if that subset is not >= the tosize). }
-  if (sreg.startbit <> 0) or
-     (sreg.bitlen <> tcgsize2size[subsetsize]*8) then begin
-    list.concat(taicpu.op_reg_reg_const_const(A_RLDICL, destreg, sreg.subsetreg, (64 - sreg.startbit) and 63, 64 - sreg.bitlen));
-    if (subsetsize in [OS_S8..OS_S128]) then
-      if ((sreg.bitlen mod 8) = 0) then begin
-        a_load_reg_reg(list, tcgsize2unsigned[subsetsize], subsetsize, destreg, destreg);
-        a_load_reg_reg(list, subsetsize, tosize, destreg, destreg);
-      end else begin
-        a_op_const_reg(list,OP_SHL,OS_INT,64-sreg.bitlen,destreg);
-        a_op_const_reg(list,OP_SAR,OS_INT,64-sreg.bitlen,destreg);
-     end;
-  end else begin
-    a_load_reg_reg(list, tcgsize2unsigned[sreg.subsetregsize], subsetsize, sreg.subsetreg, destreg);
-    a_load_reg_reg(list, subsetsize, tosize, destreg, destreg);
-  end;
-end;
-
-procedure tcgppc.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
-begin
-  {$ifdef extdebug}
-  list.concat(tai_comment.create(strpnew('a_load_reg_subsetreg fromsize = ' + cgsize2string(fromsize) + ' subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(subsetsize) + ' startbit = ' + IntToStr(sreg.startbit))));
-  {$endif}
-  if (slopt in [SL_SETZERO,SL_SETMAX]) then
-    inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
-  else if (sreg.bitlen <> sizeof(aint)*8) then
-    { simply use the INSRDI instruction }
-    list.concat(taicpu.op_reg_reg_const_const(A_INSRDI, sreg.subsetreg, fromreg, sreg.bitlen, (64 - (sreg.startbit + sreg.bitlen)) and 63))
-  else
-    a_load_reg_reg(list, fromsize, subsetsize, fromreg, sreg.subsetreg);
-end;
-
-procedure tcgppc.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize;
-  a: aint; const sreg: tsubsetregister);
-var
-  tmpreg : TRegister;
-begin
-  {$ifdef extdebug}
-  list.concat(tai_comment.create(strpnew('a_load_const_subsetreg subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(subsetsize) + ' startbit = ' + intToStr(sreg.startbit) + ' a = ' + intToStr(a))));
-  {$endif}
-  { loading the constant into the lowest bits of a temp register and then inserting is
-    better than loading some usually large constants and do some masking and shifting on ppc64 }
-  tmpreg := getintregister(list,subsetsize);
-  a_load_const_reg(list,subsetsize,a,tmpreg);
-  a_load_reg_subsetreg(list, subsetsize, subsetsize, tmpreg, sreg);
-end;
-
 procedure tcgppc.a_op_const_reg(list: TAsmList; Op: TOpCG; size: TCGSize; a:
   aint; reg: TRegister);
 begin

compiler/powerpc64/hlcgcpu.pas

@@ -2,8 +2,7 @@
     Copyright (c) 1998-2010 by Florian Klaempfl and Jonas Maebe
     Member of the Free Pascal development team
 
-    This unit contains routines to create a pass-through high-level code
-    generator. This is used by most regular code generators.
+    This unit contains high-level code generator support for ppc64
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -28,18 +27,101 @@ unit hlcgcpu;
 
 interface
 
-  procedure create_hlcodegen;
+uses
+  globtype,
+  aasmdata,
+  symtype,
+  cgbase,cgutils,hlcgobj,hlcgppc;
+
+type
+  thlcgcpu = class(thlcgppcgen)
+    procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister); override;
+    procedure a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: aint; const sreg: tsubsetregister); override;
+   protected
+    procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); override;
+  end;
+
+   procedure create_hlcodegen;
 
 implementation
 
   uses
-    hlcgobj, hlcg2ll,
-    cgcpu;
+    cpubase,aasmcpu,
+    defutil,
+    cgobj,cgcpu;
+
+  { thlcgcpu }
+
+  procedure thlcgcpu.a_load_subsetreg_reg(list: TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister);
+    var
+      subsetcgsize: tcgsize;
+    begin
+      subsetcgsize:=def_cgsize(subsetsize);
+{$ifdef extdebug}
+      list.concat(tai_comment.create(strpnew('a_load_subsetreg_reg subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(subsetcgsize) + ' startbit = ' + intToStr(sreg.startbit) + ' tosize = ' + cgsize2string(def_cgsize(tosize)))));
+{$endif}
+      { do the extraction if required and then extend the sign correctly. (The latter is actually required only for signed subsets
+      and if that subset is not >= the tosize). }
+      if (sreg.startbit<>0) or
+         (sreg.bitlen<>tcgsize2size[subsetcgsize]*8) then
+        begin
+          list.concat(taicpu.op_reg_reg_const_const(A_RLDICL,destreg,sreg.subsetreg,(64-sreg.startbit) and 63,64-sreg.bitlen));
+          if subsetcgsize in [OS_S8..OS_S128] then
+            if (sreg.bitlen mod 8)=0 then
+              begin
+                cg.a_load_reg_reg(list, tcgsize2unsigned[subsetcgsize],subsetcgsize,destreg,destreg);
+                cg.a_load_reg_reg(list,subsetcgsize,def_cgsize(tosize),destreg,destreg);
+              end
+            else
+              begin
+                cg.a_op_const_reg(list,OP_SHL,OS_INT,64-sreg.bitlen,destreg);
+                cg.a_op_const_reg(list,OP_SAR,OS_INT,64-sreg.bitlen,destreg);
+             end;
+        end
+      else
+        begin
+          cg.a_load_reg_reg(list,tcgsize2unsigned[sreg.subsetregsize],subsetcgsize,sreg.subsetreg,destreg);
+          cg.a_load_reg_reg(list,subsetcgsize,def_cgsize(tosize),destreg,destreg);
+        end;
+    end;
+
+
+  procedure thlcgcpu.a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: aint; const sreg: tsubsetregister);
+    var
+      tmpreg : TRegister;
+    begin
+{$ifdef extdebug}
+      list.concat(tai_comment.create(strpnew('a_load_const_subsetreg subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(def_cgsize(subsetsize)) + ' startbit = ' + intToStr(sreg.startbit) + ' a = ' + intToStr(a))));
+{$endif}
+      { loading the constant into the lowest bits of a temp register and then inserting is
+        better than loading some usually large constants and do some masking and shifting on ppc64 }
+      tmpreg:=getintregister(list,tosubsetsize);
+      a_load_const_reg(list,tosubsetsize,a,tmpreg);
+      a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,sreg);
+    end;
+
+
+  procedure thlcgcpu.a_load_regconst_subsetreg_intern(list: TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
+    begin
+{$ifdef extdebug}
+      list.concat(tai_comment.create(strpnew('a_load_reg_subsetreg fromsize = ' + cgsize2string(def_cgsize(fromsize)) + ' subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(def_cgsize(subsetsize)) + ' startbit = ' + IntToStr(sreg.startbit))));
+{$endif}
+      if slopt in [SL_SETZERO,SL_SETMAX] then
+        inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
+      else if sreg.bitlen<>sizeof(aint)*8 then
+        { simply use the INSRDI instruction }
+        list.concat(taicpu.op_reg_reg_const_const(A_INSRDI,sreg.subsetreg,fromreg,sreg.bitlen,(64-(sreg.startbit+sreg.bitlen)) and 63))
+      else
+        a_load_reg_reg(list,fromsize,subsetsize,fromreg,sreg.subsetreg);
+    end;
+
 
   procedure create_hlcodegen;
     begin
-      hlcg:=thlcg2ll.create;
+      hlcg:=thlcgcpu.create;
       create_codegen;
     end;
 
+
+
 end.

compiler/powerpc64/nppccnv.pas

@@ -63,7 +63,7 @@ uses
   ncon, ncal,procinfo,
   ncgutil,
   cpubase, aasmcpu,
-  rgobj, tgobj, cgobj;
+  rgobj, tgobj, cgobj, hlcgobj;
 
 {*****************************************************************************
                              FirstTypeConv
@@ -147,7 +147,7 @@ begin
   end;
 
   if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
-    location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
   case left.location.loc of
     // the conversion algorithm does not modify the input register, so it can
     // be used for both LOC_REGISTER and LOC_CREGISTER

compiler/powerpc64/nppcmat.pas

@@ -55,7 +55,7 @@ uses
   symconst, symdef,
   aasmbase, aasmcpu, aasmtai,aasmdata,
   defutil,
-  cgbase, cgutils, cgobj, pass_1, pass_2,
+  cgbase, cgutils, cgobj, hlcgobj, pass_1, pass_2,
   ncon, procinfo, nbas, nld, nadd,
   cpubase, cpuinfo,
   ncgutil, cgcpu, rgobj;
@@ -184,8 +184,8 @@ begin
 
   { put numerator in register }
   size:=def_cgsize(left.resultdef);
-  location_force_reg(current_asmdata.CurrAsmList,left.location,
-    size,true);
+  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
+    left.resultdef,left.resultdef,true);
   location_copy(location,left.location);
   numerator := location.register;
   resultreg := location.register;
@@ -210,7 +210,7 @@ begin
 
   if (not done) then begin
     { load divider in a register if necessary }
-    location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(right.resultdef),true);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
     if (right.nodetype <> ordconstn) then
       current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_CMPDI, NR_CR7,
         right.location.register, 0))
@@ -269,8 +269,8 @@ begin
   secondpass(right);
 
   { load left operators in a register }
-  location_force_reg(current_asmdata.CurrAsmList, left.location,
-    def_cgsize(left.resultdef), true);
+  hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
+    left.resultdef, left.resultdef, true);
   location_copy(location, left.location);
   resultreg := location.register;
   hregister1 := location.register;
@@ -295,8 +295,8 @@ begin
       shiftval, hregister1, resultreg)
   end else begin
     { load shift count in a register if necessary }
-    location_force_reg(current_asmdata.CurrAsmList, right.location,
-      def_cgsize(right.resultdef), true);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList, right.location,
+      right.resultdef, right.resultdef, true);
     hregister2 := right.location.register;
     cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList, op, def_cgsize(resultdef), hregister2,
       hregister1, resultreg);
@@ -317,7 +317,7 @@ begin
   secondpass(left);
   begin
     if left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF] then
-      location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+      hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
     location_copy(location, left.location);
     location.loc := LOC_REGISTER;
     case left.location.loc of
@@ -409,8 +409,8 @@ begin
         LOC_SUBSETREG, LOC_CSUBSETREG,
         LOC_SUBSETREF, LOC_CSUBSETREF:
           begin
-            location_force_reg(current_asmdata.CurrAsmList, left.location,
-              def_cgsize(left.resultdef), true);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
+              left.resultdef, left.resultdef, true);
             current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPDI,
               left.location.register, 0));
             location_reset(location, LOC_FLAGS, OS_NO);
@@ -425,8 +425,8 @@ begin
   else
   begin
     secondpass(left);
-    location_force_reg(current_asmdata.CurrAsmList, left.location,
-      def_cgsize(left.resultdef), true);
+    hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
+      left.resultdef, left.resultdef, true);
     location_copy(location, left.location);
     location.loc := LOC_REGISTER;
     location.register := cg.getintregister(current_asmdata.CurrAsmList, OS_INT);

compiler/ppcgen/cgppc.pas

@@ -72,7 +72,6 @@ unit cgppc;
         procedure g_external_wrapper(list: TAsmList; pd: TProcDef; const externalname: string); override;
        protected
         function  get_darwin_call_stub(const s: string; weak: boolean): tasmsymbol;
-        procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override;
         { Make sure ref is a valid reference for the PowerPC and sets the }
         { base to the value of the index if (base = R_NO).                }
         { Returns true if the reference contained a base, index and an    }
@@ -611,40 +610,6 @@ unit cgppc;
       Comment(V_Error,'tcgppcgen.a_bit_scan_reg_reg method not implemented');
     end;
 
-  procedure tcgppcgen.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
-    var
-      fromsreg, tosreg: tsubsetregister;
-      restbits: byte;
-    begin
-      restbits := (sref.bitlen - (loadbitsize - sref.startbit));
-      if (subsetsize in [OS_S8..OS_S128]) then
-        begin
-         { sign extend }
-         a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
-         a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
-        end
-      else
-        begin
-          a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
-          { mask other bits }
-          if (sref.bitlen <> AIntBits) then
-            a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
-        end;
-      { use subsetreg routine, it may have been overridden with an optimized version }
-      fromsreg.subsetreg := extra_value_reg;
-      fromsreg.subsetregsize := OS_INT;
-      { subsetregs always count bits from right to left }
-      fromsreg.startbit := loadbitsize-restbits;
-      fromsreg.bitlen := restbits;
-
-      tosreg.subsetreg := valuereg;
-      tosreg.subsetregsize := OS_INT;
-      tosreg.startbit := 0;
-      tosreg.bitlen := restbits;
-
-      a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
-    end;
-
 
   procedure tcgppcgen.g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);
     var

compiler/ppcgen/hlcgppc.pas

@@ -0,0 +1,84 @@
+{
+    Copyright (c) 1998-2010 by Florian Klaempfl and Jonas Maebe
+    Member of the Free Pascal development team
+
+    This unit contains routines high-level code generator support shared by
+    ppc32 and ppc64
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit hlcgppc;
+
+{$mode objfpc}
+
+interface
+
+uses
+  aasmdata,
+  symtype,
+  cgbase,cgutils,hlcgobj,hlcg2ll;
+
+type
+  thlcgppcgen = class(thlcg2ll)
+   protected
+    procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tdef; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override;
+  end;
+
+implementation
+
+  uses
+    cpubase,globtype,
+    symdef,defutil;
+
+{ thlcgppc }
+
+  procedure thlcgppcgen.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tdef; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
+    var
+      fromsreg, tosreg: tsubsetregister;
+      restbits: byte;
+    begin
+      restbits:=(sref.bitlen-(loadbitsize-sref.startbit));
+      if is_signed(subsetsize) then
+        begin
+         { sign extend }
+         a_op_const_reg(list,OP_SHL,osuinttype,AIntBits-loadbitsize+sref.startbit,valuereg);
+         a_op_const_reg(list,OP_SAR,osuinttype,AIntBits-sref.bitlen,valuereg);
+        end
+      else
+        begin
+          a_op_const_reg(list,OP_SHL,osuinttype,restbits,valuereg);
+          { mask other bits }
+          if (sref.bitlen<>AIntBits) then
+            a_op_const_reg(list,OP_AND,osuinttype,(aword(1) shl sref.bitlen)-1,valuereg);
+        end;
+      { use subsetreg routine, it may have been overridden with an optimized version }
+      fromsreg.subsetreg:=extra_value_reg;
+      fromsreg.subsetregsize:=OS_INT;
+      { subsetregs always count bits from right to left }
+      fromsreg.startbit:=loadbitsize-restbits;
+      fromsreg.bitlen:=restbits;
+
+      tosreg.subsetreg:=valuereg;
+      tosreg.subsetregsize:=OS_INT;
+      tosreg.startbit:=0;
+      tosreg.bitlen:=restbits;
+
+      a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
+    end;
+
+end.
+

compiler/ppcgen/ngppcadd.pas

@@ -58,7 +58,7 @@ implementation
       cgbase,cpuinfo,pass_1,pass_2,regvars,
       cpupara,cgcpu,cgutils,procinfo,
       ncon,nset,
-      ncgutil,tgobj,rgobj,rgcpu,cgobj;
+      ncgutil,tgobj,rgobj,rgcpu,cgobj,hlcgobj;
 
 
 {*****************************************************************************
@@ -107,15 +107,13 @@ implementation
             LOC_REGISTER,
             LOC_CREGISTER:
               ;
-            LOC_REFERENCE,LOC_CREFERENCE:
-              location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
             LOC_CONSTANT:
               begin
                 if load_constants then
-                  location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,n.location,n.resultdef,n.resultdef,false);
               end;
             else
-              location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,n.location,n.resultdef,n.resultdef,false);
           end;
         end;
 
@@ -207,7 +205,7 @@ implementation
               end;
             secondpass(left);
             if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
-             location_force_reg(current_asmdata.CurrAsmList,left.location,cgsize,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,hlcg.tcgsize2orddef(cgsize),false);
             if isjump then
              begin
                current_procinfo.CurrTrueLabel:=otl;
@@ -226,7 +224,7 @@ implementation
               end;
             secondpass(right);
             if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
-             location_force_reg(current_asmdata.CurrAsmList,right.location,cgsize,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,hlcg.tcgsize2orddef(cgsize),false);
             if isjump then
              begin
                current_procinfo.CurrTrueLabel:=otl;

compiler/ppcgen/ngppccnv.pas

@@ -63,7 +63,7 @@ implementation
       cgbase,cgutils,pass_1,pass_2,
       ncgutil,procinfo,
       cpubase,aasmcpu,
-      rgobj,tgobj,cgobj;
+      rgobj,tgobj,cgobj,hlcgobj;
 
 
     procedure tgenppctypeconvnode.second_int_to_bool;
@@ -96,7 +96,7 @@ implementation
               { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
               if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
                  ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
-                location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
               else
                 location.size:=newsize;
               current_procinfo.CurrTrueLabel:=oldTrueLabel;

compiler/sparc/ncpucnv.pas

@@ -62,7 +62,8 @@ implementation
       ncon,ncal,procinfo,
       ncgutil,
       cpubase,aasmcpu,
-      tgobj,cgobj;
+      tgobj,cgobj,
+      hlcgobj;
 
 
 {*****************************************************************************
@@ -102,7 +103,7 @@ implementation
 
       procedure loadsigned;
         begin
-          location_force_mem(current_asmdata.CurrAsmList,left.location);
+          hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
           { Load memory in fpu register }
           cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F32,OS_F32,left.location.reference,location.register);
           tg.ungetiftemp(current_asmdata.CurrAsmList,left.location.reference);
@@ -137,11 +138,11 @@ implementation
             current_asmdata.getjumplabel(l2);
             reference_reset_symbol(href,l1,0,8);
             hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
-            cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,left.location,hregister);
+            hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,u32inttype,left.location,hregister);
 
             { here we need always an 64 bit register }
             location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
-            location_force_mem(current_asmdata.CurrAsmList,left.location);
+            hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
             { Load memory in fpu register }
             cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F32,OS_F32,left.location.reference,location.register);
             tg.ungetiftemp(current_asmdata.CurrAsmList,left.location.reference);
@@ -235,7 +236,7 @@ implementation
               { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
               if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
                  ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
-                location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
               else
                 location.size:=newsize;
               current_procinfo.CurrTrueLabel:=oldTrueLabel;

compiler/sparc/ncpumat.pas

@@ -48,10 +48,10 @@ implementation
     uses
       globtype,systems,constexp,
       cutils,verbose,globals,
-      symconst,
+      symconst,symdef,
       aasmbase,aasmcpu,aasmtai,aasmdata,
       defutil,
-      cgbase,cgobj,pass_2,procinfo,
+      cgbase,cgobj,hlcgobj,pass_2,procinfo,
       ncon,
       cpubase,
       ncgutil,cgcpu,cgutils;
@@ -80,7 +80,7 @@ implementation
          location_copy(location,left.location);
 
          { put numerator in register }
-         location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+         hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
          location_copy(location,left.location);
          numerator := location.register;
 
@@ -116,8 +116,8 @@ implementation
          else
            begin
              { load divider in a register if necessary }
-             location_force_reg(current_asmdata.CurrAsmList,right.location,
-               def_cgsize(right.resultdef),true);
+             hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,
+               right.resultdef,right.resultdef,true);
              divider := right.location.register;
 
              { needs overflow checking, (-maxlongint-1) div (-1) overflows! }
@@ -199,7 +199,7 @@ implementation
             location_reset(location,LOC_REGISTER,OS_64);
 
             { load left operator in a register }
-            location_force_reg(current_asmdata.CurrAsmList,left.location,OS_64,false);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u64inttype,false);
             hreg64hi:=left.location.register64.reghi;
             hreg64lo:=left.location.register64.reglo;
 
@@ -245,7 +245,7 @@ implementation
         else
           begin
             { load left operators in a register }
-            location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
             location_copy(location,left.location);
             resultreg := location.register;
             hregister1 := location.register;
@@ -269,7 +269,7 @@ implementation
             else
               begin
                 { load shift count in a register if necessary }
-                location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(right.resultdef),true);
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
                 cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,OS_32,right.location.register,hregister1,resultreg);
               end;
           end;
@@ -313,7 +313,7 @@ implementation
               LOC_SUBSETREG, LOC_CSUBSETREG,
               LOC_SUBSETREF, LOC_CSUBSETREF:
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(left.resultdef),true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                   current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(A_SUBcc,left.location.register,0,NR_G0));
                   location_reset(location,LOC_FLAGS,OS_NO);
                   location.resflags:=F_E;

compiler/x86/nx86add.pas

@@ -26,6 +26,7 @@ unit nx86add;
   interface
 
     uses
+      symtype,
       cgbase,
       cpubase,
       node,nadd,ncgadd;
@@ -34,7 +35,7 @@ unit nx86add;
       tx86addnode = class(tcgaddnode)
       protected
         function  getresflags(unsigned : boolean) : tresflags;
-        procedure left_must_be_reg(opsize:TCGSize;noswap:boolean);
+        procedure left_must_be_reg(opdef: tdef; opsize:TCGSize;noswap:boolean);
         procedure check_left_and_right_fpureg(force_fpureg: boolean);
         procedure emit_op_right_left(op:TAsmOp;opsize:TCgSize);
         procedure emit_generic_code(op:TAsmOp;opsize:TCgSize;unsigned,extra_not,mboverflow:boolean);
@@ -64,7 +65,7 @@ unit nx86add;
       cpuinfo,
       aasmbase,aasmtai,aasmdata,aasmcpu,
       symconst,symdef,
-      cgobj,cgx86,cga,cgutils,
+      cgobj,hlcgobj,cgx86,cga,cgutils,
       paramgr,tgobj,ncgutil,
       ncon,nset,ninl,
       defutil;
@@ -111,7 +112,7 @@ unit nx86add;
               if extra_not then
                 cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,opsize,left.location.register,left.location.register);
               r:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
-              cg.a_load_loc_reg(current_asmdata.CurrAsmList,opsize,right.location,r);
+              hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,hlcg.tcgsize2orddef(opsize),right.location,r);
               emit_reg_reg(op,TCGSize2Opsize[opsize],left.location.register,r);
               cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,r,left.location.register);
             end
@@ -154,7 +155,7 @@ unit nx86add;
                    if extra_not then
                      begin
                         r:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
-                        cg.a_load_loc_reg(current_asmdata.CurrAsmList,opsize,right.location,r);
+                        hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,hlcg.tcgsize2orddef(opsize),right.location,r);
                         emit_reg(A_NOT,TCGSize2Opsize[opsize],r);
                         emit_reg_reg(A_AND,TCGSize2Opsize[opsize],r,left.location.register);
                      end
@@ -186,7 +187,7 @@ unit nx86add;
       end;
 
 
-    procedure tx86addnode.left_must_be_reg(opsize:TCGSize;noswap:boolean);
+    procedure tx86addnode.left_must_be_reg(opdef: tdef; opsize:TCGSize;noswap:boolean);
       begin
         { left location is not a register? }
         if (left.location.loc<>LOC_REGISTER) then
@@ -203,15 +204,15 @@ unit nx86add;
               { maybe we can reuse a constant register when the
                 operation is a comparison that doesn't change the
                 value of the register }
-              location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,(nodetype in [ltn,lten,gtn,gten,equaln,unequaln]));
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,(nodetype in [ltn,lten,gtn,gten,equaln,unequaln]));
             end;
           end;
         if (right.location.loc<>LOC_CONSTANT) and
            (tcgsize2unsigned[right.location.size]<>tcgsize2unsigned[opsize]) then
-          location_force_reg(current_asmdata.CurrAsmList,right.location,opsize,true);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,true);
         if (left.location.loc<>LOC_CONSTANT) and
            (tcgsize2unsigned[left.location.size]<>tcgsize2unsigned[opsize]) then
-          location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
        end;
 
 
@@ -250,7 +251,7 @@ unit nx86add;
 {$endif x86_64}
       begin
         if (right.location.loc in [LOC_CSUBSETREG,LOC_SUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
-          location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(right.resultdef),true);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,true);
         { left must be a register }
         case right.location.loc of
           LOC_REGISTER,
@@ -334,6 +335,7 @@ unit nx86add;
     procedure tx86addnode.second_addsmallset;
       var
         setbase : aint;
+        opdef  : tdef;
         opsize : TCGSize;
         op     : TAsmOp;
         extra_not,
@@ -346,7 +348,8 @@ unit nx86add;
         noswap:=false;
         extra_not:=false;
         all_member_optimization:=false;
-        opsize:=int_cgsize(resultdef.size);
+        opdef:=resultdef;
+        opsize:=int_cgsize(opdef.size);
         if (left.resultdef.typ=setdef) then
           setbase:=tsetdef(left.resultdef).setbase
         else
@@ -365,10 +368,13 @@ unit nx86add;
                    internalerror(43244);
                  { btsb isn't supported }
                  if opsize=OS_8 then
-                   opsize:=OS_32;
+                   begin
+                     opsize:=OS_32;
+                     opdef:=u32inttype;
+                   end;
                  { bts requires both elements to be registers }
-                 location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
-                 location_force_reg(current_asmdata.CurrAsmList,right.location,opsize,true);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,true);
                  register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
                  op:=A_BTS;
                  noswap:=true;
@@ -414,14 +420,14 @@ unit nx86add;
                 location_swap(left.location,right.location);
                 toggleflag(nf_swapped);
               end;
-            location_force_reg(current_asmdata.currAsmList,right.location,opsize,false);
+            hlcg.location_force_reg(current_asmdata.currAsmList,right.location,right.resultdef,opdef,false);
             emit_reg(A_NOT,TCGSize2Opsize[opsize],right.location.register);
             location:=right.location;
           end
         else
           begin
             { left must be a register }
-            left_must_be_reg(opsize,noswap);
+            left_must_be_reg(opdef,opsize,noswap);
             emit_generic_code(op,opsize,true,extra_not,false);
             location_freetemp(current_asmdata.CurrAsmList,right.location);
 
@@ -431,17 +437,19 @@ unit nx86add;
 
         { fix the changed opsize we did above because of the missing btsb }
         if opsize<>int_cgsize(resultdef.size) then
-          location_force_reg(current_asmdata.CurrAsmList,location,int_cgsize(resultdef.size),false);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,location,opdef,hlcg.tcgsize2orddef(int_cgsize(resultdef.size)),false);
       end;
 
 
     procedure tx86addnode.second_cmpsmallset;
       var
+        opdef  : tdef;
         opsize : TCGSize;
         op     : TAsmOp;
       begin
         pass_left_right;
-        opsize:=int_cgsize(left.resultdef.size);
+        opdef:=left.resultdef;
+        opsize:=int_cgsize(opdef.size);
         case nodetype of
           equaln,
           unequaln :
@@ -451,7 +459,7 @@ unit nx86add;
               if (not(nf_swapped in flags) and (nodetype = lten)) or
                  ((nf_swapped in flags) and (nodetype = gten)) then
                 swapleftright;
-              location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
               emit_op_right_left(A_AND,opsize);
               op:=A_CMP;
               { warning: ugly hack, we need a JE so change the node to equaln }
@@ -461,7 +469,7 @@ unit nx86add;
             internalerror(2003042215);
         end;
         { left must be a register }
-        left_must_be_reg(opsize,false);
+        left_must_be_reg(opdef,opsize,false);
         emit_generic_code(op,opsize,true,false,false);
         location_freetemp(current_asmdata.CurrAsmList,right.location);
         location_freetemp(current_asmdata.CurrAsmList,left.location);
@@ -761,7 +769,7 @@ unit nx86add;
               copy instruction
             }
             if left.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
-              location_force_mem(current_asmdata.CurrAsmList,left.location);
+              hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
             cg.a_opmm_loc_reg(current_asmdata.CurrAsmList,op,location.size,left.location,location.register,mms_movescalar);
           end
         else
@@ -777,7 +785,7 @@ unit nx86add;
               copy instruction
             }
             if right.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
-              location_force_mem(current_asmdata.CurrAsmList,right.location);
+              hlcg.location_force_mem(current_asmdata.CurrAsmList,right.location,right.resultdef);
             cg.a_opmm_loc_reg(current_asmdata.CurrAsmList,op,location.size,right.location,location.register,mms_movescalar);
           end;
       end;
@@ -805,7 +813,7 @@ unit nx86add;
               copy instruction
             }
             if left.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
-              location_force_mem(current_asmdata.CurrAsmList,left.location);
+              hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
             case left.location.loc of
               LOC_REFERENCE,LOC_CREFERENCE:
                 begin
@@ -831,7 +839,7 @@ unit nx86add;
               copy instruction
             }
             if right.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
-              location_force_mem(current_asmdata.CurrAsmList,right.location);
+              hlcg.location_force_mem(current_asmdata.CurrAsmList,right.location,right.resultdef);
             case right.location.loc of
               LOC_REFERENCE,LOC_CREFERENCE:
                 begin
@@ -1057,16 +1065,18 @@ unit nx86add;
 
     procedure tx86addnode.second_cmpordinal;
       var
+         opdef  : tdef;
          opsize : tcgsize;
          unsigned : boolean;
       begin
          unsigned:=not(is_signed(left.resultdef)) or
                    not(is_signed(right.resultdef));
-         opsize:=def_cgsize(left.resultdef);
+         opdef:=left.resultdef;
+         opsize:=def_cgsize(opdef);
 
          pass_left_right;
 
-         left_must_be_reg(opsize,false);
+         left_must_be_reg(opdef,opsize,false);
          emit_generic_code(A_CMP,opsize,unsigned,false,false);
          location_freetemp(current_asmdata.CurrAsmList,right.location);
          location_freetemp(current_asmdata.CurrAsmList,left.location);

compiler/x86/nx86cnv.pas

@@ -64,7 +64,7 @@ implementation
       cgbase,cga,procinfo,pass_1,pass_2,
       ncon,ncal,ncnv,
       cpubase,
-      cgutils,cgobj,cgx86,ncgutil,
+      cgutils,cgobj,hlcgobj,cgx86,ncgutil,
       tgobj;
 
 
@@ -111,7 +111,7 @@ implementation
               { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
               if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
                  ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
-                location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
+                hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
               else
                 location.size:=newsize;
               current_procinfo.CurrTrueLabel:=oldTrueLabel;
@@ -123,7 +123,7 @@ implementation
          resflags:=F_NE;
 
          if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
-           location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
 
          case left.location.loc of
             LOC_CREFERENCE,
@@ -141,7 +141,7 @@ implementation
                 else
 {$endif not cpu64bitalu}
                  begin
-                   location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
+                   hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
                  end;
               end;
@@ -243,7 +243,7 @@ implementation
          signtested : boolean;
       begin
         if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
-          location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
+          hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
         if use_vectorfpu(resultdef) and
 {$ifdef cpu64bitalu}
            (torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
@@ -301,7 +301,7 @@ implementation
               signtested:=false;
     
             { We need to load from a reference }
-            location_force_mem(current_asmdata.CurrAsmList,left.location);
+            hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
             { don't change left.location.reference, because if it's a temp we
               need the original location at the end so we can free it }
             leftref:=left.location.reference;

compiler/x86/nx86inl.pas

@@ -73,12 +73,12 @@ implementation
       symconst,
       defutil,
       aasmbase,aasmtai,aasmdata,aasmcpu,
-      symdef,
+      symtype,symdef,
       cgbase,pass_2,
       cpuinfo,cpubase,paramgr,
       nbas,ncon,ncal,ncnv,nld,ncgutil,
       tgobj,
-      cga,cgutils,cgx86,cgobj;
+      cga,cgutils,cgx86,cgobj,hlcgobj;
 
 
 {*****************************************************************************
@@ -426,7 +426,7 @@ implementation
           begin
             opsize:=def_cgsize(left.resultdef);
             secondpass(left);
-            location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
             location:=left.location;
             location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
             emit_reg_reg(A_MOV,S_L,left.location.register,location.register);
@@ -439,7 +439,7 @@ implementation
           begin
             opsize:=def_cgsize(left.resultdef);
             secondpass(left);
-            location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
             hregister:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
             location:=left.location;
             location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
@@ -464,13 +464,20 @@ implementation
          bitsperop,l : longint;
          cgop : topcg;
          asmop : tasmop;
+         opdef : tdef;
          opsize,
          orgsize: tcgsize;
         begin
           if is_smallset(tcallparanode(left).resultdef) then
-            opsize:=int_cgsize(tcallparanode(left).resultdef.size)
+            begin
+              opdef:=tcallparanode(left).resultdef;
+              opsize:=int_cgsize(opdef.size)
+            end
           else
-            opsize:=OS_32;
+            begin
+              opdef:=u32inttype;
+              opsize:=OS_32;
+            end;
           bitsperop:=(8*tcgsize2size[opsize]);
           secondpass(tcallparanode(left).left);
           secondpass(tcallparanode(tcallparanode(left).right).left);
@@ -506,6 +513,7 @@ implementation
               orgsize:=opsize;
               if opsize in [OS_8,OS_S8] then
                 begin
+                  opdef:=u32inttype;
                   opsize:=OS_32;
                 end;
               { determine asm operator }
@@ -514,7 +522,7 @@ implementation
               else
                  asmop:=A_BTR;
 
-              location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,opsize,true);
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,opdef,true);
               register_maybe_adjust_setbase(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,setbase);
               hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
               if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then

compiler/x86/nx86mat.pas

@@ -55,7 +55,7 @@ interface
       cgbase,pass_1,pass_2,
       ncon,
       cpubase,procinfo,
-      cga,ncgutil,cgobj,cgx86,cgutils;
+      cga,ncgutil,cgobj,hlcgobj,cgx86,cgutils;
 
 
 {*****************************************************************************
@@ -257,7 +257,7 @@ interface
              LOC_SUBSETREF,
              LOC_CSUBSETREF :
                begin
-                 location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+                 hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
                  emit_reg_reg(A_TEST,TCGSize2Opsize[opsize],left.location.register,left.location.register);
                  location_reset(location,LOC_FLAGS,OS_NO);
                  location.resflags:=F_E;

compiler/x86/nx86set.pas

@@ -51,7 +51,7 @@ implementation
       cgbase,pass_2,tgobj,
       ncon,
       cpubase,
-      cga,cgobj,cgutils,ncgutil,
+      cga,cgobj,hlcgobj,cgutils,ncgutil,
       cgx86,
       procinfo;
 
@@ -256,6 +256,7 @@ implementation
          hreg,hreg2,
          pleftreg   : tregister;
          opsize     : tcgsize;
+         opdef      : torddef;
          orgopsize  : tcgsize;
          setparts   : array[1..8] of Tsetpart;
          setbase    : aint;
@@ -366,11 +367,12 @@ implementation
          opsize := OS_32;
          if is_signed(left.resultdef) then
            opsize := tcgsize(ord(opsize)+(ord(OS_S8)-ord(OS_8)));
+         opdef:=hlcg.tcgsize2orddef(opsize);
 
          if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE,LOC_CONSTANT]) then
-           location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
          if (right.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG]) then
-           location_force_reg(current_asmdata.CurrAsmList,right.location,opsize,true);
+           hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,left.resultdef,opdef,true);
 
          if genjumps then
           begin
@@ -379,7 +381,7 @@ implementation
               To do: Build in support for LOC_JUMP }
 
             { load and zero or sign extend as necessary }
-            location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
             pleftreg:=left.location.register;
 
             { Get a label to jump to the end }
@@ -408,7 +410,7 @@ implementation
                     { yes, is the lower bound <> 0? }
                     if (setparts[i].start <> 0) then
                       begin
-                        location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+                        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
                         hreg:=left.location.register;
                         pleftreg:=hreg;
                         cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opsize,setparts[i].start-adjustment,pleftreg);
@@ -484,11 +486,11 @@ implementation
                 end
                else
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,OS_32,true);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
                   register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
                   if (tcgsize2size[right.location.size] < 4) or
                      (right.location.loc = LOC_CONSTANT) then
-                    location_force_reg(current_asmdata.CurrAsmList,right.location,OS_32,true);
+                    hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,true);
                   hreg:=left.location.register;
 
                   case right.location.loc of
@@ -520,7 +522,7 @@ implementation
                   if (left.location.loc=LOC_CONSTANT) or
                      (setbase<>0) then
                     begin
-                      location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+                      hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
                       register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
                     end;
 
@@ -585,10 +587,10 @@ implementation
                 end
                else
                 begin
-                  location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
                   register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
                   if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
-                    location_force_reg(current_asmdata.CurrAsmList,right.location,opsize,true);
+                    hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,true);
                   pleftreg:=left.location.register;
 
                   if (opsize >= OS_S8) or { = if signed }

compiler/x86_64/nx64add.pas

@@ -39,8 +39,8 @@ interface
     uses
       globtype,globals,
       aasmbase,aasmtai,aasmdata,
-      defutil,
-      cgbase,cgutils,cga,cgobj,
+      symdef,defutil,
+      cgbase,cgutils,cga,cgobj,hlcgobj,
       tgobj;
 
 {*****************************************************************************
@@ -91,12 +91,12 @@ interface
         begin
           {LOC_CONSTANT for example.}
           reg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-          cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,left.location,reg);
+          hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,osuinttype,left.location,reg);
         end;
       { Allocate RAX. }
       cg.getcpuregister(current_asmdata.CurrAsmList,NR_RAX);
       { Load the right value. }
-      cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,right.location,NR_RAX);
+      hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,NR_RAX);
       { Also allocate RDX, since it is also modified by a mul (JM). }
       cg.getcpuregister(current_asmdata.CurrAsmList,NR_RDX);
       if use_ref then

compiler/x86_64/nx64cnv.pas

@@ -65,7 +65,7 @@ implementation
       cgbase,cga,procinfo,pass_2,
       ncon,ncal,ncnv,
       cpubase,
-      cgutils,cgobj,cgx86,ncgutil,
+      cgutils,cgobj,hlcgobj,cgx86,ncgutil,
       tgobj;
 
 
@@ -115,7 +115,7 @@ implementation
 
                    { Get sign bit }
                    if not(left.location.loc in [LOC_REGISTER,LOC_REFERENCE]) then
-                     location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
+                     hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
                    case left.location.loc of
                      LOC_REGISTER :
                        begin

compiler/x86_64/nx64mat.pas

@@ -52,7 +52,7 @@ implementation
       pass_1,pass_2,
       ncon,
       cpubase,cpuinfo,
-      cgbase,cgutils,cga,cgobj,cgx86,
+      cgbase,cgutils,cga,cgobj,hlcgobj,cgx86,
       ncgutil;
 
 {*****************************************************************************
@@ -74,7 +74,7 @@ implementation
 
         { put numerator in register }
         location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
-        location_force_reg(current_asmdata.CurrAsmList,left.location,location.size,false);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
         hreg1:=left.location.register;
 
         if (nodetype=divn) and (right.nodetype=ordconstn) and
@@ -130,7 +130,7 @@ implementation
             else
               begin
                 hreg1:=cg.getintregister(current_asmdata.CurrAsmList,right.location.size);
-                cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_64,right.location,hreg1);
+                hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u64inttype,right.location,hreg1);
                 emit_reg(op,S_Q,hreg1);
               end;
 
@@ -187,7 +187,7 @@ implementation
 
         { load left operators in a register }
         location_copy(location,left.location);
-        location_force_reg(current_asmdata.CurrAsmList,location,opsize,false);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,hlcg.tcgsize2orddef(opsize),false);
 
         { shifting by a constant directly coded: }
         if (right.nodetype=ordconstn) then
@@ -196,7 +196,7 @@ implementation
           begin
             { load right operators in a RCX }
             cg.getcpuregister(current_asmdata.CurrAsmList,NR_RCX);
-            cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,right.location,NR_RCX);
+            hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,NR_RCX);
 
             { right operand is in ECX }
             cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_RCX);