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@@ -262,7 +262,6 @@ Implementation
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if SuperRegistersEqual(reg,NR_DEFAULTFLAGS) and (reg<>NR_AF) then
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begin
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case p.opcode of
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- { todo: 16-bit ADD,ADC,SBC,INC,DEC }
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{ todo: IN,INI,INIR,IND,INDR,OUT,OUTI,OTIR,OUTD,OTDR}
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A_PUSH,A_POP,A_EX,A_EXX,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_SET,A_RES,A_JP,A_JR,A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST:
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result:=false;
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@@ -285,13 +284,42 @@ Implementation
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG);
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- A_CPI,A_CPIR,A_CPD,A_CPDR,A_INC,A_DEC,A_RLD,A_RRD,A_BIT:
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+ A_INC,A_DEC:
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+ begin
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+ if p.ops<>1 then
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+ internalerror(2020051602);
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+ if (p.oper[0]^.typ=top_reg) and ((p.oper[0]^.reg=NR_BC) or
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+ (p.oper[0]^.reg=NR_DE) or
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+ (p.oper[0]^.reg=NR_HL) or
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+ (p.oper[0]^.reg=NR_SP) or
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+ (p.oper[0]^.reg=NR_IX) or
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+ (p.oper[0]^.reg=NR_IY)) then
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+ result:=false
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+ else
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+ result:=(reg=NR_ADDSUBTRACTFLAG) or
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+ (reg=NR_PARITYOVERFLOWFLAG) or
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+ (reg=NR_HALFCARRYFLAG) or
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+ (reg=NR_ZEROFLAG) or
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+ (reg=NR_SIGNFLAG);
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+ end;
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+ A_CPI,A_CPIR,A_CPD,A_CPDR,A_RLD,A_RRD,A_BIT:
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ZEROFLAG) or
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(reg=NR_SIGNFLAG);
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- A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_XOR,A_CP,A_NEG,A_RLC,A_RL,A_RRC,A_RR,A_SLA,A_SRA,A_SRL:
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+ A_ADD:
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+ begin
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+ if p.ops<>2 then
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+ internalerror(2020051601);
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+ if (p.oper[0]^.typ=top_reg) and ((p.oper[0]^.reg=NR_HL) or (p.oper[0]^.reg=NR_IX) or (p.oper[0]^.reg=NR_IY)) then
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+ result:=(reg=NR_HALFCARRYFLAG) or
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+ (reg=NR_ADDSUBTRACTFLAG) or
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+ (reg=NR_CARRYFLAG)
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+ else
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+ result:=true;
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+ end;
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+ A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_XOR,A_CP,A_NEG,A_RLC,A_RL,A_RRC,A_RR,A_SLA,A_SRA,A_SRL:
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result:=true;
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A_DAA:
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result:=(reg=NR_PARITYOVERFLOWFLAG) or
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