Merged revisions 10705,10707,10717 via svnmerge from

svn+ssh://[email protected]/FPC/svn/fpc/trunk

........
r10705 | jonas | 2008-04-18 22:04:55 +0200 (Fri, 18 Apr 2008) | 6 lines

  * fixed a_load_ref_reg for OS_S8->OS_16 for ppc32, ppc64 and sparc
    (and on ppc64 also for OS_S8->OS_32 and OS_S16->OS_32)
  * adapted tcnvint6 to check for ppc64 OS_S16->OS_32 conversion
    (the old comparison was performed using a 32 bit compare and
     therefore did not notice the wrong result)

........
r10707 | jonas | 2008-04-18 23:07:20 +0200 (Fri, 18 Apr 2008) | 2 lines

  + OS_S16->OS_32 test for ppc64

........
r10717 | jonas | 2008-04-19 19:19:30 +0200 (Sat, 19 Apr 2008) | 2 lines

  + test for mantis #10863

........

git-svn-id: branches/fixes_2_2@10718 -

.gitattributes

@@ -7921,6 +7921,7 @@ tests/webtbs/tw10800.pp svneol=native#text/plain
 tests/webtbs/tw1081.pp svneol=native#text/plain
 tests/webtbs/tw10815.pp svneol=native#text/plain
 tests/webtbs/tw10825.pp svneol=native#text/plain
+tests/webtbs/tw10863.pp svneol=native#text/plain
 tests/webtbs/tw10890.pp svneol=native#text/plain
 tests/webtbs/tw10897.pp svneol=native#text/plain
 tests/webtbs/tw1090.pp svneol=native#text/plain

compiler/powerpc/cgcpu.pas

@@ -354,8 +354,12 @@ const
           a_load_store(list,op,reg,ref2);
           { sign extend shortint if necessary, since there is no }
           { load instruction that does that automatically (JM)   }
-          if fromsize = OS_S8 then
-            list.concat(taicpu.op_reg_reg(A_EXTSB,reg,reg));
+          if (fromsize = OS_S8) then
+            begin
+              list.concat(taicpu.op_reg_reg(A_EXTSB,reg,reg));
+              if (tosize = OS_16) then
+                a_load_reg_reg(list,fromsize,tosize,reg,reg);
+            end;
        end;
 
 

compiler/powerpc64/cgcpu.pas

@@ -760,8 +760,15 @@ begin
   a_load_store(list, op, reg, ref2);
   { sign extend shortint if necessary, since there is no
    load instruction that does that automatically (JM) }
-  if fromsize = OS_S8 then
-    list.concat(taicpu.op_reg_reg(A_EXTSB, reg, reg));
+  if (fromsize = OS_S8) then
+    begin
+      list.concat(taicpu.op_reg_reg(A_EXTSB, reg, reg));
+      if (tosize in [OS_16,OS_32]) then
+        a_load_reg_reg(list,fromsize,tosize,reg,reg);
+    end
+  else if (fromsize = OS_S16) and
+          (tosize = OS_32) then
+    a_load_reg_reg(list,fromsize,tosize,reg,reg);
 end;
 
 procedure tcgppc.a_load_reg_reg(list: TAsmList; fromsize, tosize: tcgsize;

compiler/sparc/cgcpu.pas

@@ -540,6 +540,9 @@ implementation
                  InternalError(2002122101);
              end;
              handle_load_store(list,false,op,reg,ref);
+             if (fromsize=OS_S8) and
+                (tosize=OS_16) then
+               a_load_reg_reg(list,fromsize,tosize,reg,reg);
            end;
       end;
 

tests/test/cg/tcnvint6.pp

@@ -11,6 +11,7 @@ var
   c: cardinal;
   shi: shortint;
   si: smallint;
+  i64: int64;
 begin
   b:=$ff;
   Inc(b,$ff);
@@ -68,20 +69,26 @@ begin
     error(31);
   if cardinal(shi)<>$ffffffff then
     error(32);
+  i64:=cardinal(shi);
+  if i64<>$ffffffff then
+    error(33);
 {$ifdef FPC}
   if qword(shi)<>$ffffffffffffffff then
-    error(33);
+    error(34);
 {$endif FPC}
 
   si:=-1;
   if word(si)<>$ffff then
-    error(34);
-  if cardinal(si)<>$ffffffff then
     error(35);
+  if cardinal(si)<>$ffffffff then
+    error(36);
+  i64:=cardinal(si);
+  if i64<>$ffffffff then
+    halt(37);
 {$ifdef FPC}
   if qword(si)<>$ffffffffffffffff then
-    error(36);
+    error(38);
 {$endif FPC}
 
   writeln('Test OK.');
-end.
+end.

tests/webtbs/tw10863.pp

@@ -0,0 +1,22 @@
+function f(b,c,d : boolean) : longint;
+ begin
+   f:=ord(b);
+ end;
+
+procedure test;
+var
+ b,c : boolean;
+
+begin
+ b:=true;
+ c:=false;
+ b:=1<>f(b,not(b),c);
+ c:=true;
+ if (b) then
+   halt(1);
+ writeln(c);
+end;
+
+begin
+  test;
+end.