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@@ -100,10 +100,6 @@ interface
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{$endif}
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type
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- TFPUException = (exInvalidOp, exDenormalized, exZeroDivide,
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- exOverflow, exUnderflow, exPrecision);
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- TFPUExceptionMask = set of TFPUException;
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-
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pfileposinfo = ^tfileposinfo;
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tfileposinfo = record
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line : longint;
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@@ -328,7 +324,6 @@ interface
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function GetEnvPChar(const envname:string):pchar;
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procedure FreeEnvPChar(p:pchar);
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- procedure SetFPUExceptionMask(const Mask: TFPUExceptionMask);
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function is_number_float(d : double) : boolean;
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{ discern +0.0 and -0.0 }
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function get_real_sign(r: bestreal): longint;
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@@ -693,251 +688,6 @@ implementation
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{$endif hasunix}
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{$UNDEF AMIGASHELL}
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-
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-{$ifdef CPUI386}
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- {$asmmode att}
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-
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- {$define HASSETFPUEXCEPTIONMASK}
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- { later, this should be replaced by the math unit }
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- const
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- Default8087CW : word = $1332;
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-
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- procedure Set8087CW(cw:word);assembler;
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- asm
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- movw cw,%ax
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- movw %ax,default8087cw
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- fnclex
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- fldcw default8087cw
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- end;
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-
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-
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- function Get8087CW:word;assembler;
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- asm
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- pushl $0
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- fnstcw (%esp)
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- popl %eax
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- end;
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-
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-
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- procedure SetFPUExceptionMask(const Mask: TFPUExceptionMask);
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- var
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- CtlWord: Word;
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- begin
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- CtlWord:=Get8087CW;
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- Set8087CW( (CtlWord and $FFC0) or Byte(Longint(Mask)) );
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- end;
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-{$endif CPUI386}
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-
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-{$ifdef CPUX86_64}
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- {$define HASSETFPUEXCEPTIONMASK}
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- { later, this should be replaced by the math unit }
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- const
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- Default8087CW : word = $1332;
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-
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- procedure Set8087CW(cw:word);assembler;
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- asm
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- movw cw,%ax
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- movw %ax,default8087cw
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- fnclex
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- fldcw default8087cw
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- end;
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-
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-
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- function Get8087CW:word;assembler;
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- asm
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- pushq $0
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- fnstcw (%rsp)
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- popq %rax
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- end;
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-
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-
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- procedure SetSSECSR(w : dword);
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- var
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- _w : dword;
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- begin
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- _w:=w;
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- asm
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- ldmxcsr _w
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- end;
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- end;
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-
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-
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- function GetSSECSR : dword;
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- var
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- _w : dword;
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- begin
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- asm
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- stmxcsr _w
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- end;
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- result:=_w;
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- end;
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-
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-
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- procedure SetFPUExceptionMask(const Mask: TFPUExceptionMask);
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- var
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- CtlWord: Word;
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- newmask : dword;
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- const
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- MM_MaskInvalidOp = %0000000010000000;
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- MM_MaskDenorm = %0000000100000000;
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- MM_MaskDivZero = %0000001000000000;
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- MM_MaskOverflow = %0000010000000000;
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- MM_MaskUnderflow = %0000100000000000;
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- MM_MaskPrecision = %0001000000000000;
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- begin
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- { classic FPU }
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- CtlWord:=Get8087CW;
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- Set8087CW( (CtlWord and $FFC0) or Byte(Longint(Mask)) );
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-
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- { SSE }
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-
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- newmask:=GetSSECSR;
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-
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- { invalid operation }
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- if (exInvalidOp in mask) then
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- newmask:=newmask or MM_MaskInvalidOp
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- else
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- newmask:=newmask and not(MM_MaskInvalidOp);
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-
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- { denormals }
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- if (exDenormalized in mask) then
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- newmask:=newmask or MM_MaskDenorm
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- else
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- newmask:=newmask and not(MM_MaskDenorm);
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-
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- { zero divide }
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- if (exZeroDivide in mask) then
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- newmask:=newmask or MM_MaskDivZero
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- else
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- newmask:=newmask and not(MM_MaskDivZero);
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-
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- { overflow }
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- if (exOverflow in mask) then
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- newmask:=newmask or MM_MaskOverflow
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- else
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- newmask:=newmask and not(MM_MaskOverflow);
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-
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- { underflow }
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- if (exUnderflow in mask) then
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- newmask:=newmask or MM_MaskUnderflow
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- else
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- newmask:=newmask and not(MM_MaskUnderflow);
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-
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- { Precision (inexact result) }
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- if (exPrecision in mask) then
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- newmask:=newmask or MM_MaskPrecision
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- else
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- newmask:=newmask and not(MM_MaskPrecision);
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- SetSSECSR(newmask);
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- end;
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-{$endif CPUX86_64}
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-
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-{$ifdef CPUPOWERPC}
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- {$define HASSETFPUEXCEPTIONMASK}
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- procedure SetFPUExceptionMask(const Mask: TFPUExceptionMask);
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- var
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- newmask: record
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- case byte of
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- 1: (d: double);
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- 2: (a,b: cardinal);
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- end;
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- begin
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- { load current control register contents }
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- asm
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- mffs f0
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- stfd f0,newmask.d
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- end;
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- { invalid operation: bit 24 (big endian, bit 0 = left-most bit) }
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- if (exInvalidOp in mask) then
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- newmask.b := newmask.b and not(1 shl (31-24))
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- else
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- newmask.b := newmask.b or (1 shl (31-24));
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-
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- { denormals can not cause exceptions on the PPC }
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-
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- { zero divide: bit 27 }
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- if (exZeroDivide in mask) then
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- newmask.b := newmask.b and not(1 shl (31-27))
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- else
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- newmask.b := newmask.b or (1 shl (31-27));
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-
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- { overflow: bit 25 }
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- if (exOverflow in mask) then
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- newmask.b := newmask.b and not(1 shl (31-25))
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- else
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- newmask.b := newmask.b or (1 shl (31-25));
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-
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- { underflow: bit 26 }
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- if (exUnderflow in mask) then
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- newmask.b := newmask.b and not(1 shl (31-26))
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- else
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- newmask.b := newmask.b or (1 shl (31-26));
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-
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- { Precision (inexact result): bit 28 }
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- if (exPrecision in mask) then
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- newmask.b := newmask.b and not(1 shl (31-28))
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- else
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- newmask.b := newmask.b or (1 shl (31-28));
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- { update control register contents }
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- asm
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- lfd f0, newmask.d
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- mtfsf 255,f0
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- end;
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- end;
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-{$endif CPUPOWERPC}
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-
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-{$ifdef CPUSPARC}
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- {$define HASSETFPUEXCEPTIONMASK}
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- procedure SetFPUExceptionMask(const Mask: TFPUExceptionMask);
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- var
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- fsr : cardinal;
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- begin
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- { load current control register contents }
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- asm
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- st %fsr,fsr
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- end;
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- { invalid operation: bit 27 }
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- if (exInvalidOp in mask) then
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- fsr:=fsr and not(1 shl 27)
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- else
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- fsr:=fsr or (1 shl 27);
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-
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- { zero divide: bit 24 }
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- if (exZeroDivide in mask) then
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- fsr:=fsr and not(1 shl 24)
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- else
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- fsr:=fsr or (1 shl 24);
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-
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- { overflow: bit 26 }
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- if (exOverflow in mask) then
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- fsr:=fsr and not(1 shl 26)
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- else
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- fsr:=fsr or (1 shl 26);
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-
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- { underflow: bit 25 }
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- if (exUnderflow in mask) then
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- fsr:=fsr and not(1 shl 25)
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- else
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- fsr:=fsr or (1 shl 25);
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-
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- { Precision (inexact result): bit 23 }
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- if (exPrecision in mask) then
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- fsr:=fsr and not(1 shl 23)
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- else
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- fsr:=fsr or (1 shl 23);
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- { update control register contents }
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- asm
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- ld fsr,%fsr
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- end;
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- end;
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-{$endif CPUSPARC}
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-
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-{$ifndef HASSETFPUEXCEPTIONMASK}
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- procedure SetFPUExceptionMask(const Mask: TFPUExceptionMask);
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- begin
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- end;
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-{$endif HASSETFPUEXCEPTIONMASK}
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-
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function is_number_float(d : double) : boolean;
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var
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bytearray : array[0..7] of byte;
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