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@@ -135,6 +135,8 @@ Implementation
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(hp1.typ = ait_instruction) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_LDR) and
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(taicpu(hp1).opcode = A_LDR) and
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RefsEqual(taicpu(p).oper[1]^.ref^,taicpu(hp1).oper[1]^.ref^) and
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RefsEqual(taicpu(p).oper[1]^.ref^,taicpu(hp1).oper[1]^.ref^) and
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+ ((taicpu(p).condition = taicpu(hp1).condition) or
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+ (taicpu(p).condition = C_None)) and
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(taicpu(hp1).oper[1]^.ref^.addressmode=AM_OFFSET) then
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(taicpu(hp1).oper[1]^.ref^.addressmode=AM_OFFSET) then
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begin
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begin
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if taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg then
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if taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg then
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@@ -150,7 +152,7 @@ Implementation
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end;
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end;
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result := true;
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result := true;
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end;
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end;
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- end;
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+ end;
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A_LDR:
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A_LDR:
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begin
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begin
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{ change
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{ change
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@@ -165,6 +167,8 @@ Implementation
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(hp1.typ = ait_instruction) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_LDR) and
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(taicpu(hp1).opcode = A_LDR) and
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RefsEqual(taicpu(p).oper[1]^.ref^,taicpu(hp1).oper[1]^.ref^) and
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RefsEqual(taicpu(p).oper[1]^.ref^,taicpu(hp1).oper[1]^.ref^) and
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+ ((taicpu(p).condition = taicpu(hp1).condition) or
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+ (taicpu(p).condition = C_None)) and
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(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.index) and
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(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.index) and
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(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.base) and
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(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.base) and
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(taicpu(hp1).oper[1]^.ref^.addressmode=AM_OFFSET) then
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(taicpu(hp1).oper[1]^.ref^.addressmode=AM_OFFSET) then
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@@ -181,8 +185,8 @@ Implementation
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taicpu(hp1).loadreg(1,taicpu(p).oper[0]^.reg);
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taicpu(hp1).loadreg(1,taicpu(p).oper[0]^.reg);
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end;
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end;
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result := true;
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result := true;
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- end;
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- end;
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+ end;
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+ end;
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A_MOV:
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A_MOV:
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begin
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begin
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{ fold
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{ fold
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