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* temporary workaround for writing INS/UMOV operands, as these require
vector subregisters that we cannot represent yet. We only have to
load/store lower single/double precision contents via them though,
so reuse SUBMMS/SUBMMD for now.

git-svn-id: trunk@29955 -

Jonas Maebe 10 years ago
parent
commit
ff73d97e7f
1 changed files with 17 additions and 1 deletions
  1. 17 1
      compiler/aarch64/agcpugas.pas

+ 17 - 1
compiler/aarch64/agcpugas.pas

@@ -188,7 +188,23 @@ unit agcpugas;
       begin
       begin
         case o.typ of
         case o.typ of
           top_reg:
           top_reg:
-            getopstr:=gas_regname(o.reg);
+            { we cannot yet represent "umov w0, v4.s[0]" or "ins v4.d[0], x1",
+              so for now we use "s4" or "d4" instead -> translate here }
+            if ((hp.opcode=A_INS) or
+                (hp.opcode=A_UMOV)) and
+               (getregtype(hp.oper[opnr]^.reg)=R_MMREGISTER) then
+              begin
+                case getsubreg(hp.oper[opnr]^.reg) of
+                  R_SUBMMS:
+                    getopstr:='v'+tostr(getsupreg(hp.oper[opnr]^.reg))+'.S[0]';
+                  R_SUBMMD:
+                    getopstr:='v'+tostr(getsupreg(hp.oper[opnr]^.reg))+'.D[0]';
+                  else
+                    internalerror(2014122907);
+                end;
+              end
+            else
+              getopstr:=gas_regname(o.reg);
           top_shifterop:
           top_shifterop:
             begin
             begin
               getopstr:=gas_shiftmode2str[o.shifterop^.shiftmode];
               getopstr:=gas_shiftmode2str[o.shifterop^.shiftmode];