 florian
|
4664e510e6
* RiscV: handle more instructions in taicpu.spilling_get_operation_type
|
5 months ago |
|
florian
|
9432af9ec6
* RiscV: play safe in taicpu.spilling_get_operation_type
|
5 months ago |
|
florian
|
5a07867d20
* RiscV: fixing spilling_get_operation_tpye for LI
|
5 months ago |
|
florian
|
1202b2612f
+ RiscV: make use of the fl* rd,symbol,rd pseudoinstruction
|
6 months ago |
|
florian
|
64ba751ef1
* make use of LA pseudo-instruction
|
7 months ago |
|
florian
|
e047e7db91
+ RiscV: initial support of pic generation
|
4 years ago |
 Jonas Maebe
|
281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
|
6 years ago |
|
Jonas Maebe
|
1a9eb77698
* fixed compilation with -O3 (one false positive, one real error)
|
6 years ago |
 Jeppe Johansen
|
29ea4ed07d
Add rounding mode operands.
|
7 years ago |
|
Jeppe Johansen
|
f781c8942e
Write real atomic operations, and add memory barrier operations.
|
7 years ago |
|
Jeppe Johansen
|
6d9a0fdc73
Added implementation of InstructionLoadsFromReg.
|
7 years ago |
|
Jeppe Johansen
|
a906feb05e
Fixed bug in peephole optimizer.
|
7 years ago |
|
Jeppe Johansen
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
7 years ago |
