 pierre
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5fa93e2a1e
------------------------------------------------------------------------
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6 anni fa |
 yury
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0654857ce1
Merged aarch64-android, x86_64-android targets and fixes for the Android target.
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6 anni fa |
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pierre
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c654739db9
Change default settings for i8086 compiler when compiled for go32v2 OS, to avoid use of Watcom tools
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7 anni fa |
 nickysn
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61e6d2afec
+ introduce asd_omf_linnum_line directives; they will be used for writing LINNUM
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7 anni fa |
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pierre
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2a49627d48
Allow compilation of ppc386 compiler using FPC_SOFT_FPUX80, i.e. soft float 80-bit extended float
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8 anni fa |
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nickysn
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627f45abac
+ define cpucg64shiftsupport for i8086, which enables the 64-bit inline sar
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8 anni fa |
 florian
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7f286eb54e
+ define cpudelayslot: set during compiler compilation for CPUs having branch instructions with delay slot (MIPS, SPARC)
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8 anni fa |
 Károly Balogh
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0b561b6c8f
powerpc: enable SUPPORT_GET_FRAME
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8 anni fa |
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Károly Balogh
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30176f3116
m68k: enable inlined get_frame for m68k
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8 anni fa |
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Károly Balogh
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cf8aebf00f
m68k: enabled safecall exception wrappers with linux
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8 anni fa |
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nickysn
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408b7a8807
+ enable the code page aware compiler messages for all unices
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8 anni fa |
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nickysn
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a34f531661
+ implemented support for codepage aware compiler messages. It can be enabled
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8 anni fa |
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florian
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8b19610509
+ sparc32 for normal sparc to be used in the compiler
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8 anni fa |
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florian
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188ec0f0c7
+ basics for sparc64 support, we continue to use the name "sparc" for sparc32, both sparc are identified by sparcgen (dirs, defines etc.)
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8 anni fa |
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Károly Balogh
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b3157aa5ea
m68k: generate MUL helpers for CPUs without 32bit MUL already in pass 1
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8 anni fa |
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Károly Balogh
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3e8ee48458
m68k: define cpurox and enabled the rotate-related optimizations on CPUs which support rotate instructionsoptions.pas
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8 anni fa |
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nickysn
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d7c8a081a1
+ enable using the cg64 ops OP_SHR/OP_SHL/OP_SAR on i386 for implementing the
|
8 anni fa |
|
nickysn
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321876252b
+ enabled the rol/ror intrinsic on i8086
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8 anni fa |
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Károly Balogh
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4ee4099fca
m68k: introduce a register calling convention, inspired by VBCC. volatile registers are used to pass arguments
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8 anni fa |
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florian
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046b148f5f
* i386 and i8086 have an index register, so define cpurefshaveindexreg
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9 anni fa |
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pierre
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885b0034c5
Allow use of stabs for 64-bit systems with -dUSE_STABS_64
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9 anni fa |
 Jonas Maebe
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1c2bac7608
- removed FPC_HAS_VARSETS-related checks, FPC 2.6.4 has it
|
10 anni fa |
|
Jonas Maebe
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3f9f498e0d
- removed leftover alpha, ia64 and vis code
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10 anni fa |
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florian
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ba1297b1ab
+ provide also 8 and 16 bit div/mod helper
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10 anni fa |
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Jonas Maebe
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3ab62fc36e
* define TSymStr as ansistring for llvm, as its type definitions can be quite long
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10 anni fa |
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Jonas Maebe
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 anni fa |
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Jonas Maebe
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41fba0c4f7
* switched to using the stack pointer as base register for the temp allocator
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10 anni fa |
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Jonas Maebe
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7949bebb8d
* synchronised with r28168 of trunk
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11 anni fa |
 sergei
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0262514939
* m68k: Transform 32-bit div/mod nodes into helper calls during pass 1. This is consistent with the way other targets do it, and results in pretty much nicer code.
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11 anni fa |
|
Jonas Maebe
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bacd303208
* synchronized with trunk up to r27758
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11 anni fa |
