 J. Gareth "Curious Kit" Moreton
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88ab9576b1
* a64: Added "ABS" and "CTZ" mnemonics (CSSC instructions)
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hai 1 ano |
 florian
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fb7cdbefb3
+ some opcodes added
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%!s(int64=3) %!d(string=hai) anos |
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florian
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d53b17cadc
+ Aarch64: completed LSE support for all interlocked operations
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%!s(int64=4) %!d(string=hai) anos |
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florian
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f3d8efc8ec
* Aarch64: support LSE instructions
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%!s(int64=4) %!d(string=hai) anos |
 Jonas Maebe
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9376f5a43a
* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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%!s(int64=4) %!d(string=hai) anos |
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florian
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3dff78621c
* Aarch64: UTX/STX instructions include now the postfix, so it is the same as for ARM
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%!s(int64=5) %!d(string=hai) anos |
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florian
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69786ffe73
somehow committing went wrong, second part of last commit:
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%!s(int64=6) %!d(string=hai) anos |
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Jonas Maebe
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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c0548cadb0
* added some missing instructions and aliases, reordered them according
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%!s(int64=10) %!d(string=hai) anos |
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florian
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76c179fae8
* aarch64 compilation fixes
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%!s(int64=11) %!d(string=hai) anos |
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florian
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085fbbf016
+ first batch of FPU/VFP instructions
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%!s(int64=13) %!d(string=hai) anos |
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florian
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0197b84b7f
+ instruction table generator for arm64
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%!s(int64=13) %!d(string=hai) anos |
