 Jonas Maebe
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61e4a1b811
+ added tasmlist parameter to getintparaloc() (needed for llvm)
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10 years ago |
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Jonas Maebe
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201121d7c9
* synchronised with trunk till r30345
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10 years ago |
 Károly Balogh
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b617345e43
m68k: disabled premature MOVEA #0,Ax to SUBA Ax,Ax in the CG, because it breaks with spilling temp replacement and moved it to the optimizer, where it belongs. this fixes some code with potentially heavy address register pressure, like the IDE.
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10 years ago |
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Jonas Maebe
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bd203a5b57
* synchronised with trunk till r30240
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10 years ago |
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Károly Balogh
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2555f12394
m68k: improved handling of moves and sign/zero extensions targeting address regs
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10 years ago |
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Károly Balogh
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935820293c
m68k: in tm68ktypeconvnode.int_to_real, fix the reference before using it, and if the source is a register, make sure it's a data register
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10 years ago |
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Károly Balogh
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1121c2e6ce
m68k: before doing a reg->ref operation, make sure the source is a datareg
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10 years ago |
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Jonas Maebe
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 years ago |
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Károly Balogh
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106056f462
m68k: more FMOVEM.X store/load size fixes
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10 years ago |
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Károly Balogh
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acaf382ea0
m68k: FMOVEM.X stores/loads each reg as 12 bytes (96 bits) not 10 bytes (80 bits), see 68k PRM, page 5-86
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10 years ago |
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Károly Balogh
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a526b0e5d6
m68k: implemented some missing bits of FPU cgpara handling, functions with float arguments seem to work much better now
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10 years ago |
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Károly Balogh
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06dfa4d30c
m68k: also alloc FPU registers during RTL helper calls
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10 years ago |
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Károly Balogh
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a99c9c29b6
m68k: basic 68881 FPU register save/restore support. probably still needs some work here and there.
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10 years ago |
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Károly Balogh
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7a91d5f495
m68k: oops, unbroke the build with softfpu
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10 years ago |
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Károly Balogh
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d000b1bc7c
m68k: basic 68881 fpu support. probably still broken at umpzillion places, and mostly untested, but at least it builds the RTL and all packages successfully with -Cp68020 -Cf68881 instead of dying with random internalerrors() and now even emits actual FPU opcodes.
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10 years ago |
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Károly Balogh
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3b205742b6
m68k: also try to optimize a special case of OP_SAR using the SWAP instruction
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11 years ago |
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Károly Balogh
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d561e8ab57
m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction
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11 years ago |
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Károly Balogh
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9991ee4165
m68k: support loading of refs to data registers, also when explicit paraloc is set and it's a register, use that directly, this fixes several syscall-related corner cases on Amiga
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11 years ago |
 sergei
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a5958d6e5f
* m68k: do not emit moves between same register, they end up in wrong code in some cases when register needs to be spilled (and entirely useless otherwise).
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11 years ago |
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Károly Balogh
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392da9e43f
* fix warnings when compiling the compiler with DFA optimizer enabled on m68k
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11 years ago |
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Jonas Maebe
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b18ba8e85b
* syncrhonised with trunk up till r28471
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11 years ago |
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Jonas Maebe
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b745dcc64c
* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
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11 years ago |
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Károly Balogh
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9b0bf91076
m68k: do not generate CLR instructions to memory references on plain 68k. there this instruction also causes reads from the address, which is slow and can have side effects.
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11 years ago |
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sergei
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a28d6a84a7
+ m68k, a_load_const_reg: use MOV3Q if applicable for data registers as well, since it allows spilling replacement of destination.
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11 years ago |
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sergei
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a42ecadddf
+ m68k: implemented overflow checking (does not work for multiplication yet).
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11 years ago |
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sergei
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dac52f503c
* m68k: fixed extension in a_load_ref_reg. Existing code cleans only bits 16-31 when loading a 8-bit register from 16-bit reference, and leaves garbage in bits 8-15.
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11 years ago |
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sergei
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b7da785688
* m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk.
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11 years ago |
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sergei
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df60309d96
* m68k: fixed the last remaining warning and removed "$WARNINGS OFF" directive.
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11 years ago |
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sergei
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b91d965096
* m68k: initial support for ROL/ROR operations, defining 'cpurox' for CPU target can actually enable them. However it cannot be done outright because these instructions do not exits on Coldfire, and internal processing of RoX,Sar,BsX, etc. can not yet be switched depending on CPU subtype.
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11 years ago |
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sergei
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535218e837
* m68k: fixed OP_NOT/OP_NEG with two registers, it must never modify the source register.
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11 years ago |
