Author | SHA1 Message | Date |
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02c3f328a2 - RISC-V: Share optimizations between 32 and 64-bit. | 5 years ago |
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1e3f72403e * renamed getintparaloc to getcgtempparaloc | 5 years ago |
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53a27fe7b3 Disable range check in m68k:tiscv32 and riscv64 cgcpu units | 6 years ago |
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44150f43ac * RISC-V 32 compilation fixed | 7 years ago |
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ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. | 7 years ago |