 Jeppe Johansen
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387824c1ee
Added some APSR register bitmask definitions.
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%!s(int64=10) %!d(string=hai) anos |
|
Jeppe Johansen
|
d023c63ad0
Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A.
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%!s(int64=10) %!d(string=hai) anos |
 florian
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=12) %!d(string=hai) anos |
|
Jeppe Johansen
|
666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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%!s(int64=12) %!d(string=hai) anos |
|
Jeppe Johansen
|
0087661fb5
Added FPv4_d16 FPU instructions, and a few extra registers
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%!s(int64=13) %!d(string=hai) anos |
|
florian
|
54d3d736f5
* patch by Jeppe Johansen to add support for handling different flags for xPSR regs,
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%!s(int64=13) %!d(string=hai) anos |
 Jonas Maebe
|
6ba8dc7146
+ support for the ARM hard float EABI on Linux (patch by Peter Green):
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%!s(int64=13) %!d(string=hai) anos |
|
Jonas Maebe
|
d1538ab023
o added ARM VPFv2/VFPv3 support:
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%!s(int64=15) %!d(string=hai) anos |
|
florian
|
edc58d78d5
+ support for arm special registers
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%!s(int64=16) %!d(string=hai) anos |
|
florian
|
91533b5d5a
* initial revision of new register naming
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%!s(int64=22) %!d(string=hai) anos |
