nickysn
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6f2e64ff90
+ added function get_ref_address_size
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7 years ago |
nickysn
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b0653a6313
+ added functions is_32_bit_ref and is_64_bit_ref, similar to is_16_bit_ref
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7 years ago |
nickysn
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2b6e5d817e
* changed the parameter of is_16_bit_ref to be a treference, instead of toper
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7 years ago |
nickysn
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baf492c7a5
+ another helper function: x86_parameterized_string_op_param_count
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7 years ago |
nickysn
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0fb79946a5
+ added support for the parameterized versions of the x86 string instructions
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7 years ago |
nickysn
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92a52a9f4d
+ implemented support for instructions with non-native address size on i8086
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7 years ago |
nickysn
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8589b946fc
* different versions (behind cpu specific ifdefs) of process_ea_ref renamed
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7 years ago |
nickysn
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31c9214884
* replaced R_SUBADDR with the appropriate size (R_SUBW, R_SUBD or R_SUBQ) in
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7 years ago |
nickysn
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e701fa8de1
* converted the x86 instruction flags to a set, so they can be extended more
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8 years ago |
florian
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1ffdf02b94
+ Ch_*Op4
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8 years ago |
florian
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b1dff29cbf
* removed unused units
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8 years ago |
nickysn
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0c244046a9
* proper register change info for the movs,cmps and scas x86 string instructions
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8 years ago |
nickysn
|
1d34e96064
+ added x86 instruction flag Ch_RFLAGScc, indicating instructions that read
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8 years ago |
nickysn
|
1146b7c12c
+ added detailed information for individual flag bits use for most x86
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8 years ago |
nickysn
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869f395a31
+ added knowledge to the compiler for the x86 instructions, that don't read
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8 years ago |
nickysn
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9303a8f61a
* changed the x86 TInsProp.Ch structure from a 3-element array to a pascal set;
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8 years ago |
nickysn
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189e49998c
* fixes to the x86 instruction flags tracking attributes:
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8 years ago |
nickysn
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3d28878210
+ added taicpu.op_reg_reg_ref() constructor for x86, in order to support the
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8 years ago |
Jonas Maebe
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a25ebbba3e
+ added volatility information to all memory references
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8 years ago |
sergei
|
b5660401fe
* Some cleanup for AVX part of internal assembler. Functionality is not changed.
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8 years ago |
sergei
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ebe134febc
* Fixed memory reference size for MOVSS instruction, Mantis #29954.
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8 years ago |
sergei
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edf943a4f6
* Changed memory operand size for VMOVSS instruction to 32 bits, Mantis #29957.
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8 years ago |
florian
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56252d59f0
+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933
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8 years ago |
pierre
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38f751573a
Copy TExternChain type and AddSymbol procedure to unit aasmcpu from agx86nsm unit
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9 years ago |
florian
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ec92bc3390
* case of identifiers fixed
|
9 years ago |
florian
|
406e3c4ac1
+ support xgetbv instruction, resolves issue #29958
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9 years ago |
florian
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8d5cc3dfa4
* (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893.
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9 years ago |
nickysn
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b562bcfdbd
* fixed the alignment filler in code sections on i8086 to always use nops,
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9 years ago |
nickysn
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cf3230b100
- removed IF_CENTAUR and replaced it with IF_CYRIX. Rationale: only 3 Centaur -
|
9 years ago |
nickysn
|
9a2f5e01d7
+ added range checking for the immediate operand of NEC V20/V30's instructions CLR1, SET1, NOT1 and TEST1
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9 years ago |