 Jonas Maebe
|
7c4e7d6bd3
* support OS_32/OS_64 in cgsize2subreg for ARM MM registers to handle
|
há 6 anos atrás |
 pierre
|
4657f45e74
* Change first parameter type of function is_continuous_maks to aword type.
|
há 6 anos atrás |
|
pierre
|
92acd38f40
Fix for bug report #34380
|
há 6 anos atrás |
 florian
|
4f5f3c4a09
+ support for vmov.xx vreg,#imm on arm
|
há 7 anos atrás |
 nickysn
|
518cdf9674
* replaced the saved_XXX_registers arrays with virtual methods inside
|
há 7 anos atrás |
|
Jonas Maebe
|
880d438704
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
|
há 8 anos atrás |
|
florian
|
ad71b8348e
* S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers
|
há 9 anos atrás |
 Jeppe Johansen
|
5ca1740bee
Fix issue in is_thumb32_imm. imm<11:10> have to be non-zero meaning the rotate only works from 8 to 31. Caused 0x8000001F to be mistaken for a valid immediate.
|
há 10 anos atrás |
|
Jeppe Johansen
|
3d7dce81fe
Make MRS and MSR use the right encoding on Thumb architectures.
|
há 10 anos atrás |
|
Jeppe Johansen
|
71cdedea82
Add missing NOP, and B instruction forms.
|
há 10 anos atrás |
|
Jeppe Johansen
|
5c3093a937
Add most non-VFP Thumb-2 instruction entries for the ARM internal writer.
|
há 10 anos atrás |
|
Jeppe Johansen
|
d023c63ad0
Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A.
|
há 10 anos atrás |
 masta
|
fb52392e20
Reformat and comment is_thumb32_imm
|
há 11 anos atrás |
 svenbarth
|
c48d572996
Implement support for saving and restoring address registers.
|
há 12 anos atrás |
|
florian
|
d4968e054b
+ arm: tsettings.instructionset
|
há 12 anos atrás |
|
florian
|
086ae4b999
Merge r22905 and r22906
|
há 12 anos atrás |
|
florian
|
1eeeb309c7
* intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
|
há 12 anos atrás |
|
florian
|
47d43750e4
* remove unused units from uses statements
|
há 12 anos atrás |
|
masta
|
e327b4581c
Use TRegNameTable instead of array[tregisterindex] of string[10]
|
há 13 anos atrás |
|
Jeppe Johansen
|
4e84431dde
Fix some optimizations which assume that there are 3 operands
|
há 13 anos atrás |
|
Jeppe Johansen
|
666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
há 13 anos atrás |
|
Jeppe Johansen
|
a8f9b0dac4
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
há 13 anos atrás |
|
Jeppe Johansen
|
3e963a49e2
Added support for IT block merging
|
há 13 anos atrás |
|
Jeppe Johansen
|
9ec9b44784
Add CBNZ/CBZ instructions
|
há 13 anos atrás |
|
florian
|
54d3d736f5
* patch by Jeppe Johansen to add support for handling different flags for xPSR regs,
|
há 13 anos atrás |
|
masta
|
d8af83d252
Introduce a version of MatchInstruction for multiple instructions
|
há 13 anos atrás |
|
florian
|
55e6da6d28
* make cpubase for arm use inlining
|
há 13 anos atrás |
|
florian
|
d8161c185c
+ track usage of flags by using a new register RS_/NR_DEFAULTFLAGS
|
há 13 anos atrás |
|
masta
|
d987cee96a
Introduce split_into_shifter_const to ARM-Code Generator
|
há 13 anos atrás |
|
masta
|
3205169ab9
Use roldword intrinsic instead of function rotl.
|
há 13 anos atrás |
