 sergei
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5165497498
* MIPS: fixed TCpuAsmOptimizer.InstructionLoadsFromReg, it now correctly considers instructions that read their first operand.
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%!s(int64=8) %!d(string=hai) anos |
 florian
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6af656aaed
+ DebugMsg based debugging for the mips(el) assembler optimizer
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%!s(int64=8) %!d(string=hai) anos |
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sergei
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41751bc5b4
+ Next portion of MIPS peephole optimizations. Get more aggressive and do more than a single pass if needed, enabling optimization of instructions that logically turn into MOVE due to register renaming.
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%!s(int64=9) %!d(string=hai) anos |
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sergei
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e8f2f42b75
* Reverted r29373 and replaced it with more appropriate fix.
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%!s(int64=9) %!d(string=hai) anos |
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florian
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1266491085
o refactored some peephole optimizer code:
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%!s(int64=9) %!d(string=hai) anos |
 yury
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35ff024f03
* mips: Fixed internal error 2014061703 when optimization are enabled.
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%!s(int64=9) %!d(string=hai) anos |
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sergei
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a709a9b637
* MIPS peephole: check that operand is present before accessing its fields, also check that it's not a branch target. Mantis #27608.
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%!s(int64=10) %!d(string=hai) anos |
 pierre
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cc537a2e76
Try to avoid uncorrect optimization
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%!s(int64=10) %!d(string=hai) anos |
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sergei
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06ee500352
* MIPS: improved code generation in make_simple_ref
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%!s(int64=10) %!d(string=hai) anos |
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sergei
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84245a6e0c
* MIPS: doing progress with peephole optimizer.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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3ede5ec99b
* MIPS peephole: refactored/simplified and added (another) couple of optimizations.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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406a678223
* MIPS: MOVE instruction cannot be changed into conditional move (MOVZ/MOVN) if it overwrites register used as condition.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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1e11e34f42
+ MIPS: implemented more peephole optimizations.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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482e61dafa
* MIPS, TCpuAsmOptimizer.GetNextInstructionUsingReg: test that returned item is actually an instruction, because GetNextInstruction can sometimes stop on labels.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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c2a29a0dbb
+ MIPS: implemented peephole optimization which changes appropriate patterns into conditional moves, which are available on MIPS4 and higher.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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a8e30043db
+ MIPS: more peephole optimizations (basically updated to the state of SPARC peephole).
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%!s(int64=11) %!d(string=hai) anos |
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sergei
|
06735eaefc
+ MIPS peephole optimizer: eliminate redundant moves of floating point registers.
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%!s(int64=11) %!d(string=hai) anos |
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sergei
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8e6d4b41e2
+ MIPS: started the peephole optimizer.
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%!s(int64=12) %!d(string=hai) anos |
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florian
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0c8546f94c
* more MIPS code of David Zhang integrated
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%!s(int64=15) %!d(string=hai) anos |
