 florian
|
4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
|
%!s(int64=6) %!d(string=hai) anos |
|
florian
|
72416edcc4
+ support for tlsm_general on i386-linux
|
%!s(int64=6) %!d(string=hai) anos |
 yury
|
4357caaad8
* Removed unused local vars.
|
%!s(int64=6) %!d(string=hai) anos |
|
florian
|
cdce68451a
- x86 align does not use a register anymore, code removed
|
%!s(int64=6) %!d(string=hai) anos |
 marco
|
f0042a4719
* vcmppd hardcoded primitives like vcmpeqpd.
|
%!s(int64=7) %!d(string=hai) anos |
|
florian
|
f66a91499d
* FPC uses meanwhile more mov instructions, so extended taicpu.is_same_reg_move to support them
|
%!s(int64=7) %!d(string=hai) anos |
|
florian
|
31f78ea2b6
+ implementation of the vectorcall calling convention by J. Gareth Moreton
|
%!s(int64=7) %!d(string=hai) anos |
|
florian
|
e6a6938787
* make fpu/mmx/xmm/ymm registers numbers instead of flags to have enough space for zmm/bnd/k registers
|
%!s(int64=7) %!d(string=hai) anos |
 nickysn
|
c464f7fa56
* fixed the SEG inline asm directive when used with 32-bit registers on the i8086 target
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
8a0d8f025b
* fixed another i8086 inline asm 32-bit constant bug (e.g. in 'or eax, 80000001h')
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
325e66287c
* fix for inline asm of instructions with 32-bit constant operands on i8086
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
d7e4b50068
+ also optimize x86_64 references by switching [rbp+reg64] to [reg64+rbp],
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
5ae32a0ec5
+ always do the x86_64 reference optimizations as if SS=DS, because the CPU
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
875339993f
* strip segment overrides, for segments, which should be equal in the current
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
80226e3af4
+ added an optimization pass, that optimizes x86 references
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
67a0e9bdae
+ added x86 helper function get_default_segment_of_ref, which returns the
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
6f2e64ff90
+ added function get_ref_address_size
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
b0653a6313
+ added functions is_32_bit_ref and is_64_bit_ref, similar to is_16_bit_ref
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
2b6e5d817e
* changed the parameter of is_16_bit_ref to be a treference, instead of toper
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
baf492c7a5
+ another helper function: x86_parameterized_string_op_param_count
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
0fb79946a5
+ added support for the parameterized versions of the x86 string instructions
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
92a52a9f4d
+ implemented support for instructions with non-native address size on i8086
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
8589b946fc
* different versions (behind cpu specific ifdefs) of process_ea_ref renamed
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
31c9214884
* replaced R_SUBADDR with the appropriate size (R_SUBW, R_SUBD or R_SUBQ) in
|
%!s(int64=7) %!d(string=hai) anos |
|
nickysn
|
e701fa8de1
* converted the x86 instruction flags to a set, so they can be extended more
|
%!s(int64=7) %!d(string=hai) anos |
|
florian
|
1ffdf02b94
+ Ch_*Op4
|
%!s(int64=8) %!d(string=hai) anos |
|
florian
|
b1dff29cbf
* removed unused units
|
%!s(int64=8) %!d(string=hai) anos |
|
nickysn
|
0c244046a9
* proper register change info for the movs,cmps and scas x86 string instructions
|
%!s(int64=8) %!d(string=hai) anos |
|
nickysn
|
1d34e96064
+ added x86 instruction flag Ch_RFLAGScc, indicating instructions that read
|
%!s(int64=8) %!d(string=hai) anos |
|
nickysn
|
1146b7c12c
+ added detailed information for individual flag bits use for most x86
|
%!s(int64=8) %!d(string=hai) anos |
