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fpc
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Commit History

Author SHA1 Message Date
  nickysn fe3f4a7447 * fixes in trgcpu.do_spill_replace 5 years ago
  nickysn 8ceee70912 * range check for spilltemp.offset in [-128..127], not [0..63] in trgcpu.do_spill_replace for Z80 5 years ago
  nickysn 8291d24b7f * fix comment 5 years ago
  nickysn 65efc495af + add edges to disallow the use of the 8-bit subregisters of IX, IY and SP 5 years ago
  florian e370e9ba15 * register names fixed 8 years ago
  florian ea52a23179 + skeleton for Z80 support 8 years ago