 pierre
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92cd9502ef
Merge of revisions 40277
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6 years ago |
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pierre
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d8b0ded10c
Marge of more trunk fixes into fixes branch.
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6 years ago |
 yury
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71d9269b25
Merged revision(s) 40585-40586 from trunk:
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6 years ago |
 Jeppe Johansen
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09a8cafcd7
Restricted MlaCmp>Mlas optimization to only work in ARM mode.
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8 years ago |
 florian
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4868b83157
* do not generate always debug messages in the arm assembler optimizer
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8 years ago |
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yury
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3bedccf946
* ARM scheduler need to move register de-allocs located before the instruction. Also preserve order of allocs and de-allocs.
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8 years ago |
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yury
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fe0e30030f
* In ARM scheduler move all needed additional items with an instruction:
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8 years ago |
 Jonas Maebe
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38fd0efa3b
* don't conditionalise BL on ARM, because it may have to be converted to
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9 years ago |
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florian
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73aeea73ed
+ VOpVMov2VOp optimization
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9 years ago |
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florian
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1266491085
o refactored some peephole optimizer code:
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9 years ago |
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Jeppe Johansen
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803f402bf8
Fix minor bug in peephole optimizer.
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9 years ago |
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yury
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432248cbf1
* Removed lot of unused vars.
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10 years ago |
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yury
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df9d6db398
* Fixed instruction re-scheduler for ARM in case of PIC.
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10 years ago |
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Jeppe Johansen
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9e5979e8be
Implemented UAL syntax support in the ARM assembler reader. Can be toggled with a field for now, but not implemented yet. Still using pre-UAL syntax for now.
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10 years ago |
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Jeppe Johansen
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3bc1db9612
Fixed breakage in the ARM peephole optimizer indirectly brought to light by r29189.
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10 years ago |
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Jeppe Johansen
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d04e988ff1
Make sure optimizer don't generate invalid assembler forms (LDRD and STRD).
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10 years ago |
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Jeppe Johansen
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d3e91bb60c
Fixed issue #26965. The peephole optimization didn't move a potential register deallocation to after the ldr instruction causing mov's to be removed.
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10 years ago |
 sergei
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a3c439c60f
- No longer insert BlockStart markers into asmlists. The presence of these markers disrupts peephole optimizations and require additional checks all over the place, causing various workarounds/hacks (like TAsmList.Create_without_marker) to start building up.
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11 years ago |
 masta
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7e22bd53b6
Changed ARMs StrLdr2StrMov peephole optimizer look further ahead
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11 years ago |
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masta
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bfa85218fa
Introduce TCpuAsmOptimizer.GetNextInstructionUsingRef
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11 years ago |
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masta
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d1c5f89976
Make Next an Out-parameter in ARMs GetNextInstructionUsingReg
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11 years ago |
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masta
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7a0c79de60
Fix for AndLsl2Lsl in ARM Peephole optimizer
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11 years ago |
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masta
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85d208fea4
Fix ARM LoadScheduler in case of Pre/PostIndexed addressing
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11 years ago |
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Jeppe Johansen
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857a849173
Added an additional check to the MulAdd2MLA optimization. The operands of the multiplication weren't checked.
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11 years ago |
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Jeppe Johansen
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a1197460e1
Constrained a number of optimizations and updated reference offsets for ARM Thumb.
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11 years ago |
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florian
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23c8517418
* applying opXYX2opsXY to ADD makes no sense on thumb-2 (at least as far as I can see)
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11 years ago |
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Jeppe Johansen
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95589fb1e2
Apply DataMov2Data to MLA and MLS too. Those have over 4 operands.
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11 years ago |
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florian
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ac85d44899
* do OpCmp2OpS optimization also if after cmp follows an appropriate mov
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11 years ago |
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Jeppe Johansen
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6861cbcf16
Allow FoldShiftLdrStr for all sizes of LDR/STR, and disable it for references that post/pre increment the base register on Thumb-2 targets.
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11 years ago |
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Jeppe Johansen
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07b2982e77
Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference.
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11 years ago |
