 Jonas Maebe
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bd203a5b57
* synchronised with trunk till r30240
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10 anni fa |
 Károly Balogh
|
0021ad714f
* fixed some ancient code behind cpu_uses_separate_address_registers define to at least compile again, for some m68k experiment
|
10 anni fa |
|
Jonas Maebe
|
67b8aceaee
* synchronized with privatetrunk till r30095
|
10 anni fa |
|
Jonas Maebe
|
2c3aa7cee0
* give an internal error in second_int_to_bool() if left.expectloc was not
|
10 anni fa |
|
Jonas Maebe
|
3a78f4f580
* use the correct destination def for loading a simple proc2procvar
|
11 anni fa |
|
Jonas Maebe
|
5c75b6dd6b
* synchronised with trunk up till r28402
|
11 anni fa |
|
Jonas Maebe
|
2c7a1b4e91
* fixed optimisation from r25067 for the generic case where a signed value
|
11 anni fa |
|
Jonas Maebe
|
7949bebb8d
* synchronised with r28168 of trunk
|
11 anni fa |
 sergei
|
04eb925776
* tcgtypeconvnode.second_int_to_int: disabled optimization from r25067 for m68k, because reg_cgsize() does not return expected values on that target.
|
11 anni fa |
 nickysn
|
cb05907e18
* fixed the global function to nested procvar conversion in the i8086 far data
|
11 anni fa |
|
Jonas Maebe
|
bacd303208
* synchronized with trunk up to r27758
|
11 anni fa |
|
nickysn
|
4ab9c6f206
+ fixed tcgtypeconvnode.second_class_to_intf for i8086 far data memory models
|
11 anni fa |
|
nickysn
|
a17c04c3e0
* fixed array to pointer conversion in i8086 far data memory models
|
11 anni fa |
|
nickysn
|
e8b9d9bf41
* converted tcgtypeconvnode.second_nil_to_methodprocvar to the high level code
|
11 anni fa |
|
nickysn
|
187c2af20e
* tcgtypeconvnode.second_proc_to_procvar converted to the high level code
|
11 anni fa |
 florian
|
0a7b795744
* fix for the regressions caused by r27417
|
11 anni fa |
|
florian
|
73cf0b62f2
* relaxed conditions for floats in int registers, this improved softfloat code significantly
|
11 anni fa |
|
nickysn
|
0aab7fcc9c
* fixed tcgtypeconvnode.second_cstring_to_pchar for i8086 far data memory models by using the high level code generator
|
11 anni fa |
|
nickysn
|
2644d7566c
* refactored tcgtypeconvnode.second_pointer_to_array to use
|
11 anni fa |
|
nickysn
|
bd75abb64b
+ fill the treference.segment in tcgtypeconvnode.second_pointer_to_array when
|
11 anni fa |
|
nickysn
|
a9f56d2714
* refactored tcgtypeconvnode.second_ansistring_to_pchar to use the high level
|
11 anni fa |
|
Jonas Maebe
|
d46c353849
* migrated JVM-specific second_nil_to_methodprocvar code to njvmcnv
|
11 anni fa |
|
Jonas Maebe
|
4065483a50
* completed thlcgobj.location_force_fpureg(), use it everywhere and removed
|
11 anni fa |
|
Jonas Maebe
|
cdfb23bf6c
* converted some leftovers in tcgtypeconvnode.second_int_to_int/
|
11 anni fa |
 Jeppe Johansen
|
07b2982e77
Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference.
|
11 anni fa |
|
florian
|
4d5119bf1c
* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables
|
12 anni fa |
 svenbarth
|
76f6de5cf1
Refactor tobjectdef.find_implemented_interface out into unit defcmp so that the recently introduced cycle between symdef and defcmp can be broken again.
|
12 anni fa |
|
sergei
|
f80ce76a69
+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
|
12 anni fa |
|
nickysn
|
7a0bf4fa54
* the change in r25067 disabled for 16-bit and 8-bit CPUs, because it relies on reg_cgsize, which gives wrong results on archs that use GetNextReg()
|
12 anni fa |
|
sergei
|
f3a1c749fb
* tcgtypeconvnode.second_int_to_int: reuse 8 and 16-bit-sized register locations on targets with 32-bit-only registers when casting to larger size (except ShortInt to Word cast). This is possible because upper bits of such registers are always kept valid by code generators (see 'maybeadjustresult' method in cgcpu.pas). Removes a lot of useless register moves.
|
12 anni fa |
